No more "pin-pair"
RX and TX can be assigned to ANY capable pins.
This commit is contained in:
parent
6c5997ef9f
commit
2d45189fe2
6
Makefile
6
Makefile
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@ -682,6 +682,7 @@ COMMON_SRC = \
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drivers/serial.c \
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drivers/serial.c \
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drivers/serial_pinconfig.c \
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drivers/serial_pinconfig.c \
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drivers/serial_uart.c \
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drivers/serial_uart.c \
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drivers/serial_uart_pinconfig.c \
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drivers/sound_beeper.c \
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drivers/sound_beeper.c \
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drivers/stack_check.c \
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drivers/stack_check.c \
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drivers/system.c \
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drivers/system.c \
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@ -897,6 +898,7 @@ SIZE_OPTIMISED_SRC := $(SIZE_OPTIMISED_SRC) \
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config/config_streamer.c \
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config/config_streamer.c \
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drivers/serial_pinconfig.c \
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drivers/serial_pinconfig.c \
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drivers/serial_uart_init.c \
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drivers/serial_uart_init.c \
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drivers/serial_uart_pinconfig.c \
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io/serial_4way.c \
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io/serial_4way.c \
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io/serial_4way_avrootloader.c \
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io/serial_4way_avrootloader.c \
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io/serial_4way_stk500v2.c \
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io/serial_4way_stk500v2.c \
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@ -1013,8 +1015,10 @@ SITLEXCLUDES = \
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drivers/light_led.c \
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drivers/light_led.c \
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drivers/system.c \
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drivers/system.c \
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drivers/rcc.c \
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drivers/rcc.c \
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drivers/serial_uart.c \
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drivers/serial_pinconfig.c \
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drivers/serial_pinconfig.c \
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drivers/serial_uart.c \
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drivers/serial_uart_init.c \
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drivers/serial_uart_pinconfig.c \
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drivers/rx_xn297.c \
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drivers/rx_xn297.c \
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drivers/display_ug2864hsweg01.c \
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drivers/display_ug2864hsweg01.c \
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telemetry/crsf.c \
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telemetry/crsf.c \
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1439
Makefile.orig
1439
Makefile.orig
File diff suppressed because it is too large
Load Diff
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@ -40,33 +40,6 @@
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart_impl.h"
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#include "drivers/serial_uart_impl.h"
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uartDevice_t uartDevice[UARTDEV_COUNT]; // Only configured in target.h
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uartDevice_t *uartDevmap[UARTDEV_COUNT_MAX]; // Full array
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void uartPinConfigure(const serialPinConfig_t *pSerialPinConfig)
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{
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uartDevice_t *uartdev = uartDevice;
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for (size_t hindex = 0 ; hindex < UARTDEV_COUNT ; hindex++) {
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const uartHardware_t *hardware = &uartHardware[hindex];
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UARTDevice device = hardware->device;
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for (int pair = 0 ; pair < UARTHARDWARE_PINPAIR_COUNT ; pair++) {
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if (hardware->pinPair[pair].rx == pSerialPinConfig->ioTagRx[device]
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&& hardware->pinPair[pair].tx == pSerialPinConfig->ioTagTx[device]) {
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// Matching pin pair found
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uartdev->hardware = hardware;
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uartdev->rx = hardware->pinPair[pair].rx;
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uartdev->tx = hardware->pinPair[pair].tx;
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uartDevmap[device] = uartdev++;
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break;
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}
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}
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}
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}
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static void usartConfigurePinInversion(uartPort_t *uartPort) {
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static void usartConfigurePinInversion(uartPort_t *uartPort) {
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bool inverted = uartPort->port.options & SERIAL_INVERTED;
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bool inverted = uartPort->port.options & SERIAL_INVERTED;
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@ -21,7 +21,7 @@
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#if defined(STM32F1)
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#if defined(STM32F1)
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#define UARTDEV_COUNT_MAX 3
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#define UARTDEV_COUNT_MAX 3
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#define UARTHARDWARE_PINPAIR_COUNT 3
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#define UARTHARDWARE_MAX_PINS 3
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#ifndef UART_RX_BUFFER_SIZE
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 256
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#define UART_RX_BUFFER_SIZE 256
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#endif
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#endif
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@ -30,7 +30,7 @@
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#endif
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#endif
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#elif defined(STM32F3)
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#elif defined(STM32F3)
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#define UARTDEV_COUNT_MAX 5
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#define UARTDEV_COUNT_MAX 5
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#define UARTHARDWARE_PINPAIR_COUNT 4
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#define UARTHARDWARE_MAX_PINS 4
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#ifndef UART_RX_BUFFER_SIZE
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 256
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#define UART_RX_BUFFER_SIZE 256
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#endif
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#endif
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@ -39,7 +39,7 @@
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#endif
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#endif
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#elif defined(STM32F4)
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#elif defined(STM32F4)
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#define UARTDEV_COUNT_MAX 6
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#define UARTDEV_COUNT_MAX 6
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#define UARTHARDWARE_PINPAIR_COUNT 4
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#define UARTHARDWARE_MAX_PINS 4
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#ifndef UART_RX_BUFFER_SIZE
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 512
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#define UART_RX_BUFFER_SIZE 512
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#endif
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#endif
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@ -48,7 +48,7 @@
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#endif
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#endif
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#elif defined(STM32F7)
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#elif defined(STM32F7)
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#define UARTDEV_COUNT_MAX 8
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#define UARTDEV_COUNT_MAX 8
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#define UARTHARDWARE_PINPAIR_COUNT 3
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#define UARTHARDWARE_MAX_PINS 3
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#ifndef UART_RX_BUFFER_SIZE
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#ifndef UART_RX_BUFFER_SIZE
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#define UART_RX_BUFFER_SIZE 512
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#define UART_RX_BUFFER_SIZE 512
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#endif
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#endif
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@ -111,11 +111,6 @@
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#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8)
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#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8)
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typedef struct uartPinPair_s {
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ioTag_t rx;
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ioTag_t tx;
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} uartPinPair_t;
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typedef struct uartHardware_s {
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typedef struct uartHardware_s {
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UARTDevice device; // XXX Not required for full allocation
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UARTDevice device; // XXX Not required for full allocation
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USART_TypeDef* reg;
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USART_TypeDef* reg;
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DMA_Stream_TypeDef *txDMAStream;
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DMA_Stream_TypeDef *txDMAStream;
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DMA_Stream_TypeDef *rxDMAStream;
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DMA_Stream_TypeDef *rxDMAStream;
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#endif
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#endif
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uartPinPair_t pinPair[UARTHARDWARE_PINPAIR_COUNT];
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ioTag_t rxPins[UARTHARDWARE_MAX_PINS];
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ioTag_t txPins[UARTHARDWARE_MAX_PINS];
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#if defined(STM32F7)
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#if defined(STM32F7)
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uint32_t rcc_ahb1;
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uint32_t rcc_ahb1;
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rccPeriphTag_t rcc_apb2;
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rccPeriphTag_t rcc_apb2;
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@ -42,33 +42,6 @@
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart_impl.h"
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#include "drivers/serial_uart_impl.h"
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uartDevice_t uartDevice[UARTDEV_COUNT]; // Only those configured in target.h
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uartDevice_t *uartDevmap[UARTDEV_COUNT_MAX]; // Full array
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void uartPinConfigure(const serialPinConfig_t *pSerialPinConfig)
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{
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uartDevice_t *uartdev = uartDevice;
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for (size_t hindex = 0; hindex < UARTDEV_COUNT_MAX; hindex++) {
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const uartHardware_t *hardware = &uartHardware[hindex];
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UARTDevice device = hardware->device;
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for (int pair = 0 ; pair < UARTHARDWARE_PINPAIR_COUNT ; pair++) {
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if (hardware->pinPair[pair].rx == pSerialPinConfig->ioTagRx[device]
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&& hardware->pinPair[pair].tx == pSerialPinConfig->ioTagTx[device]) {
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// Matching pin pair found
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uartdev->hardware = hardware;
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uartdev->rx = hardware->pinPair[pair].rx;
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uartdev->tx = hardware->pinPair[pair].tx;
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uartDevmap[device] = uartdev++;
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break;
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}
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}
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}
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}
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static void usartConfigurePinInversion(uartPort_t *uartPort) {
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static void usartConfigurePinInversion(uartPort_t *uartPort) {
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#if !defined(USE_INVERTER) && !defined(STM32F303xC)
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#if !defined(USE_INVERTER) && !defined(STM32F303xC)
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UNUSED(uartPort);
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UNUSED(uartPort);
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@ -0,0 +1,64 @@
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/*
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* This file is part of Cleanflight.
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*
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* Cleanflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Cleanflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* UART pin configuration common to all MCUs.
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*/
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/*
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* Authors:
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* jflyper - Created as a part of configurable UART/refactoring.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#include "build/build_config.h"
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#include "drivers/rcc.h"
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#include "drivers/serial.h"
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#include "drivers/serial_uart.h"
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#include "drivers/serial_uart_impl.h"
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uartDevice_t uartDevice[UARTDEV_COUNT]; // Only those configured in target.h
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uartDevice_t *uartDevmap[UARTDEV_COUNT_MAX]; // Full array
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void uartPinConfigure(const serialPinConfig_t *pSerialPinConfig)
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{
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uartDevice_t *uartdev = uartDevice;
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for (size_t hindex = 0; hindex < UARTDEV_COUNT_MAX; hindex++) {
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const uartHardware_t *hardware = &uartHardware[hindex];
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UARTDevice device = hardware->device;
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for (int pindex = 0 ; pindex < UARTHARDWARE_MAX_PINS ; pindex++) {
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if (hardware->rxPins[pindex] && (hardware->rxPins[pindex] == pSerialPinConfig->ioTagRx[device]))
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uartdev->rx = pSerialPinConfig->ioTagRx[device];
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if (hardware->txPins[pindex] && (hardware->txPins[pindex] == pSerialPinConfig->ioTagTx[device]))
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uartdev->tx = pSerialPinConfig->ioTagTx[device];
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}
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if (uartdev->rx || uartdev->tx) {
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uartdev->hardware = hardware;
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uartDevmap[device] = uartdev++;
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}
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}
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}
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@ -64,10 +64,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
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.reg = USART1,
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.reg = USART1,
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.rxDMAChannel = UART1_RX_DMA_CHANNEL,
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.rxDMAChannel = UART1_RX_DMA_CHANNEL,
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.txDMAChannel = UART1_TX_DMA_CHANNEL,
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.txDMAChannel = UART1_TX_DMA_CHANNEL,
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.pinPair = {
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.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
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{ DEFIO_TAG_E(PA10), DEFIO_TAG_E(PA9) },
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.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
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{ DEFIO_TAG_E(PB7), DEFIO_TAG_E(PB6) },
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},
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//.af = GPIO_AF_USART1,
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//.af = GPIO_AF_USART1,
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.rcc = RCC_APB2(USART1),
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.rcc = RCC_APB2(USART1),
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.irqn = USART1_IRQn,
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.irqn = USART1_IRQn,
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.reg = USART2,
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.reg = USART2,
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.rxDMAChannel = UART2_RX_DMA_CHANNEL,
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.rxDMAChannel = UART2_RX_DMA_CHANNEL,
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.txDMAChannel = UART2_TX_DMA_CHANNEL,
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.txDMAChannel = UART2_TX_DMA_CHANNEL,
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.pinPair = {
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.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
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{ DEFIO_TAG_E(PA3), DEFIO_TAG_E(PA2) },
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.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
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{ DEFIO_TAG_E(PD6), DEFIO_TAG_E(PD5) },
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},
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//.af = GPIO_AF_USART2,
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//.af = GPIO_AF_USART2,
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.rcc = RCC_APB1(USART2),
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.rcc = RCC_APB1(USART2),
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.irqn = USART2_IRQn,
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.irqn = USART2_IRQn,
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@ -98,11 +94,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
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.reg = USART3,
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.reg = USART3,
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.rxDMAChannel = UART3_RX_DMA_CHANNEL,
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.rxDMAChannel = UART3_RX_DMA_CHANNEL,
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.txDMAChannel = UART3_TX_DMA_CHANNEL,
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.txDMAChannel = UART3_TX_DMA_CHANNEL,
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.pinPair = {
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.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PD9), DEFIO_TAG_E(PC11) },
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{ DEFIO_TAG_E(PB11), DEFIO_TAG_E(PB10) },
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.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PD8), DEFIO_TAG_E(PC10) },
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{ DEFIO_TAG_E(PD9), DEFIO_TAG_E(PD8) },
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{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
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},
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//.af = GPIO_AF_USART3,
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//.af = GPIO_AF_USART3,
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.rcc = RCC_APB1(USART3),
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.rcc = RCC_APB1(USART3),
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.irqn = USART3_IRQn,
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.irqn = USART3_IRQn,
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@ -87,12 +87,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
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.reg = USART1,
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.reg = USART1,
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.rxDMAChannel = UART1_RX_DMA,
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.rxDMAChannel = UART1_RX_DMA,
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.txDMAChannel = UART1_TX_DMA,
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.txDMAChannel = UART1_TX_DMA,
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.pinPair = {
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.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), DEFIO_TAG_E(PC5), DEFIO_TAG_E(PE1) },
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{ DEFIO_TAG_E(PA10), DEFIO_TAG_E(PA9) },
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.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), DEFIO_TAG_E(PC4), DEFIO_TAG_E(PE0) },
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{ DEFIO_TAG_E(PB7), DEFIO_TAG_E(PB6) },
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{ DEFIO_TAG_E(PC5), DEFIO_TAG_E(PC4) },
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{ DEFIO_TAG_E(PE1), DEFIO_TAG_E(PE0) },
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},
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.rcc = RCC_APB2(USART1),
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.rcc = RCC_APB2(USART1),
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.af = GPIO_AF_7,
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.af = GPIO_AF_7,
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.irqn = USART1_IRQn,
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.irqn = USART1_IRQn,
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.reg = USART2,
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.reg = USART2,
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.rxDMAChannel = UART2_RX_DMA,
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.rxDMAChannel = UART2_RX_DMA,
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.txDMAChannel = UART2_TX_DMA,
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.txDMAChannel = UART2_TX_DMA,
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.pinPair = {
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.rxPins = { DEFIO_TAG_E(PA15), DEFIO_TAG_E(PA3), DEFIO_TAG_E(PB4), DEFIO_TAG_E(PD6) },
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{ DEFIO_TAG_E(PA15), DEFIO_TAG_E(PA14) },
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.txPins = { DEFIO_TAG_E(PA14), DEFIO_TAG_E(PA2), DEFIO_TAG_E(PB3), DEFIO_TAG_E(PD5) },
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{ DEFIO_TAG_E(PA3), DEFIO_TAG_E(PA2) },
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{ DEFIO_TAG_E(PB4), DEFIO_TAG_E(PB3) },
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{ DEFIO_TAG_E(PD6), DEFIO_TAG_E(PD5) },
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},
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.rcc = RCC_APB1(USART2),
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.rcc = RCC_APB1(USART2),
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.af = GPIO_AF_7,
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.af = GPIO_AF_7,
|
||||||
.irqn = USART2_IRQn,
|
.irqn = USART2_IRQn,
|
||||||
|
@ -127,11 +119,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.reg = USART3,
|
.reg = USART3,
|
||||||
.rxDMAChannel = UART3_RX_DMA,
|
.rxDMAChannel = UART3_RX_DMA,
|
||||||
.txDMAChannel = UART3_TX_DMA,
|
.txDMAChannel = UART3_TX_DMA,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PB11), DEFIO_TAG_E(PB10) },
|
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
|
||||||
{ DEFIO_TAG_E(PD9), DEFIO_TAG_E(PD8) },
|
|
||||||
},
|
|
||||||
.rcc = RCC_APB1(USART3),
|
.rcc = RCC_APB1(USART3),
|
||||||
.af = GPIO_AF_7,
|
.af = GPIO_AF_7,
|
||||||
.irqn = USART3_IRQn,
|
.irqn = USART3_IRQn,
|
||||||
|
@ -147,9 +136,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.reg = UART4,
|
.reg = UART4,
|
||||||
.rxDMAChannel = 0, // XXX UART4_RX_DMA !?
|
.rxDMAChannel = 0, // XXX UART4_RX_DMA !?
|
||||||
.txDMAChannel = 0, // XXX UART4_TX_DMA !?
|
.txDMAChannel = 0, // XXX UART4_TX_DMA !?
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PC11), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
.txPins = { DEFIO_TAG_E(PC10), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
|
||||||
},
|
|
||||||
.rcc = RCC_APB1(UART4),
|
.rcc = RCC_APB1(UART4),
|
||||||
.af = GPIO_AF_5,
|
.af = GPIO_AF_5,
|
||||||
.irqn = UART4_IRQn,
|
.irqn = UART4_IRQn,
|
||||||
|
@ -165,9 +153,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.reg = UART5,
|
.reg = UART5,
|
||||||
.rxDMAChannel = 0,
|
.rxDMAChannel = 0,
|
||||||
.txDMAChannel = 0,
|
.txDMAChannel = 0,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PD2), DEFIO_TAG_E(PC12) },
|
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
|
||||||
},
|
|
||||||
.rcc = RCC_APB1(UART5),
|
.rcc = RCC_APB1(UART5),
|
||||||
.af = GPIO_AF_5,
|
.af = GPIO_AF_5,
|
||||||
.irqn = UART5_IRQn,
|
.irqn = UART5_IRQn,
|
||||||
|
|
|
@ -48,10 +48,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART1_TX_DMA
|
#ifdef USE_UART1_TX_DMA
|
||||||
.txDMAStream = DMA2_Stream7,
|
.txDMAStream = DMA2_Stream7,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA10), DEFIO_TAG_E(PA9) },
|
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PB7), DEFIO_TAG_E(PB6) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF_USART1,
|
.af = GPIO_AF_USART1,
|
||||||
.rcc = RCC_APB2(USART1),
|
.rcc = RCC_APB2(USART1),
|
||||||
.irqn = USART1_IRQn,
|
.irqn = USART1_IRQn,
|
||||||
|
@ -71,10 +69,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART2_TX_DMA
|
#ifdef USE_UART2_TX_DMA
|
||||||
.txDMAStream = DMA1_Stream6,
|
.txDMAStream = DMA1_Stream6,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA3), DEFIO_TAG_E(PA2) },
|
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PD6), DEFIO_TAG_E(PD5) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF_USART2,
|
.af = GPIO_AF_USART2,
|
||||||
.rcc = RCC_APB1(USART2),
|
.rcc = RCC_APB1(USART2),
|
||||||
.irqn = USART2_IRQn,
|
.irqn = USART2_IRQn,
|
||||||
|
@ -94,11 +90,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART3_TX_DMA
|
#ifdef USE_UART3_TX_DMA
|
||||||
.txDMAStream = DMA1_Stream3,
|
.txDMAStream = DMA1_Stream3,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) },
|
||||||
{ DEFIO_TAG_E(PB11), DEFIO_TAG_E(PB10) },
|
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
|
||||||
{ DEFIO_TAG_E(PD9), DEFIO_TAG_E(PD8) }
|
|
||||||
},
|
|
||||||
.af = GPIO_AF_USART3,
|
.af = GPIO_AF_USART3,
|
||||||
.rcc = RCC_APB1(USART3),
|
.rcc = RCC_APB1(USART3),
|
||||||
.irqn = USART3_IRQn,
|
.irqn = USART3_IRQn,
|
||||||
|
@ -118,10 +111,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART4_TX_DMA
|
#ifdef USE_UART4_TX_DMA
|
||||||
.txDMAStream = DMA1_Stream4,
|
.txDMAStream = DMA1_Stream4,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA1), DEFIO_TAG_E(PA0) },
|
.txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF_UART4,
|
.af = GPIO_AF_UART4,
|
||||||
.rcc = RCC_APB1(UART4),
|
.rcc = RCC_APB1(UART4),
|
||||||
.irqn = UART4_IRQn,
|
.irqn = UART4_IRQn,
|
||||||
|
@ -141,9 +132,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART5_TX_DMA
|
#ifdef USE_UART5_TX_DMA
|
||||||
.txDMAStream = DMA1_Stream7,
|
.txDMAStream = DMA1_Stream7,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PD2), DEFIO_TAG_E(PC12) },
|
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
},
|
|
||||||
.af = GPIO_AF_UART5,
|
.af = GPIO_AF_UART5,
|
||||||
.rcc = RCC_APB1(UART5),
|
.rcc = RCC_APB1(UART5),
|
||||||
.irqn = UART5_IRQn,
|
.irqn = UART5_IRQn,
|
||||||
|
@ -163,10 +153,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
#ifdef USE_UART6_TX_DMA
|
#ifdef USE_UART6_TX_DMA
|
||||||
.txDMAStream = DMA2_Stream6,
|
.txDMAStream = DMA2_Stream6,
|
||||||
#endif
|
#endif
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC7), DEFIO_TAG_E(PC6) },
|
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PG9), DEFIO_TAG_E(PG14) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF_USART6,
|
.af = GPIO_AF_USART6,
|
||||||
.rcc = RCC_APB2(USART6),
|
.rcc = RCC_APB2(USART6),
|
||||||
.irqn = USART6_IRQn,
|
.irqn = USART6_IRQn,
|
||||||
|
|
|
@ -48,10 +48,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA2_Stream5,
|
.rxDMAStream = DMA2_Stream5,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA2_Stream7,
|
.txDMAStream = DMA2_Stream7,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA10), DEFIO_TAG_E(PA9) },
|
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PB7), DEFIO_TAG_E(PB6) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF7_USART1,
|
.af = GPIO_AF7_USART1,
|
||||||
#ifdef UART1_AHB1_PERIPHERALS
|
#ifdef UART1_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART1_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART1_AHB1_PERIPHERALS,
|
||||||
|
@ -73,10 +71,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream5,
|
.rxDMAStream = DMA1_Stream5,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream6,
|
.txDMAStream = DMA1_Stream6,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA3), DEFIO_TAG_E(PA2) },
|
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PD6), DEFIO_TAG_E(PD5) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF7_USART2,
|
.af = GPIO_AF7_USART2,
|
||||||
#ifdef UART2_AHB1_PERIPHERALS
|
#ifdef UART2_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART2_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART2_AHB1_PERIPHERALS,
|
||||||
|
@ -98,11 +94,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream1,
|
.rxDMAStream = DMA1_Stream1,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream3,
|
.txDMAStream = DMA1_Stream3,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) },
|
||||||
{ DEFIO_TAG_E(PB11), DEFIO_TAG_E(PB10) },
|
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
|
||||||
{ DEFIO_TAG_E(PD9), DEFIO_TAG_E(PD8) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF7_USART3,
|
.af = GPIO_AF7_USART3,
|
||||||
#ifdef UART3_AHB1_PERIPHERALS
|
#ifdef UART3_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART3_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART3_AHB1_PERIPHERALS,
|
||||||
|
@ -124,10 +117,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream2,
|
.rxDMAStream = DMA1_Stream2,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream4,
|
.txDMAStream = DMA1_Stream4,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PA1), DEFIO_TAG_E(PA0) },
|
.txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC11), DEFIO_TAG_E(PC10) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF8_UART4,
|
.af = GPIO_AF8_UART4,
|
||||||
#ifdef UART4_AHB1_PERIPHERALS
|
#ifdef UART4_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART4_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART4_AHB1_PERIPHERALS,
|
||||||
|
@ -149,9 +140,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream0,
|
.rxDMAStream = DMA1_Stream0,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream7,
|
.txDMAStream = DMA1_Stream7,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PD2), DEFIO_TAG_E(PC12) },
|
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
},
|
|
||||||
.af = GPIO_AF8_UART5,
|
.af = GPIO_AF8_UART5,
|
||||||
#ifdef UART5_AHB1_PERIPHERALS
|
#ifdef UART5_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART5_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART5_AHB1_PERIPHERALS,
|
||||||
|
@ -173,10 +163,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA2_Stream1,
|
.rxDMAStream = DMA2_Stream1,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA2_Stream6,
|
.txDMAStream = DMA2_Stream6,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PC7), DEFIO_TAG_E(PC6) },
|
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PG9), DEFIO_TAG_E(PG14) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF8_USART6,
|
.af = GPIO_AF8_USART6,
|
||||||
#ifdef UART6_AHB1_PERIPHERALS
|
#ifdef UART6_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART6_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART6_AHB1_PERIPHERALS,
|
||||||
|
@ -198,10 +186,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream3,
|
.rxDMAStream = DMA1_Stream3,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream1,
|
.txDMAStream = DMA1_Stream1,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PE7), DEFIO_TAG_E(PE8) },
|
.txPins = { DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7), IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PF6), DEFIO_TAG_E(PF7) },
|
|
||||||
},
|
|
||||||
.af = GPIO_AF8_UART7,
|
.af = GPIO_AF8_UART7,
|
||||||
#ifdef UART7_AHB1_PERIPHERALS
|
#ifdef UART7_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART7_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART7_AHB1_PERIPHERALS,
|
||||||
|
@ -223,9 +209,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
|
||||||
.rxDMAStream = DMA1_Stream6,
|
.rxDMAStream = DMA1_Stream6,
|
||||||
#endif
|
#endif
|
||||||
.txDMAStream = DMA1_Stream0,
|
.txDMAStream = DMA1_Stream0,
|
||||||
.pinPair = {
|
.rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
{ DEFIO_TAG_E(PE0), DEFIO_TAG_E(PE1) },
|
.txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE },
|
||||||
},
|
|
||||||
.af = GPIO_AF8_UART8,
|
.af = GPIO_AF8_UART8,
|
||||||
#ifdef UART8_AHB1_PERIPHERALS
|
#ifdef UART8_AHB1_PERIPHERALS
|
||||||
.rcc_ahb1 = UART8_AHB1_PERIPHERALS,
|
.rcc_ahb1 = UART8_AHB1_PERIPHERALS,
|
||||||
|
|
|
@ -281,7 +281,7 @@ void init(void)
|
||||||
busSwitchInit();
|
busSwitchInit();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef USE_UART
|
#if defined(USE_UART) && !defined(SITL)
|
||||||
uartPinConfigure(serialPinConfig());
|
uartPinConfigure(serialPinConfig());
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -342,7 +342,7 @@ void init(void)
|
||||||
beeperInit(beeperDevConfig());
|
beeperInit(beeperDevConfig());
|
||||||
#endif
|
#endif
|
||||||
/* temp until PGs are implemented. */
|
/* temp until PGs are implemented. */
|
||||||
#ifdef USE_INVERTER
|
#if defined(USE_INVERTER) && !defined(SITL)
|
||||||
initInverters(serialPinConfig());
|
initInverters(serialPinConfig());
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -151,5 +151,6 @@
|
||||||
#define TARGET_IO_PORTD 0xffff
|
#define TARGET_IO_PORTD 0xffff
|
||||||
#define TARGET_IO_PORTE 0xffff
|
#define TARGET_IO_PORTE 0xffff
|
||||||
#define TARGET_IO_PORTF 0xffff
|
#define TARGET_IO_PORTF 0xffff
|
||||||
|
#define TARGET_IO_PORTG 0xffff
|
||||||
|
|
||||||
#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(12) | TIM_N(8) | TIM_N(9) | TIM_N(10) | TIM_N(11))
|
#define USED_TIMERS ( TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(12) | TIM_N(8) | TIM_N(9) | TIM_N(10) | TIM_N(11))
|
||||||
|
|
|
@ -59,14 +59,14 @@
|
||||||
|
|
||||||
#define USABLE_TIMER_CHANNEL_COUNT 0
|
#define USABLE_TIMER_CHANNEL_COUNT 0
|
||||||
|
|
||||||
//#define USE_UART1
|
#define USE_UART1
|
||||||
//#define USE_UART2
|
#define USE_UART2
|
||||||
//#define USE_UART3
|
#define USE_UART3
|
||||||
//#define USE_UART4
|
#define USE_UART4
|
||||||
//#define USE_UART5
|
#define USE_UART5
|
||||||
//#define USE_UART6
|
#define USE_UART6
|
||||||
//#define USE_UART7
|
#define USE_UART7
|
||||||
//#define USE_UART8
|
#define USE_UART8
|
||||||
|
|
||||||
//#define USE_SOFTSERIAL1
|
//#define USE_SOFTSERIAL1
|
||||||
//#define USE_SOFTSERIAL2
|
//#define USE_SOFTSERIAL2
|
||||||
|
|
Loading…
Reference in New Issue