From 381c24bd552d50c5a2000a4d5e5d129a56d299c9 Mon Sep 17 00:00:00 2001 From: Sami Korhonen Date: Sun, 26 Nov 2017 14:44:26 +0200 Subject: [PATCH] Fix F7 DMAR N-channel output init --- src/main/drivers/pwm_output_dshot_hal.c | 40 +++++++++++++++++-------- 1 file changed, 27 insertions(+), 13 deletions(-) diff --git a/src/main/drivers/pwm_output_dshot_hal.c b/src/main/drivers/pwm_output_dshot_hal.c index 868dc96c3..a440e4065 100644 --- a/src/main/drivers/pwm_output_dshot_hal.c +++ b/src/main/drivers/pwm_output_dshot_hal.c @@ -235,19 +235,33 @@ void pwmDshotMotorHardwareConfig(const timerHardware_t *timerHardware, uint8_t m #ifdef USE_DSHOT_DMAR /* Enable the Output compare channel */ uint32_t channels = 0; - switch(motor->timerHardware->channel) { - case TIM_CHANNEL_1: - channels = LL_TIM_CHANNEL_CH1; - break; - case TIM_CHANNEL_2: - channels = LL_TIM_CHANNEL_CH2; - break; - case TIM_CHANNEL_3: - channels = LL_TIM_CHANNEL_CH3; - break; - case TIM_CHANNEL_4: - channels = LL_TIM_CHANNEL_CH4; - break; + if(output & TIMER_OUTPUT_N_CHANNEL) { + switch(motor->timerHardware->channel) { + case TIM_CHANNEL_1: + channels = LL_TIM_CHANNEL_CH1N; + break; + case TIM_CHANNEL_2: + channels = LL_TIM_CHANNEL_CH2N; + break; + case TIM_CHANNEL_3: + channels = LL_TIM_CHANNEL_CH3N; + break; + } + } else { + switch(motor->timerHardware->channel) { + case TIM_CHANNEL_1: + channels = LL_TIM_CHANNEL_CH1; + break; + case TIM_CHANNEL_2: + channels = LL_TIM_CHANNEL_CH2; + break; + case TIM_CHANNEL_3: + channels = LL_TIM_CHANNEL_CH3; + break; + case TIM_CHANNEL_4: + channels = LL_TIM_CHANNEL_CH4; + break; + } } motor->timerIndex = timerIndex; LL_TIM_CC_EnableChannel(motor->timerHardware->tim, channels);