Merge pull request #1492 from blckmn/tim_def
Simplified target timer definitions
This commit is contained in:
Martin Budden
GitHub
commit
3b8d84d920
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@ -105,6 +105,7 @@ typedef struct timerHardware_s {
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} timerHardware_t;
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typedef enum {
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TIMER_OUTPUT_NONE = 0x00,
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TIMER_INPUT_ENABLED = 0x00,
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TIMER_OUTPUT_ENABLED = 0x01,
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TIMER_OUTPUT_INVERTED = 0x02,
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@ -0,0 +1,390 @@
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/*
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* This file is part of Cleanflight.
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*
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* Cleanflight is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Cleanflight is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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#include <platform.h>
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#include "common/utils.h"
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#if defined(STM32F3)
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#define DEF_TIM(tim, chan, pin, flags, out) {\
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tim,\
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IO_TAG(pin),\
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EXPAND(DEF_CHAN_ ## chan),\
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flags,\
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(DEF_CHAN_ ## chan ## _OUTPUT | out),\
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EXPAND(GPIO_AF__ ## pin ## _ ## tim ## _ ## chan),\
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CONCAT(EXPAND(DEF_TIM_DMA__ ## tim ## _ ## chan), _CHANNEL),\
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CONCAT(EXPAND(DEF_TIM_DMA__ ## tim ## _ ## chan), _HANDLER)\
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}
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#define DEF_DMA_CHANNEL(tim, chan) CONCAT(EXPAND(DEF_TIM_DMA__ ## tim ## _ ## chan), _CHANNEL)
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#define DEF_DMA_HANDLER(tim, chan) CONCAT(EXPAND(DEF_TIM_DMA__ ## tim ## _ ## chan), _HANDLER)
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/* add the DMA mappings here */
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#define DEF_TIM_DMA__TIM1_CH1 DMA1_CH2
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#define DEF_TIM_DMA__TIM1_CH2 DMA1_CH3
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#define DEF_TIM_DMA__TIM1_CH4 DMA1_CH4
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#define DEF_TIM_DMA__TIM1_TRIG DMA1_CH4
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#define DEF_TIM_DMA__TIM1_COM DMA1_CH4
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#define DEF_TIM_DMA__TIM1_UP DMA1_CH5
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#define DEF_TIM_DMA__TIM1_CH3 DMA1_CH6
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#define DEF_TIM_DMA__TIM2_CH3 DMA1_CH1
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#define DEF_TIM_DMA__TIM2_UP DMA1_CH2
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#define DEF_TIM_DMA__TIM2_CH1 DMA1_CH5
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#define DEF_TIM_DMA__TIM2_CH2 DMA1_CH7
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#define DEF_TIM_DMA__TIM2_CH4 DMA1_CH7
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#define DEF_TIM_DMA__TIM3_CH2 DMA_NONE
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#define DEF_TIM_DMA__TIM3_CH3 DMA1_CH2
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#define DEF_TIM_DMA__TIM3_CH4 DMA1_CH3
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#define DEF_TIM_DMA__TIM3_UP DMA1_CH3
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#define DEF_TIM_DMA__TIM3_CH1 DMA1_CH6
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#define DEF_TIM_DMA__TIM3_TRIG DMA1_CH6
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#define DEF_TIM_DMA__TIM4_CH1 DMA1_CH1
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#define DEF_TIM_DMA__TIM4_CH2 DMA1_CH4
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#define DEF_TIM_DMA__TIM4_CH3 DMA1_CH5
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#define DEF_TIM_DMA__TIM4_UP DMA1_CH7
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#define DEF_TIM_DMA__TIM4_CH4 DMA_NONE
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#define DEF_TIM_DMA__TIM15_CH1 DMA1_CH5
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#define DEF_TIM_DMA__TIM15_CH2 DMA_NONE
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#define DEF_TIM_DMA__TIM15_UP DMA1_CH5
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#define DEF_TIM_DMA__TIM15_TRIG DMA1_CH5
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#define DEF_TIM_DMA__TIM15_COM DMA1_CH5
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#ifdef REMAP_TIM16_DMA
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#define DEF_TIM_DMA__TIM16_CH1 DMA1_CH6
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#define DEF_TIM_DMA__TIM16_UP DMA1_CH6
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#else
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#define DEF_TIM_DMA__TIM16_CH1 DMA1_CH3
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#define DEF_TIM_DMA__TIM16_UP DMA1_CH3
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#endif
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#ifdef REMAP_TIM17_DMA
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#define DEF_TIM_DMA__TIM17_CH1 DMA1_CH7
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#define DEF_TIM_DMA__TIM17_UP DMA1_CH7
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#else
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#define DEF_TIM_DMA__TIM17_CH1 DMA1_CH1
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#define DEF_TIM_DMA__TIM17_UP DMA1_CH1
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#endif
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#define DEF_TIM_DMA__TIM8_CH3 DMA2_CH1
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#define DEF_TIM_DMA__TIM8_UP DMA2_CH1
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#define DEF_TIM_DMA__TIM8_CH4 DMA2_CH2
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#define DEF_TIM_DMA__TIM8_TRIG DMA2_CH2
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#define DEF_TIM_DMA__TIM8_COM DMA2_CH2
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#define DEF_TIM_DMA__TIM8_CH1 DMA2_CH3
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#define DEF_TIM_DMA__TIM8_CH2 DMA2_CH5
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#define DMA1_CH1_CHANNEL DMA1_Channel1
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#define DMA1_CH2_CHANNEL DMA1_Channel2
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#define DMA1_CH3_CHANNEL DMA1_Channel3
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#define DMA1_CH4_CHANNEL DMA1_Channel4
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#define DMA1_CH5_CHANNEL DMA1_Channel5
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#define DMA1_CH6_CHANNEL DMA1_Channel6
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#define DMA1_CH7_CHANNEL DMA1_Channel7
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#define DMA2_CH1_CHANNEL DMA2_Channel1
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#define DMA2_CH2_CHANNEL DMA2_Channel2
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#define DMA2_CH3_CHANNEL DMA2_Channel3
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#define DMA2_CH4_CHANNEL DMA2_Channel4
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#define DMA2_CH5_CHANNEL DMA2_Channel5
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#define DMA2_CH6_CHANNEL DMA2_Channel6
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#define DMA2_CH7_CHANNEL DMA2_Channel7
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#define GPIO_AF(p, t) CONCAT(GPIO_AF__, p, _, t)
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#define GPIO_AF__PA0_TIM2_CH1 GPIO_AF_1
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#define GPIO_AF__PA1_TIM2_CH2 GPIO_AF_1
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#define GPIO_AF__PA2_TIM2_CH3 GPIO_AF_1
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#define GPIO_AF__PA3_TIM2_CH3 GPIO_AF_1
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#define GPIO_AF__PA5_TIM2_CH1 GPIO_AF_1
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#define GPIO_AF__PA6_TIM16_CH1 GPIO_AF_1
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#define GPIO_AF__PA7_TIM17_CH1 GPIO_AF_1
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#define GPIO_AF__PA12_TIM16_CH1 GPIO_AF_1
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#define GPIO_AF__PA13_TIM16_CH1N GPIO_AF_1
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#define GPIO_AF__PA15_TIM2_CH1 GPIO_AF_1
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#define GPIO_AF__PA4_TIM3_CH2 GPIO_AF_2
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#define GPIO_AF__PA6_TIM3_CH1 GPIO_AF_2
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#define GPIO_AF__PA7_TIM3_CH2 GPIO_AF_2
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#define GPIO_AF__PA15_TIM8_CH1 GPIO_AF_2
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#define GPIO_AF__PA7_TIM8_CH1N GPIO_AF_4
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#define GPIO_AF__PA14_TIM4_CH2 GPIO_AF_5
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#define GPIO_AF__PA7_TIM1_CH1N GPIO_AF_6
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#define GPIO_AF__PA8_TIM1_CH1 GPIO_AF_6
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#define GPIO_AF__PA9_TIM1_CH2 GPIO_AF_6
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#define GPIO_AF__PA10_TIM1_CH3 GPIO_AF_6
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#define GPIO_AF__PA11_TIM1_CH1N GPIO_AF_6
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#define GPIO_AF__PA12_TIM1_CH2N GPIO_AF_6
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#define GPIO_AF__PA1_TIM15_CH1N GPIO_AF_9
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#define GPIO_AF__PA2_TIM15_CH1 GPIO_AF_9
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#define GPIO_AF__PA3_TIM15_CH2 GPIO_AF_9
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#define GPIO_AF__PA9_TIM2_CH3 GPIO_AF_10
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#define GPIO_AF__PA10_TIM2_CH4 GPIO_AF_10
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#define GPIO_AF__PA11_TIM4_CH1 GPIO_AF_10
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#define GPIO_AF__PA12_TIM4_CH2 GPIO_AF_10
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#define GPIO_AF__PA13_TIM4_CH3 GPIO_AF_10
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#define GPIO_AF__PA11_TIM1_CH4 GPIO_AF_11
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#define GPIO_AF__PB3_TIM2_CH2 GPIO_AF_1
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#define GPIO_AF__PB4_TIM16_CH1 GPIO_AF_1
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#define GPIO_AF__PB6_TIM16_CH1N GPIO_AF_1
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#define GPIO_AF__PB7_TIM17_CH1N GPIO_AF_1
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#define GPIO_AF__PB8_TIM16_CH1 GPIO_AF_1
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#define GPIO_AF__PB9_TIM17_CH1 GPIO_AF_1
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#define GPIO_AF__PB10_TIM2_CH3 GPIO_AF_1
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#define GPIO_AF__PB11_TIM2_CH4 GPIO_AF_1
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#define GPIO_AF__PB14_TIM15_CH1 GPIO_AF_1
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#define GPIO_AF__PB15_TIM15_CH2 GPIO_AF_1
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#define GPIO_AF__PB0_TIM3_CH3 GPIO_AF_2
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#define GPIO_AF__PB1_TIM3_CH4 GPIO_AF_2
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#define GPIO_AF__PB4_TIM3_CH1 GPIO_AF_2
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#define GPIO_AF__PB5_TIM3_CH2 GPIO_AF_2
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#define GPIO_AF__PB6_TIM4_CH1 GPIO_AF_2
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#define GPIO_AF__PB7_TIM4_CH2 GPIO_AF_2
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#define GPIO_AF__PB8_TIM4_CH3 GPIO_AF_2
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#define GPIO_AF__PB9_TIM4_CH4 GPIO_AF_2
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#define GPIO_AF__PB15_TIM15_CH1N GPIO_AF_2
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#define GPIO_AF__PB0_TIM8_CH2N GPIO_AF_4
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#define GPIO_AF__PB1_TIM8_CH3N GPIO_AF_4
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#define GPIO_AF__PB3_TIM8_CH1N GPIO_AF_4
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#define GPIO_AF__PB4_TIM8_CH2N GPIO_AF_4
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#define GPIO_AF__PB15_TIM1_CH3N GPIO_AF_4
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#define GPIO_AF__PB6_TIM8_CH1 GPIO_AF_5
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#define GPIO_AF__PB0_TIM1_CH2N GPIO_AF_6
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#define GPIO_AF__PB1_TIM1_CH3N GPIO_AF_6
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#define GPIO_AF__PB13_TIM1_CH1N GPIO_AF_6
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#define GPIO_AF__PB14_TIM1_CH2N GPIO_AF_6
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#define GPIO_AF__PB5_TIM17_CH1 GPIO_AF_10
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#define GPIO_AF__PB7_TIM3_CH4 GPIO_AF_10
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#define GPIO_AF__PB8_TIM8_CH2 GPIO_AF_10
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#define GPIO_AF__PB9_TIM8_CH3 GPIO_AF_10
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#define GPIO_AF__PC6_TIM3_CH1 GPIO_AF_2
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#define GPIO_AF__PC7_TIM3_CH2 GPIO_AF_2
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#define GPIO_AF__PC8_TIM3_CH3 GPIO_AF_2
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#define GPIO_AF__PC9_TIM3_CH4 GPIO_AF_2
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#define GPIO_AF__PC6_TIM8_CH1 GPIO_AF_4
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#define GPIO_AF__PC7_TIM8_CH2 GPIO_AF_4
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#define GPIO_AF__PC8_TIM8_CH3 GPIO_AF_4
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#define GPIO_AF__PC9_TIM8_CH4 GPIO_AF_4
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#define GPIO_AF__PC10_TIM8_CH1N GPIO_AF_4
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#define GPIO_AF__PC11_TIM8_CH2N GPIO_AF_4
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#define GPIO_AF__PC12_TIM8_CH3N GPIO_AF_4
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#define GPIO_AF__PC13_TIM8_CH1N GPIO_AF_4
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#define GPIO_AF__PD3_TIM2_CH1 GPIO_AF_2
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#define GPIO_AF__PD4_TIM2_CH2 GPIO_AF_2
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#define GPIO_AF__PD6_TIM2_CH4 GPIO_AF_2
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#define GPIO_AF__PD7_TIM2_CH3 GPIO_AF_2
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#define GPIO_AF__PD12_TIM4_CH1 GPIO_AF_2
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#define GPIO_AF__PD13_TIM4_CH2 GPIO_AF_2
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#define GPIO_AF__PD14_TIM4_CH3 GPIO_AF_2
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#define GPIO_AF__PD15_TIM4_CH4 GPIO_AF_2
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#define GPIO_AF__PD1_TIM8_CH4 GPIO_AF_4
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#elif defined(STM32F4)
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#define DEF_TIM(tim, chan, pin, flags, out, dmaopt) {\
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tim,\
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IO_TAG(pin),\
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EXPAND(DEF_CHAN_ ## chan),\
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flags,\
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(DEF_CHAN_ ## chan ## _OUTPUT | out),\
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EXPAND(GPIO_AF_## tim),\
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CONCAT(EXPAND(DEF_TIM_DMA_STR_ ## dmaopt ## __ ## tim ## _ ## chan), _STREAM),\
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EXPAND(DEF_TIM_DMA_CHN_ ## dmaopt ## __ ## tim ## _ ## chan),\
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CONCAT(EXPAND(DEF_TIM_DMA_STR_ ## dmaopt ## __ ## tim ## _ ## chan), _HANDLER)\
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}
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#define DEF_DMA_CHANNEL(tim, chan, dmaopt) EXPAND(DEF_TIM_DMA_CHN_ ## dmaopt ## __ ## tim ## _ ## chan)
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#define DEF_DMA_STREAM(tim, chan, dmaopt) CONCAT(EXPAND(DEF_TIM_DMA_STR_ ## dmaopt ## __ ## tim ## _ ## chan), _STREAM)
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#define DEF_DMA_HANDLER(tim, chan, dmaopt) CONCAT(EXPAND(DEF_TIM_DMA_STR_ ## dmaopt ## __ ## tim ## _ ## chan), _HANDLER)
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/* F4 Stream Mappings */
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#define DEF_TIM_DMA_STR_0__TIM1_CH1 DMA2_ST6
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#define DEF_TIM_DMA_STR_1__TIM1_CH1 DMA2_ST1
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#define DEF_TIM_DMA_STR_2__TIM1_CH1 DMA2_ST3
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#define DEF_TIM_DMA_STR_0__TIM1_CH2 DMA2_ST6
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#define DEF_TIM_DMA_STR_1__TIM1_CH2 DMA2_ST2
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#define DEF_TIM_DMA_STR_0__TIM1_CH3 DMA2_ST6
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#define DEF_TIM_DMA_STR_1__TIM1_CH3 DMA2_ST6
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#define DEF_TIM_DMA_STR_0__TIM1_CH4 DMA2_ST4
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#define DEF_TIM_DMA_STR_0__TIM2_CH1 DMA1_ST5
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#define DEF_TIM_DMA_STR_0__TIM2_CH2 DMA1_ST6
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#define DEF_TIM_DMA_STR_0__TIM2_CH3 DMA1_ST1
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#define DEF_TIM_DMA_STR_0__TIM2_CH4 DMA1_ST7
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#define DEF_TIM_DMA_STR_1__TIM2_CH4 DMA1_ST6
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#define DEF_TIM_DMA_STR_0__TIM3_CH1 DMA1_ST4
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#define DEF_TIM_DMA_STR_0__TIM3_CH2 DMA1_ST5
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#define DEF_TIM_DMA_STR_0__TIM3_CH3 DMA1_ST7
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#define DEF_TIM_DMA_STR_0__TIM3_CH4 DMA1_ST2
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#define DEF_TIM_DMA_STR_0__TIM4_CH1 DMA1_ST0
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#define DEF_TIM_DMA_STR_0__TIM4_CH2 DMA1_ST4
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#define DEF_TIM_DMA_STR_0__TIM4_CH3 DMA1_ST7
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#define DEF_TIM_DMA_STR_0__TIM4_CH4 DMA1_ST3
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#define DEF_TIM_DMA_STR_0__TIM5_CH1 DMA1_ST2
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#define DEF_TIM_DMA_STR_0__TIM5_CH2 DMA1_ST4
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#define DEF_TIM_DMA_STR_0__TIM5_CH3 DMA1_ST0
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#define DEF_TIM_DMA_STR_0__TIM5_CH4 DMA1_ST1
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#define DEF_TIM_DMA_STR_1__TIM5_CH4 DMA1_ST3
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#define DEF_TIM_DMA_STR_0__TIM8_CH1 DMA2_ST2
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#define DEF_TIM_DMA_STR_1__TIM8_CH1 DMA2_ST2
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#define DEF_TIM_DMA_STR_0__TIM8_CH2 DMA2_ST3
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#define DEF_TIM_DMA_STR_1__TIM8_CH2 DMA2_ST2
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#define DEF_TIM_DMA_STR_0__TIM8_CH3 DMA2_ST2
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#define DEF_TIM_DMA_STR_0__TIM8_CH4 DMA2_ST7
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#define DEF_TIM_DMA_STR_0__TIM9_CH1 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM9_CH2 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM10_CH1 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM11_CH1 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM12_CH1 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM12_CH2 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM13_CH1 DMA_NONE
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#define DEF_TIM_DMA_STR_0__TIM14_CH1 DMA_NONE
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/* F4 Channel Mappings */
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#define DEF_TIM_DMA_CHN_0__TIM1_CH1 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_1__TIM1_CH1 DMA_Channel_6
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#define DEF_TIM_DMA_CHN_2__TIM1_CH1 DMA_Channel_6
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#define DEF_TIM_DMA_CHN_0__TIM1_CH2 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_1__TIM1_CH2 DMA_Channel_6
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#define DEF_TIM_DMA_CHN_0__TIM1_CH3 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_1__TIM1_CH3 DMA_Channel_6
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#define DEF_TIM_DMA_CHN_0__TIM1_CH4 DMA_Channel_6
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#define DEF_TIM_DMA_CHN_0__TIM2_CH1 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM2_CH2 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM2_CH3 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM2_CH4 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_1__TIM2_CH4 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM3_CH1 DMA_Channel_5
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#define DEF_TIM_DMA_CHN_0__TIM3_CH2 DMA_Channel_5
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#define DEF_TIM_DMA_CHN_0__TIM3_CH3 DMA_Channel_5
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#define DEF_TIM_DMA_CHN_0__TIM3_CH4 DMA_Channel_5
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#define DEF_TIM_DMA_CHN_0__TIM4_CH1 DMA_Channel_2
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#define DEF_TIM_DMA_CHN_0__TIM4_CH2 DMA_Channel_2
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#define DEF_TIM_DMA_CHN_0__TIM4_CH3 DMA_Channel_2
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#define DEF_TIM_DMA_CHN_0__TIM4_CH4 DMA_Channel_2
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#define DEF_TIM_DMA_CHN_0__TIM5_CH1 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM5_CH2 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM5_CH3 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM5_CH4 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_1__TIM5_CH4 DMA_Channel_3
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#define DEF_TIM_DMA_CHN_0__TIM8_CH1 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_1__TIM8_CH1 DMA_Channel_7
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#define DEF_TIM_DMA_CHN_0__TIM8_CH2 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_1__TIM8_CH2 DMA_Channel_7
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#define DEF_TIM_DMA_CHN_0__TIM8_CH3 DMA_Channel_0
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#define DEF_TIM_DMA_CHN_0__TIM8_CH4 DMA_Channel_7
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#define DEF_TIM_DMA_CHN_0__TIM9_CH1 0
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#define DEF_TIM_DMA_CHN_0__TIM9_CH2 0
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#define DEF_TIM_DMA_CHN_0__TIM10_CH1 0
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#define DEF_TIM_DMA_CHN_0__TIM11_CH1 0
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#define DEF_TIM_DMA_CHN_0__TIM12_CH1 0
|
||||
#define DEF_TIM_DMA_CHN_0__TIM12_CH2 0
|
||||
|
||||
#define DEF_TIM_DMA_CHN_0__TIM13_CH1 0
|
||||
|
||||
#define DEF_TIM_DMA_CHN_0__TIM14_CH1 0
|
||||
|
||||
#define DMA1_ST0_STREAM DMA1_Stream0
|
||||
#define DMA1_ST1_STREAM DMA1_Stream1
|
||||
#define DMA1_ST2_STREAM DMA1_Stream2
|
||||
#define DMA1_ST3_STREAM DMA1_Stream3
|
||||
#define DMA1_ST4_STREAM DMA1_Stream4
|
||||
#define DMA1_ST5_STREAM DMA1_Stream5
|
||||
#define DMA1_ST6_STREAM DMA1_Stream6
|
||||
#define DMA1_ST7_STREAM DMA1_Stream7
|
||||
#define DMA2_ST0_STREAM DMA2_Stream0
|
||||
#define DMA2_ST1_STREAM DMA2_Stream1
|
||||
#define DMA2_ST2_STREAM DMA2_Stream2
|
||||
#define DMA2_ST3_STREAM DMA2_Stream3
|
||||
#define DMA2_ST4_STREAM DMA2_Stream4
|
||||
#define DMA2_ST5_STREAM DMA2_Stream5
|
||||
#define DMA2_ST6_STREAM DMA2_Stream6
|
||||
#define DMA2_ST7_STREAM DMA2_Stream7
|
||||
|
||||
#endif
|
||||
|
||||
/**** Common Defines across all targets ****/
|
||||
#define DMA_NONE_CHANNEL NULL
|
||||
#define DMA_NONE_STREAM NULL
|
||||
|
||||
|
||||
#define DEF_TIM_CHAN(chan) DEF_CHAN_ ## chan
|
||||
#define DEF_TIM_OUTPUT(chan, out) ( DEF_CHAN_ ## chan ## _OUTPUT | out )
|
||||
|
||||
#define DMA_NONE_HANDLER 0
|
||||
|
||||
#define DEF_CHAN_CH1 TIM_Channel_1
|
||||
#define DEF_CHAN_CH2 TIM_Channel_2
|
||||
#define DEF_CHAN_CH3 TIM_Channel_3
|
||||
#define DEF_CHAN_CH4 TIM_Channel_4
|
||||
#define DEF_CHAN_CH1N TIM_Channel_1
|
||||
#define DEF_CHAN_CH2N TIM_Channel_2
|
||||
#define DEF_CHAN_CH3N TIM_Channel_3
|
||||
#define DEF_CHAN_CH4N TIM_Channel_4
|
||||
|
||||
#define DEF_CHAN_CH1_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH2_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH3_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH4_OUTPUT TIMER_OUTPUT_NONE
|
||||
#define DEF_CHAN_CH1N_OUTPUT TIMER_OUTPUT_N_CHANNEL
|
||||
#define DEF_CHAN_CH2N_OUTPUT TIMER_OUTPUT_N_CHANNEL
|
||||
#define DEF_CHAN_CH3N_OUTPUT TIMER_OUTPUT_N_CHANNEL
|
||||
#define DEF_CHAN_CH4N_OUTPUT TIMER_OUTPUT_N_CHANNEL
|
||||
|
|
@ -22,6 +22,9 @@
|
|||
#include "drivers/timer.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
#include "drivers/timer_def.h"
|
||||
|
||||
/*
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM8, IO_TAG(PC7), TIM_Channel_2, TIM_USE_PPM, 0, GPIO_AF_TIM8, NULL, 0, 0 }, // PPM IN
|
||||
{ TIM5, IO_TAG(PA0), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_TIM5, DMA1_Stream2, DMA_Channel_6, DMA1_ST2_HANDLER }, // S1_OUT
|
||||
|
|
@ -31,4 +34,15 @@ const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
|||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR | TIM_USE_LED, 1, GPIO_AF_TIM3, DMA1_Stream2, DMA_Channel_5, DMA1_ST2_HANDLER }, // S5_OUT
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_TIM3, DMA1_Stream7, DMA_Channel_5, DMA1_ST7_HANDLER }, // S6_OUT
|
||||
};
|
||||
*/
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_PPM, 0, 0 ), // PPM IN
|
||||
DEF_TIM(TIM5, CH1, PA0, TIM_USE_MOTOR, 0, 0 ), // S1_OUT
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, 0, 0 ), // S2_OUT
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, 0, 0 ), // S3_OUT
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_MOTOR, 0, 0 ), // S4_OUT
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR | TIM_USE_LED, 0, 0 ), // S5_OUT
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 0, 0 ), // S6_OUT
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -22,16 +22,17 @@
|
|||
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/dma.h"
|
||||
#include "drivers/timer_def.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM1, IO_TAG(PA8), TIM_Channel_1, TIM_USE_PPM, 0, GPIO_AF_6 , NULL, 0 }, // PWM1 - PA8
|
||||
{ TIM4, IO_TAG(PB8), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0 }, // PWM2 - PB8
|
||||
{ TIM4, IO_TAG(PB9), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0 }, // PWM3 - PB9
|
||||
{ TIM2, IO_TAG(PA10), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_10, NULL, 0 }, // PMW4 - PA10
|
||||
{ TIM2, IO_TAG(PA9), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_10, NULL, 0 }, // PWM5 - PA9
|
||||
{ TIM2, IO_TAG(PA0), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_1 , NULL, 0 }, // PWM6 - PA0
|
||||
{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_1 , NULL, 0 }, // PWM7 - PA1
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0 }, // PWM8 - PB1
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0 }, // PWM9 - PB0
|
||||
{ TIM16, IO_TAG(PA6), TIM_Channel_1, TIM_USE_LED, 1, GPIO_AF_1, DMA1_Channel3, DMA1_CH3_HANDLER }, // PWM9 - PB0
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_PPM, 0), // PWM1 - PA8
|
||||
DEF_TIM(TIM4, CH3, PB8, TIM_USE_MOTOR, 1), // PWM2 - PB8
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_MOTOR, 1), // PWM3 - PB9
|
||||
DEF_TIM(TIM2, CH4, PA10, TIM_USE_MOTOR, 1), // PMW4 - PA10
|
||||
DEF_TIM(TIM2, CH3, PA9, TIM_USE_MOTOR, 1), // PWM5 - PA9
|
||||
DEF_TIM(TIM2, CH1, PA0, TIM_USE_MOTOR, 1), // PWM6 - PA0
|
||||
DEF_TIM(TIM2, CH2, PA1, TIM_USE_MOTOR, 1), // PWM7 - PA1
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 1), // PWM8 - PB1
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, 1), // PWM9 - PB0
|
||||
DEF_TIM(TIM16, CH1, PA6, TIM_USE_LED, 1), // PWM9 - PB0
|
||||
};
|
||||
|
|
|
|||
|
|
@ -124,6 +124,7 @@
|
|||
#define ENSURE_MPU_DATA_READY_IS_LOW
|
||||
|
||||
#define LED_STRIP
|
||||
#define USE_DSHOT
|
||||
|
||||
#define DEFAULT_RX_FEATURE FEATURE_RX_PPM
|
||||
|
||||
|
|
|
|||
|
|
@ -21,18 +21,19 @@
|
|||
#include "drivers/io.h"
|
||||
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/timer_def.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM3, IO_TAG(PA4), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM1 - PA4 - *TIM3_CH2
|
||||
{ TIM3, IO_TAG(PA6), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM2 - PA6 - *TIM3_CH1, TIM8_BKIN, TIM1_BKIN, TIM16_CH1
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM3 - PB0 - *TIM3_CH3, TIM1_CH2N, TIM8_CH2N
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM4 - PB1 - *TIM3_CH4, TIM1_CH3N, TIM8_CH3N
|
||||
{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // PWM5 - PA1 - *TIM2_CH2, TIM15_CH1N
|
||||
{ TIM2, IO_TAG(PA2), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // PWM6 - PA2 - *TIM2_CH3, !TIM15_CH1
|
||||
{ TIM15, IO_TAG(PA3), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_9, NULL, 0 }, // PWM7 - PA3 - *TIM15_CH2, TIM2_CH4
|
||||
{ TIM1, IO_TAG(PA8), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_6, NULL, 0 }, // PWM8 - PA8 - *TIM1_CH1, TIM4_ETR
|
||||
{ TIM17, IO_TAG(PA7), TIM_Channel_1, TIM_USE_PPM, 0, GPIO_AF_1, NULL, 0 }, // PPM - PA7 - *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
{ TIM16, IO_TAG(PB8), TIM_Channel_1, TIM_USE_LED, 0, GPIO_AF_1, DMA1_Channel3, DMA1_CH3_HANDLER }, // PPM - PA7 - *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
DEF_TIM(TIM3, CH2, PA4, TIM_USE_MOTOR, 1 ), // PWM1 - PA4 - *TIM3_CH2
|
||||
DEF_TIM(TIM3, CH1, PA6, TIM_USE_MOTOR, 1 ), // PWM2 - PA6 - *TIM3_CH1, TIM8_BKIN, TIM1_BKIN, TIM16_CH1
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 1 ), // PWM3 - PB0 - *TIM3_CH3, TIM1_CH2N, TIM8_CH2N
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, 1 ), // PWM4 - PB1 - *TIM3_CH4, TIM1_CH3N, TIM8_CH3N
|
||||
DEF_TIM(TIM2, CH2, PA1, TIM_USE_MOTOR, 1 ), // PWM5 - PA1 - *TIM2_CH2, TIM15_CH1N
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, 1 ), // PWM6 - PA2 - *TIM2_CH3, !TIM15_CH1
|
||||
DEF_TIM(TIM15, CH2, PA3, TIM_USE_MOTOR, 1 ), // PWM7 - PA3 - *TIM15_CH2, TIM2_CH4
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR, 1 ), // PWM8 - PA8 - *TIM1_CH1, TIM4_ETR
|
||||
DEF_TIM(TIM17, CH1, PA7, TIM_USE_PPM, 0 ), // PPM - PA7 - *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
DEF_TIM(TIM16, CH1, PB8, TIM_USE_LED, 0 ), // PPM - PA7 - *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -102,6 +102,7 @@
|
|||
#define RSSI_ADC_PIN PB2
|
||||
|
||||
#define LED_STRIP
|
||||
#define USE_DSHOT
|
||||
|
||||
#define SPEKTRUM_BIND
|
||||
// USART2, PB4
|
||||
|
|
|
|||
|
|
@ -21,24 +21,25 @@
|
|||
#include "drivers/io.h"
|
||||
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/timer_def.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM2, IO_TAG(PA0), TIM_Channel_1, TIM_USE_PWM | TIM_USE_PPM, 0, GPIO_AF_1, NULL, 0}, // RC_CH1 - PA0 - *TIM2_CH1
|
||||
{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM_USE_PWM, 0, GPIO_AF_1 , NULL, 0}, // RC_CH2 - PA1 - *TIM2_CH2, TIM15_CH1N
|
||||
{ TIM2, IO_TAG(PB11), TIM_Channel_4, TIM_USE_PWM, 0, GPIO_AF_1 , NULL, 0}, // RC_CH3 - PB11 - *TIM2_CH4, UART3_RX (AF7)
|
||||
{ TIM2, IO_TAG(PB10), TIM_Channel_3, TIM_USE_PWM, 0, GPIO_AF_1 , NULL, 0}, // RC_CH4 - PB10 - *TIM2_CH3, UART3_TX (AF7)
|
||||
{ TIM3, IO_TAG(PB4), TIM_Channel_1, TIM_USE_PWM, 0, GPIO_AF_2 , NULL, 0}, // RC_CH5 - PB4 - *TIM3_CH1
|
||||
{ TIM3, IO_TAG(PB5), TIM_Channel_2, TIM_USE_PWM, 0, GPIO_AF_2 , NULL, 0}, // RC_CH6 - PB5 - *TIM3_CH2
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_PWM, 0, GPIO_AF_2 , NULL, 0}, // RC_CH7 - PB0 - *TIM3_CH3, TIM1_CH2N, TIM8_CH2N
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_PWM, 0, GPIO_AF_2 , NULL, 0}, // RC_CH8 - PB1 - *TIM3_CH4, TIM1_CH3N, TIM8_CH3N
|
||||
{ TIM16, IO_TAG(PA6), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_1 , NULL, 0}, // PWM1 - PA6 - TIM3_CH1, TIM8_BKIN, TIM1_BKIN, *TIM16_CH1
|
||||
{ TIM17, IO_TAG(PA7), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_1 , NULL, 0}, // PWM2 - PA7 - TIM3_CH2, *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
{ TIM4, IO_TAG(PA11), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_10, NULL, 0}, // PWM3 - PA11
|
||||
{ TIM4, IO_TAG(PA12), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_10, NULL, 0}, // PWM4 - PA12
|
||||
{ TIM4, IO_TAG(PB8), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0}, // PWM5 - PB8
|
||||
{ TIM4, IO_TAG(PB9), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_2 , NULL, 0}, // PWM6 - PB9
|
||||
{ TIM15, IO_TAG(PA2), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_9 , NULL, 0}, // PWM7 - PA2
|
||||
{ TIM15, IO_TAG(PA3), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_9 , NULL, 0}, // PWM8 - PA3
|
||||
{ TIM1, IO_TAG(PA8), TIM_Channel_1, TIM_USE_MOTOR | TIM_USE_LED, 1, GPIO_AF_6, DMA1_Channel2, DMA1_CH2_HANDLER }, // GPIO_TIMER / LED_STRIP
|
||||
DEF_TIM(TIM2, CH1, PA0, TIM_USE_PWM | TIM_USE_PPM, 0 ), // RC_CH1 - PA0 - *TIM2_CH1
|
||||
DEF_TIM(TIM2, CH2, PA1, TIM_USE_PWM, 0 ), // RC_CH2 - PA1 - *TIM2_CH2, TIM15_CH1N
|
||||
DEF_TIM(TIM2, CH4, PB11, TIM_USE_PWM, 0 ), // RC_CH3 - PB11 - *TIM2_CH4, UART3_RX (AF7)
|
||||
DEF_TIM(TIM2, CH3, PB10, TIM_USE_PWM, 0 ), // RC_CH4 - PB10 - *TIM2_CH3, UART3_TX (AF7)
|
||||
DEF_TIM(TIM3, CH1, PB4, TIM_USE_PWM, 0 ), // RC_CH5 - PB4 - *TIM3_CH1
|
||||
DEF_TIM(TIM3, CH2, PB5, TIM_USE_PWM, 0 ), // RC_CH6 - PB5 - *TIM3_CH2
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_PWM, 0 ), // RC_CH7 - PB0 - *TIM3_CH3, TIM1_CH2N, TIM8_CH2N
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_PWM, 0 ), // RC_CH8 - PB1 - *TIM3_CH4, TIM1_CH3N, TIM8_CH3N
|
||||
DEF_TIM(TIM16, CH1, PA6, TIM_USE_MOTOR, 1 ), // PWM1 - PA6 - TIM3_CH1, TIM8_BKIN, TIM1_BKIN, *TIM16_CH1
|
||||
DEF_TIM(TIM17, CH1, PA7, TIM_USE_MOTOR, 1 ), // PWM2 - PA7 - TIM3_CH2, *TIM17_CH1, TIM1_CH1N, TIM8_CH1
|
||||
DEF_TIM(TIM4, CH1, PA11, TIM_USE_MOTOR, 1 ), // PWM3 - PA11
|
||||
DEF_TIM(TIM4, CH2, PA12, TIM_USE_MOTOR, 1 ), // PWM4 - PA12
|
||||
DEF_TIM(TIM4, CH3, PB8, TIM_USE_MOTOR, 1 ), // PWM5 - PB8
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_MOTOR, 1 ), // PWM6 - PB9
|
||||
DEF_TIM(TIM15, CH1, PA2, TIM_USE_MOTOR, 1 ), // PWM7 - PA2
|
||||
DEF_TIM(TIM15, CH2, PA3, TIM_USE_MOTOR, 1 ), // PWM8 - PA3
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR | TIM_USE_LED, 1 ), // GPIO_TIMER / LED_STRIP
|
||||
};
|
||||
|
|
|
|||
|
|
@ -95,6 +95,7 @@
|
|||
#define RSSI_ADC_PIN PB2
|
||||
|
||||
#define LED_STRIP
|
||||
#define USE_DSHOT
|
||||
|
||||
#undef GPS
|
||||
|
||||
|
|
|
|||
|
|
@ -20,19 +20,20 @@
|
|||
#include <platform.h>
|
||||
#include "drivers/io.h"
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/timer_def.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM12, IO_TAG(PB14), TIM_Channel_1, TIM_USE_PWM | TIM_USE_PPM, 0, GPIO_AF_TIM12, NULL, 0, 0 }, // PPM (5th pin on FlexiIO port)
|
||||
{ TIM12, IO_TAG(PB15), TIM_Channel_2, TIM_USE_PWM, 0, GPIO_AF_TIM12, NULL, 0, 0 }, // S2_IN - GPIO_PartialRemap_TIM3
|
||||
{ TIM8, IO_TAG(PC6), TIM_Channel_1, TIM_USE_PWM, 0, GPIO_AF_TIM8 , NULL, 0, 0 }, // S3_IN
|
||||
{ TIM8, IO_TAG(PC7), TIM_Channel_2, TIM_USE_PWM, 0, GPIO_AF_TIM8 , NULL, 0, 0 }, // S4_IN
|
||||
{ TIM8, IO_TAG(PC8), TIM_Channel_3, TIM_USE_PWM, 0, GPIO_AF_TIM8 , NULL, 0, 0 }, // S5_IN
|
||||
{ TIM8, IO_TAG(PC9), TIM_Channel_4, TIM_USE_PWM, 0, GPIO_AF_TIM8 , NULL, 0, 0 }, // S6_IN
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_TIM3 , NULL, 0, 0 }, // S1_OUT
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_TIM3 , NULL, 0, 0 }, // S2_OUT
|
||||
{ TIM9, IO_TAG(PA3), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_TIM9 , NULL, 0, 0 }, // S3_OUT
|
||||
{ TIM2, IO_TAG(PA2), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_TIM2 , NULL, 0, 0 }, // S4_OUT
|
||||
{ TIM5, IO_TAG(PA1), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_TIM5, NULL, 0, 0 }, // S5_OUT - GPIO_PartialRemap_TIM3
|
||||
{ TIM5, IO_TAG(PA0), TIM_Channel_1, TIM_USE_MOTOR | TIM_USE_LED, 1, GPIO_AF_TIM5 , DMA1_Stream2, DMA_Channel_6, DMA1_ST2_HANDLER }, // S6_OUT
|
||||
DEF_TIM(TIM12, CH1, PB14, TIM_USE_PWM | TIM_USE_PPM, 0, 0 ), // PPM (5th pin on FlexiIO port)
|
||||
DEF_TIM(TIM12, CH2, PB15, TIM_USE_PWM, 0, 0 ), // S2_IN - GPIO_PartialRemap_TIM3
|
||||
DEF_TIM(TIM8, CH1, PC6, TIM_USE_PWM, 0, 0 ), // S3_IN
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_PWM, 0, 0 ), // S4_IN
|
||||
DEF_TIM(TIM8, CH3, PC8, TIM_USE_PWM, 0, 0 ), // S5_IN
|
||||
DEF_TIM(TIM8, CH4, PC9, TIM_USE_PWM, 0, 0 ), // S6_IN
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 1, 0 ), // S1_OUT
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, 1, 0 ), // S2_OUT
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_MOTOR, 1, 0 ), // S3_OUT
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, 1, 0 ), // S4_OUT
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, 1, 0 ), // S5_OUT - GPIO_PartialRemap_TIM3
|
||||
DEF_TIM(TIM5, CH1, PA0, TIM_USE_MOTOR | TIM_USE_LED, 1, 0 ), // S6_OUT
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||||
};
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||||
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@ -104,6 +104,7 @@
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|||
#define SERIALRX_PROVIDER SERIALRX_SBUS
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||||
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||||
#define LED_STRIP
|
||||
#define USE_DSHOT
|
||||
|
||||
#define SPEKTRUM_BIND
|
||||
// USART3,
|
||||
|
|
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|||
|
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@ -21,18 +21,20 @@
|
|||
#include "drivers/io.h"
|
||||
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/timer_def.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
{ TIM8, IO_TAG(PC7), TIM_Channel_2, TIM_USE_PWM | TIM_USE_PPM, 0, GPIO_AF_TIM8 }, // PPM IN
|
||||
{ TIM12, IO_TAG(PB14), TIM_Channel_1, TIM_USE_PWM, 0, GPIO_AF_TIM12 }, // S2_IN
|
||||
{ TIM12, IO_TAG(PB15), TIM_Channel_2, TIM_USE_PWM, 0, GPIO_AF_TIM12 }, // S3_IN - GPIO_PartialRemap_TIM3
|
||||
{ TIM8, IO_TAG(PC8), TIM_Channel_3, TIM_USE_PWM, 0, GPIO_AF_TIM8 }, // S4_IN
|
||||
{ TIM8, IO_TAG(PC9), TIM_Channel_4, TIM_USE_PWM, 0, GPIO_AF_TIM8 }, // S5_IN
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_TIM3 }, // S1_OUT
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_TIM3 }, // S2_OUT
|
||||
{ TIM9, IO_TAG(PA3), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_TIM9 }, // S3_OUT
|
||||
{ TIM2, IO_TAG(PA2), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_TIM2 }, // S4_OUT
|
||||
{ TIM5, IO_TAG(PA1), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_TIM5 }, // S5_OUT - GPIO_PartialRemap_TIM3
|
||||
{ TIM5, IO_TAG(PA0), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_TIM5 }, // S6_OUT
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_PWM | TIM_USE_PPM, 0, 0 ), // PPM IN
|
||||
DEF_TIM(TIM12, CH1, PB14, TIM_USE_PWM, 0, 0 ), // S2_IN
|
||||
DEF_TIM(TIM12, CH2, PB15, TIM_USE_PWM, 0, 0 ), // S3_IN - GPIO_PartialRemap_TIM3
|
||||
DEF_TIM(TIM8, CH3, PC8, TIM_USE_PWM, 0, 0 ), // S4_IN
|
||||
DEF_TIM(TIM8, CH4, PC9, TIM_USE_PWM, 0, 0 ), // S5_IN
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 1, 0 ), // S1_OUT
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, 1, 0 ), // S2_OUT
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_MOTOR, 1, 0 ), // S3_OUT
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, 1, 0 ), // S4_OUT
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, 1, 0 ), // S5_OUT - GPIO_PartialRemap_TIM3
|
||||
DEF_TIM(TIM5, CH1, PA0, TIM_USE_MOTOR, 1, 0 ), // S6_OUT
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -32,10 +32,11 @@
|
|||
#define BEEPER PC9
|
||||
#define BEEPER_INVERTED
|
||||
|
||||
|
||||
#define INVERTER PC6
|
||||
#define INVERTER_USART USART6
|
||||
|
||||
#define USE_DSHOT
|
||||
|
||||
// MPU9250 interrupt
|
||||
#define USE_EXTI
|
||||
#define MPU_INT_EXTI PC5
|
||||
|
|
|
|||
|
|
@ -21,20 +21,21 @@
|
|||
#include "drivers/io.h"
|
||||
|
||||
#include "drivers/timer.h"
|
||||
#include "drivers/timer_def.h"
|
||||
#include "drivers/dma.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
// PPM / UART2 RX
|
||||
{ TIM8, IO_TAG(PA15), TIM_Channel_1, TIM_USE_PPM, 0, GPIO_AF_2, NULL, 0 }, // PPM
|
||||
{ TIM2, IO_TAG(PA0), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // PWM1
|
||||
{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // PWM2
|
||||
{ TIM15, IO_TAG(PA2), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_9, NULL, 0 }, // PWM3
|
||||
{ TIM15, IO_TAG(PA3), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_9, NULL, 0 }, // PWM4
|
||||
{ TIM3, IO_TAG(PA6), TIM_Channel_1, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM5
|
||||
{ TIM3, IO_TAG(PA7), TIM_Channel_2, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM6
|
||||
{ TIM3, IO_TAG(PB0), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM7
|
||||
{ TIM3, IO_TAG(PB1), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_2, NULL, 0 }, // PWM8
|
||||
{ TIM2, IO_TAG(PB10), TIM_Channel_3, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // RC_CH4 - PB10 - *TIM2_CH3, UART3_TX (AF7)
|
||||
{ TIM2, IO_TAG(PB11), TIM_Channel_4, TIM_USE_MOTOR, 1, GPIO_AF_1, NULL, 0 }, // RC_CH3 - PB11 - *TIM2_CH4, UART3_RX (AF7)
|
||||
{ TIM1, IO_TAG(PA8), TIM_Channel_1, TIM_USE_LED, 1, GPIO_AF_6, DMA1_Channel2, DMA1_CH2_HANDLER }, // GPIO_TIMER / LED_STRIP
|
||||
DEF_TIM(TIM8, CH1, PA15, TIM_USE_PPM, 0 ), // PPM
|
||||
DEF_TIM(TIM2, CH1, PA0, TIM_USE_MOTOR, 1 ), // PWM1
|
||||
DEF_TIM(TIM2, CH2, PA1, TIM_USE_MOTOR, 1 ), // PWM2
|
||||
DEF_TIM(TIM15, CH1, PA2, TIM_USE_MOTOR, 1 ), // PWM3
|
||||
DEF_TIM(TIM15, CH2, PA3, TIM_USE_MOTOR, 1 ), // PWM4
|
||||
DEF_TIM(TIM3, CH1, PA6, TIM_USE_MOTOR, 1 ), // PWM5
|
||||
DEF_TIM(TIM3, CH2, PA7, TIM_USE_MOTOR, 1 ), // PWM6
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, 1 ), // PWM7
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, 1 ), // PWM8
|
||||
DEF_TIM(TIM2, CH3, PB10, TIM_USE_MOTOR, 1 ), // RC_CH4 - PB10 - *TIM2_CH3, UART3_TX (AF7)
|
||||
DEF_TIM(TIM2, CH4, PB11, TIM_USE_MOTOR, 1 ), // RC_CH3 - PB11 - *TIM2_CH4, UART3_RX (AF7)
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_LED, 1 ), // GPIO_TIMER / LED_STRIP
|
||||
};
|
||||
|
|
|
|||
|
|
@ -35,6 +35,7 @@
|
|||
#define USE_MAG_DATA_READY_SIGNAL
|
||||
#define ENSURE_MAG_DATA_READY_IS_HIGH
|
||||
|
||||
#define USE_DSHOT
|
||||
|
||||
#define GYRO
|
||||
#define USE_GYRO_SPI_MPU6500
|
||||
|
|
|
|||
Loading…
Reference in New Issue