Fix F3 DMA request mapping when using `USE_DMA_SPEC`. (#8774)

Fix F3 DMA request mapping when using `USE_DMA_SPEC`.
This commit is contained in:
Michael Keller 2019-10-22 00:06:52 +13:00 committed by GitHub
commit 46bfda2038
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4 changed files with 36 additions and 20 deletions

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@ -292,36 +292,41 @@ static const dmaTimerMapping_t dmaTimerMapping[] = {
// The embedded ADC24_DMA_REMAP conditional should be removed // The embedded ADC24_DMA_REMAP conditional should be removed
// when (and if) F3 is going generic. // when (and if) F3 is going generic.
#define DMA(d, c) { DMA_CODE(d, 0, c), (dmaResource_t *)DMA ## d ## _Channel ## c } #define DMA(d, c) { DMA_CODE(d, 0, c), (dmaResource_t *)DMA ## d ## _Channel ## c }
static const dmaPeripheralMapping_t dmaPeripheralMapping[17] = { static const dmaPeripheralMapping_t dmaPeripheralMapping[18] = {
#ifdef USE_SPI #ifdef USE_SPI
{ DMA_PERIPH_SPI_TX, 1, { DMA(1, 3) } }, { DMA_PERIPH_SPI_TX, SPIDEV_1, { DMA(1, 3) } },
{ DMA_PERIPH_SPI_RX, 1, { DMA(1, 2) } }, { DMA_PERIPH_SPI_RX, SPIDEV_1, { DMA(1, 2) } },
{ DMA_PERIPH_SPI_TX, 2, { DMA(1, 5) } }, { DMA_PERIPH_SPI_TX, SPIDEV_2, { DMA(1, 5) } },
{ DMA_PERIPH_SPI_RX, 2, { DMA(1, 4) } }, { DMA_PERIPH_SPI_RX, SPIDEV_2, { DMA(1, 4) } },
{ DMA_PERIPH_SPI_TX, 3, { DMA(2, 2) } }, { DMA_PERIPH_SPI_TX, SPIDEV_3, { DMA(2, 2) } },
{ DMA_PERIPH_SPI_RX, 3, { DMA(2, 1) } }, { DMA_PERIPH_SPI_RX, SPIDEV_3, { DMA(2, 1) } },
#endif #endif
#ifdef USE_ADC #ifdef USE_ADC
{ DMA_PERIPH_ADC, 1, { DMA(1, 1) } }, { DMA_PERIPH_ADC, ADCDEV_1, { DMA(1, 1) } },
#ifdef ADC24_DMA_REMAP #ifdef ADC24_DMA_REMAP
{ DMA_PERIPH_ADC, 2, { DMA(2, 3) } }, { DMA_PERIPH_ADC, ADCDEV_2, { DMA(2, 3) } },
#else #else
{ DMA_PERIPH_ADC, 2, { DMA(2, 1) } }, { DMA_PERIPH_ADC, ADCDEV_2, { DMA(2, 1) } },
#endif
{ DMA_PERIPH_ADC, ADCDEV_3, { DMA(2, 5) } },
#ifdef ADC24_DMA_REMAP
{ DMA_PERIPH_ADC, ADCDEV_4, { DMA(2, 4) } },
#else
{ DMA_PERIPH_ADC, ADCDEV_4, { DMA(2, 2) } },
#endif #endif
{ DMA_PERIPH_ADC, 3, { DMA(2, 5) } },
#endif #endif
#ifdef USE_UART #ifdef USE_UART
{ DMA_PERIPH_UART_TX, 1, { DMA(1, 4) } }, { DMA_PERIPH_UART_TX, UARTDEV_1, { DMA(1, 4) } },
{ DMA_PERIPH_UART_RX, 1, { DMA(1, 5) } }, { DMA_PERIPH_UART_RX, UARTDEV_1, { DMA(1, 5) } },
{ DMA_PERIPH_UART_TX, 2, { DMA(1, 7) } }, { DMA_PERIPH_UART_TX, UARTDEV_2, { DMA(1, 7) } },
{ DMA_PERIPH_UART_RX, 2, { DMA(1, 6) } }, { DMA_PERIPH_UART_RX, UARTDEV_2, { DMA(1, 6) } },
{ DMA_PERIPH_UART_TX, 3, { DMA(1, 2) } }, { DMA_PERIPH_UART_TX, UARTDEV_3, { DMA(1, 2) } },
{ DMA_PERIPH_UART_RX, 3, { DMA(1, 3) } }, { DMA_PERIPH_UART_RX, UARTDEV_3, { DMA(1, 3) } },
{ DMA_PERIPH_UART_TX, 4, { DMA(2, 5) } }, { DMA_PERIPH_UART_TX, UARTDEV_4, { DMA(2, 5) } },
{ DMA_PERIPH_UART_RX, 4, { DMA(2, 3) } }, { DMA_PERIPH_UART_RX, UARTDEV_4, { DMA(2, 3) } },
}; };
#endif #endif

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@ -39,12 +39,17 @@ PG_REGISTER_WITH_RESET_FN(adcConfig_t, adcConfig, PG_ADC_CONFIG, 0);
void pgResetFn_adcConfig(adcConfig_t *adcConfig) void pgResetFn_adcConfig(adcConfig_t *adcConfig)
{ {
STATIC_ASSERT(MAX_ADC_SUPPORTED <= ADC_DEV_TO_CFG(ADCDEV_COUNT) || MAX_ADC_SUPPORTED != 4, adc_count_mismatch);
adcConfig->device = ADC_DEV_TO_CFG(adcDeviceByInstance(ADC_INSTANCE)); adcConfig->device = ADC_DEV_TO_CFG(adcDeviceByInstance(ADC_INSTANCE));
adcConfig->dmaopt[ADCDEV_1] = ADC1_DMA_OPT; adcConfig->dmaopt[ADCDEV_1] = ADC1_DMA_OPT;
#ifndef STM32F1 #ifndef STM32F1
adcConfig->dmaopt[ADCDEV_2] = ADC2_DMA_OPT; adcConfig->dmaopt[ADCDEV_2] = ADC2_DMA_OPT;
adcConfig->dmaopt[ADCDEV_3] = ADC3_DMA_OPT; adcConfig->dmaopt[ADCDEV_3] = ADC3_DMA_OPT;
#endif #endif
#ifdef STM32F3
adcConfig->dmaopt[ADCDEV_4] = ADC4_DMA_OPT;
#endif
#ifdef VBAT_ADC_PIN #ifdef VBAT_ADC_PIN
adcConfig->vbat.enabled = true; adcConfig->vbat.enabled = true;

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@ -24,8 +24,11 @@
#include <stdbool.h> #include <stdbool.h>
#include "pg/pg.h" #include "pg/pg.h"
#include "drivers/adc.h"
#include "drivers/io_types.h" #include "drivers/io_types.h"
#define MAX_ADC_SUPPORTED 4
typedef struct adcChannelConfig_t { typedef struct adcChannelConfig_t {
bool enabled; bool enabled;
ioTag_t ioTag; ioTag_t ioTag;
@ -42,7 +45,7 @@ typedef struct adcConfig_s {
uint16_t tempSensorCalibration1; uint16_t tempSensorCalibration1;
uint16_t tempSensorCalibration2; uint16_t tempSensorCalibration2;
uint8_t dmaopt[3]; // One per ADCDEV_x int8_t dmaopt[MAX_ADC_SUPPORTED]; // One per ADCDEV_x
} adcConfig_t; } adcConfig_t;
PG_DECLARE(adcConfig_t, adcConfig); PG_DECLARE(adcConfig_t, adcConfig);

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@ -522,6 +522,9 @@
#if !defined(ADC3_DMA_OPT) #if !defined(ADC3_DMA_OPT)
#define ADC3_DMA_OPT (-1) #define ADC3_DMA_OPT (-1)
#endif #endif
#if !defined(ADC4_DMA_OPT)
#define ADC4_DMA_OPT (-1)
#endif
#endif // USE_ADC #endif // USE_ADC