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F7 uart TX IT

This commit is contained in:
Sami Korhonen 2017-08-30 11:45:06 +03:00
parent 66985c5665
commit 4715fde21d
2 changed files with 58 additions and 35 deletions
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3
src/main/drivers/serial_uart_hal.c
View File

@ -176,7 +176,8 @@ void uartReconfigure(uartPort_t *uartPort)
__HAL_DMA_SET_COUNTER(&uartPort->txDMAHandle, 0); __HAL_DMA_SET_COUNTER(&uartPort->txDMAHandle, 0);
} else { } else {
__HAL_UART_ENABLE_IT(&uartPort->Handle, UART_IT_TXE); /* Enable the UART Transmit Data Register Empty Interrupt */
SET_BIT(uartPort->USARTx->CR1, USART_CR1_TXEIE);
} }
} }
return; return;

74
src/main/drivers/serial_uart_stm32f7xx.c
View File

@ -47,7 +47,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART1_RX_DMA #ifdef USE_UART1_RX_DMA
.rxDMAStream = DMA2_Stream5, .rxDMAStream = DMA2_Stream5,
#endif #endif
#ifdef USE_UART1_TX_DMA
.txDMAStream = DMA2_Stream7, .txDMAStream = DMA2_Stream7,
#endif
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
.af = GPIO_AF7_USART1, .af = GPIO_AF7_USART1,
@ -70,7 +72,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART2_RX_DMA #ifdef USE_UART2_RX_DMA
.rxDMAStream = DMA1_Stream5, .rxDMAStream = DMA1_Stream5,
#endif #endif
#ifdef USE_UART2_TX_DMA
.txDMAStream = DMA1_Stream6, .txDMAStream = DMA1_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
.af = GPIO_AF7_USART2, .af = GPIO_AF7_USART2,
@ -93,7 +97,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART3_RX_DMA #ifdef USE_UART3_RX_DMA
.rxDMAStream = DMA1_Stream1, .rxDMAStream = DMA1_Stream1,
#endif #endif
#ifdef USE_UART3_TX_DMA
.txDMAStream = DMA1_Stream3, .txDMAStream = DMA1_Stream3,
#endif
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) }, .rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) }, .txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) },
.af = GPIO_AF7_USART3, .af = GPIO_AF7_USART3,
@ -116,7 +122,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART4_RX_DMA #ifdef USE_UART4_RX_DMA
.rxDMAStream = DMA1_Stream2, .rxDMAStream = DMA1_Stream2,
#endif #endif
#ifdef USE_UART4_TX_DMA
.txDMAStream = DMA1_Stream4, .txDMAStream = DMA1_Stream4,
#endif
.rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE },
.af = GPIO_AF8_UART4, .af = GPIO_AF8_UART4,
@ -139,7 +147,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART5_RX_DMA #ifdef USE_UART5_RX_DMA
.rxDMAStream = DMA1_Stream0, .rxDMAStream = DMA1_Stream0,
#endif #endif
#ifdef USE_UART5_TX_DMA
.txDMAStream = DMA1_Stream7, .txDMAStream = DMA1_Stream7,
#endif
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE },
.af = GPIO_AF8_UART5, .af = GPIO_AF8_UART5,
@ -162,7 +172,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART6_RX_DMA #ifdef USE_UART6_RX_DMA
.rxDMAStream = DMA2_Stream1, .rxDMAStream = DMA2_Stream1,
#endif #endif
#ifdef USE_UART6_TX_DMA
.txDMAStream = DMA2_Stream6, .txDMAStream = DMA2_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
.af = GPIO_AF8_USART6, .af = GPIO_AF8_USART6,
@ -185,7 +197,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART7_RX_DMA #ifdef USE_UART7_RX_DMA
.rxDMAStream = DMA1_Stream3, .rxDMAStream = DMA1_Stream3,
#endif #endif
#ifdef USE_UART7_TX_DMA
.txDMAStream = DMA1_Stream1, .txDMAStream = DMA1_Stream1,
#endif
.rxPins = { DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6), IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7), IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7), IO_TAG_NONE },
.af = GPIO_AF8_UART7, .af = GPIO_AF8_UART7,
@ -208,7 +222,9 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART8_RX_DMA #ifdef USE_UART8_RX_DMA
.rxDMAStream = DMA1_Stream6, .rxDMAStream = DMA1_Stream6,
#endif #endif
#ifdef USE_UART8_TX_DMA
.txDMAStream = DMA1_Stream0, .txDMAStream = DMA1_Stream0,
#endif
.rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE }, .rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE }, .txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE },
.af = GPIO_AF8_UART8, .af = GPIO_AF8_UART8,
@ -228,8 +244,7 @@ void uartIrqHandler(uartPort_t *s)
{ {
UART_HandleTypeDef *huart = &s->Handle; UART_HandleTypeDef *huart = &s->Handle;
/* UART in mode Receiver ---------------------------------------------------*/ /* UART in mode Receiver ---------------------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET)) {
{
uint8_t rbyte = (uint8_t)(huart->Instance->RDR & (uint8_t) 0xff); uint8_t rbyte = (uint8_t)(huart->Instance->RDR & (uint8_t) 0xff);
if (s->port.rxCallback) { if (s->port.rxCallback) {
@ -247,42 +262,51 @@ void uartIrqHandler(uartPort_t *s)
} }
/* UART parity error interrupt occurred -------------------------------------*/ /* UART parity error interrupt occurred -------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET)) {
{
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF); __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
} }
/* UART frame error interrupt occurred --------------------------------------*/ /* UART frame error interrupt occurred --------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET)) {
{
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF); __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
} }
/* UART noise error interrupt occurred --------------------------------------*/ /* UART noise error interrupt occurred --------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET)) {
{
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF); __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
} }
/* UART Over-Run interrupt occurred -----------------------------------------*/ /* UART Over-Run interrupt occurred -----------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET)) {
{
__HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF); __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
} }
/* UART in mode Transmitter ------------------------------------------------*/ /* UART in mode Transmitter ------------------------------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET)) if (!s->txDMAStream && (__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET)) {
{ /* Check that a Tx process is ongoing */
HAL_UART_IRQHandler(huart); if (huart->gState != HAL_UART_STATE_BUSY_TX) {
if (s->port.txBufferTail == s->port.txBufferHead) {
huart->TxXferCount = 0;
/* Disable the UART Transmit Data Register Empty Interrupt */
CLEAR_BIT(huart->Instance->CR1, USART_CR1_TXEIE);
} else {
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) {
huart->Instance->TDR = (((uint16_t) s->port.txBuffer[s->port.txBufferTail]) & (uint16_t) 0x01FFU);
} else {
huart->Instance->TDR = (uint8_t)(s->port.txBuffer[s->port.txBufferTail]);
}
s->port.txBufferTail = (s->port.txBufferTail + 1) % s->port.txBufferSize;
}
}
} }
/* UART in mode Transmitter (transmission end) -----------------------------*/ /* UART in mode Transmitter (transmission end) -----------------------------*/
if ((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET)) if ((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET)) {
{
HAL_UART_IRQHandler(huart); HAL_UART_IRQHandler(huart);
if (s->txDMAStream) {
handleUsartTxDma(s); handleUsartTxDma(s);
} }
}
} }
static void handleUsartTxDma(uartPort_t *s) static void handleUsartTxDma(uartPort_t *s)
@ -329,9 +353,16 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
s->rxDMAChannel = hardware->DMAChannel; s->rxDMAChannel = hardware->DMAChannel;
s->rxDMAStream = hardware->rxDMAStream; s->rxDMAStream = hardware->rxDMAStream;
} }
if (hardware->txDMAStream) {
s->txDMAChannel = hardware->DMAChannel; s->txDMAChannel = hardware->DMAChannel;
s->txDMAStream = hardware->txDMAStream; s->txDMAStream = hardware->txDMAStream;
// DMA TX Interrupt
dmaInit(hardware->txIrq, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
dmaSetHandler(hardware->txIrq, dmaIRQHandler, hardware->txPriority, (uint32_t)uartdev);
}
s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR; s->txDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->TDR;
s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR; s->rxDMAPeripheralBaseAddr = (uint32_t)&s->USARTx->RDR;
@ -362,16 +393,7 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
} }
} }
// DMA TX Interrupt if (!s->rxDMAChannel) {
dmaInit(hardware->txIrq, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
dmaSetHandler(hardware->txIrq, dmaIRQHandler, hardware->txPriority, (uint32_t)uartdev);
//HAL_NVIC_SetPriority(hardware->txIrq, NVIC_PRIORITY_BASE(hardware->txPriority), NVIC_PRIORITY_SUB(hardware->txPriority));
//HAL_NVIC_EnableIRQ(hardware->txIrq);
if (!s->rxDMAChannel)
{
HAL_NVIC_SetPriority(hardware->rxIrq, NVIC_PRIORITY_BASE(hardware->rxPriority), NVIC_PRIORITY_SUB(hardware->rxPriority)); HAL_NVIC_SetPriority(hardware->rxIrq, NVIC_PRIORITY_BASE(hardware->rxPriority), NVIC_PRIORITY_SUB(hardware->rxPriority));
HAL_NVIC_EnableIRQ(hardware->rxIrq); HAL_NVIC_EnableIRQ(hardware->rxIrq);
} }