CF/BF - Enable RTC6705 power control.

Currently there is duplicate code between the two RTC6705 drivers, we
can refactor it via another commit to reduce this new, and existing
duplication.
This commit is contained in:
Hydra 2017-08-19 17:37:40 +01:00 committed by Dominic Clifton
parent 177472b4fc
commit 4901b947e3
2 changed files with 31 additions and 7 deletions

View File

@ -46,25 +46,42 @@
#define DISABLE_RTC6705 IOHi(rtc6705CsnPin) #define DISABLE_RTC6705 IOHi(rtc6705CsnPin)
#define ENABLE_RTC6705 IOLo(rtc6705CsnPin) #define ENABLE_RTC6705 IOLo(rtc6705CsnPin)
#ifdef RTC6705_POWER_PIN
static IO_t vtxPowerPin = IO_NONE;
#endif
#define ENABLE_VTX_POWER() IOLo(vtxPowerPin)
#define DISABLE_VTX_POWER() IOHi(vtxPowerPin)
static IO_t rtc6705DataPin = IO_NONE; static IO_t rtc6705DataPin = IO_NONE;
static IO_t rtc6705CsnPin = IO_NONE; static IO_t rtc6705CsnPin = IO_NONE;
static IO_t rtc6705ClkPin = IO_NONE; static IO_t rtc6705ClkPin = IO_NONE;
void rtc6705IOInit(void) void rtc6705IOInit(void)
{ {
rtc6705DataPin = IOGetByTag(IO_TAG(RTC6705_SPI_MOSI_PIN)); #ifdef RTC6705_POWER_PIN
rtc6705ClkPin = IOGetByTag(IO_TAG(RTC6705_SPICLK_PIN)); vtxPowerPin = IOGetByTag(IO_TAG(RTC6705_POWER_PIN));
rtc6705CsnPin = IOGetByTag(IO_TAG(RTC6705_CS_PIN)); IOInit(vtxPowerPin, OWNER_VTX, 0);
IOInit(rtc6705CsnPin, OWNER_SPI_CS, RESOURCE_SOFT_OFFSET); DISABLE_VTX_POWER();
IOConfigGPIO(rtc6705CsnPin, IOCFG_OUT_PP); IOConfigGPIO(vtxPowerPin, IOCFG_OUT_PP);
DISABLE_RTC6705; #endif
rtc6705DataPin = IOGetByTag(IO_TAG(RTC6705_SPI_MOSI_PIN));
rtc6705CsnPin = IOGetByTag(IO_TAG(RTC6705_CS_PIN));
rtc6705ClkPin = IOGetByTag(IO_TAG(RTC6705_SPICLK_PIN));
IOInit(rtc6705DataPin, OWNER_SPI_MOSI, RESOURCE_SOFT_OFFSET); IOInit(rtc6705DataPin, OWNER_SPI_MOSI, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705DataPin, IOCFG_OUT_PP); IOConfigGPIO(rtc6705DataPin, IOCFG_OUT_PP);
IOInit(rtc6705ClkPin, OWNER_SPI_SCK, RESOURCE_SOFT_OFFSET); IOInit(rtc6705ClkPin, OWNER_SPI_SCK, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705ClkPin, IOCFG_OUT_PP); IOConfigGPIO(rtc6705ClkPin, IOCFG_OUT_PP);
// Important: The order of GPIO configuration calls are critical to ensure that incorrect signals are not briefly sent to the VTX.
// GPIO bit is enabled so here so the CS/LE pin output is not pulled low when the GPIO is set in output mode.
DISABLE_RTC6705;
IOInit(rtc6705CsnPin, OWNER_SPI_CS, RESOURCE_SOFT_OFFSET);
IOConfigGPIO(rtc6705CsnPin, IOCFG_OUT_PP);
} }
static void rtc6705_write_register(uint8_t addr, uint32_t data) static void rtc6705_write_register(uint8_t addr, uint32_t data)
@ -121,10 +138,17 @@ void rtc6705SetRFPower(uint8_t rf_power)
void rtc6705Disable(void) void rtc6705Disable(void)
{ {
#ifdef RTC6705_POWER_PIN
DISABLE_VTX_POWER();
#endif
} }
void rtc6705Enable(void) void rtc6705Enable(void)
{ {
#ifdef RTC6705_POWER_PIN
ENABLE_VTX_POWER();
#endif
} }
#endif #endif

View File

@ -238,7 +238,7 @@ void spiPreInit(void)
#ifdef USE_MAG_SPI_AK8963 #ifdef USE_MAG_SPI_AK8963
spiPreInitCs(IO_TAG(AK8963_CS_PIN)); spiPreInitCs(IO_TAG(AK8963_CS_PIN));
#endif #endif
#if defined(USE_VTX_RTC6705) #if defined(RTC6705_CS_PIN) && !defined(USE_VTX_RTC6705_SOFTSPI) // RTC6705 soft SPI initialisation handled elsewhere.
spiPreInitCs(IO_TAG(RTC6705_CS_PIN)); spiPreInitCs(IO_TAG(RTC6705_CS_PIN));
#endif #endif
#ifdef USE_FLASH_M25P16 #ifdef USE_FLASH_M25P16