Merge pull request #528 from martinbudden/bf_whitespace
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5e84431e7a
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@ -81,7 +81,7 @@ void EXTIConfig(IO_t io, extiCallbackRec_t *cb, int irqPriority, EXTITrigger_Typ
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#elif defined(STM32F303xC)
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SYSCFG_EXTILineConfig(IO_EXTI_PortSourceGPIO(io), IO_EXTI_PinSource(io));
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#elif defined(STM32F4)
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SYSCFG_EXTILineConfig(IO_EXTI_PortSourceGPIO(io), IO_EXTI_PinSource(io));
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SYSCFG_EXTILineConfig(IO_EXTI_PortSourceGPIO(io), IO_EXTI_PinSource(io));
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#else
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# warning "Unknown CPU"
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#endif
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@ -22,14 +22,14 @@
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// old EXTI interface, to be replaced
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typedef struct extiConfig_s {
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ioTag_t io;
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ioTag_t io;
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} extiConfig_t;
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typedef struct extiCallbackRec_s extiCallbackRec_t;
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typedef void extiHandlerCallback(extiCallbackRec_t *self);
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struct extiCallbackRec_s {
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extiHandlerCallback *fn;
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extiHandlerCallback *fn;
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};
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void EXTIInit(void);
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@ -4,48 +4,48 @@
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void RCC_ClockCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
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{
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int tag = periphTag >> 5;
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uint32_t mask = 1 << (periphTag & 0x1f);
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switch (tag) {
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int tag = periphTag >> 5;
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uint32_t mask = 1 << (periphTag & 0x1f);
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switch (tag) {
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#if defined(STM32F303xC)
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case RCC_AHB:
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RCC_AHBPeriphClockCmd(mask, NewState);
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break;
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case RCC_AHB:
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RCC_AHBPeriphClockCmd(mask, NewState);
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break;
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#endif
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case RCC_APB2:
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RCC_APB2PeriphClockCmd(mask, NewState);
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break;
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case RCC_APB1:
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RCC_APB1PeriphClockCmd(mask, NewState);
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break;
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case RCC_APB2:
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RCC_APB2PeriphClockCmd(mask, NewState);
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break;
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case RCC_APB1:
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RCC_APB1PeriphClockCmd(mask, NewState);
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break;
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#if defined(STM32F40_41xxx) || defined(STM32F411xE)
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case RCC_AHB1:
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RCC_AHB1PeriphClockCmd(mask, NewState);
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break;
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case RCC_AHB1:
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RCC_AHB1PeriphClockCmd(mask, NewState);
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break;
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#endif
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}
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}
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}
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void RCC_ResetCmd(rccPeriphTag_t periphTag, FunctionalState NewState)
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{
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int tag = periphTag >> 5;
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uint32_t mask = 1 << (periphTag & 0x1f);
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switch (tag) {
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int tag = periphTag >> 5;
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uint32_t mask = 1 << (periphTag & 0x1f);
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switch (tag) {
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#if defined(STM32F303xC)
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case RCC_AHB:
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RCC_AHBPeriphResetCmd(mask, NewState);
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break;
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case RCC_AHB:
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RCC_AHBPeriphResetCmd(mask, NewState);
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break;
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#endif
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case RCC_APB2:
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RCC_APB2PeriphResetCmd(mask, NewState);
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break;
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case RCC_APB1:
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RCC_APB1PeriphResetCmd(mask, NewState);
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break;
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case RCC_APB2:
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RCC_APB2PeriphResetCmd(mask, NewState);
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break;
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case RCC_APB1:
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RCC_APB1PeriphResetCmd(mask, NewState);
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break;
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#if defined(STM32F40_41xxx) || defined(STM32F411xE)
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case RCC_AHB1:
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RCC_AHB1PeriphResetCmd(mask, NewState);
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break;
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case RCC_AHB1:
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RCC_AHB1PeriphResetCmd(mask, NewState);
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break;
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#endif
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}
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}
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}
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@ -4,11 +4,11 @@
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#include "common/utils.h"
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enum rcc_reg {
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RCC_EMPTY = 0, // make sure that default value (0) does not enable anything
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RCC_AHB,
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RCC_APB2,
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RCC_APB1,
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RCC_AHB1,
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RCC_EMPTY = 0, // make sure that default value (0) does not enable anything
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RCC_AHB,
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RCC_APB2,
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RCC_APB1,
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RCC_AHB1,
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};
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#define RCC_ENCODE(reg, mask) (((reg) << 5) | LOG2_32BIT(mask))
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