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RX_*_PIN defs are not used & canonicalize to SPI defs

This commit is contained in:
jflyper 2018-09-30 21:00:48 +09:00
parent d557203fac
commit 5fe4f44f43
5 changed files with 13 additions and 30 deletions
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10
src/main/target/CJMCU/target.h
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@ -67,15 +67,13 @@
// Nordic Semiconductor uses 'CSN', STM uses 'NSS'
#define RX_CE_PIN PA4
#define RX_NSS_PIN PA11
#define RX_SCK_PIN PA5
#define RX_MISO_PIN PA6
#define RX_MOSI_PIN PA7
#define RX_IRQ_PIN PA8
// CJMCU has NSS on PA11, rather than the standard PA4
#define SPI1_NSS_PIN RX_NSS_PIN
#define SPI1_SCK_PIN RX_SCK_PIN
#define SPI1_MISO_PIN RX_MISO_PIN
#define SPI1_MOSI_PIN RX_MOSI_PIN
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#define USE_RX_NRF24
#define USE_RX_CX10

3
src/main/target/CRAZYBEEF3FR/target.h
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@ -137,9 +137,6 @@
#define RX_SPI_DEFAULT_PROTOCOL RX_SPI_FRSKY_X
#define RX_SPI_INSTANCE SPI2
#define RX_NSS_PIN SPI2_NSS_PIN
#define RX_SCK_PIN SPI2_SCK_PIN
#define RX_MISO_PIN SPI2_MISO_PIN
#define RX_MOSI_PIN SPI2_MOSI_PIN
#define RX_FRSKY_SPI_GDO_0_PIN PA8
#define RX_FRSKY_SPI_LED_PIN PA10
#define BINDPLUG_PIN PA9

7
src/main/target/MATEKF411RX/target.h
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@ -67,15 +67,10 @@
#define SPI3_SCK_PIN PB3
#define SPI3_MISO_PIN PB4
#define SPI3_MOSI_PIN PB5
#define SPI3_NSS_PIN PA15
#define USE_RX_SPI
#define RX_SPI_INSTANCE SPI3
#define RX_SCK_PIN SPI3_SCK_PIN
#define RX_MISO_PIN SPI3_MISO_PIN
#define RX_MOSI_PIN SPI3_MOSI_PIN
#define RX_NSS_PIN SPI3_NSS_PIN
#define RX_NSS_PIN PA15
#define RX_FRSKY_SPI_DISABLE_CHIP_DETECTION
#define RX_FRSKY_SPI_GDO_0_PIN PC14

13
src/main/target/MIDELICF3/target.h
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@ -72,21 +72,19 @@
#define USE_SPI
#define USE_SPI_DEVICE_1
#define SPI1_NSS_PIN PA4
#define SPI1_SCK_PIN PA5
#define SPI1_MISO_PIN PA6
#define SPI1_MOSI_PIN PA7
#define USE_SPI_DEVICE_2
#define SPI2_NSS_PIN PB12
#define SPI2_SCK_PIN PB13
#define SPI2_MISO_PIN PB14
#define SPI2_MOSI_PIN PB15
#define USE_SDCARD
#define SDCARD_SPI_INSTANCE SPI2
#define SDCARD_SPI_CS_PIN SPI2_NSS_PIN
#define SDCARD_DMA_CHANNEL_TX DMA1_Channel5
#define SDCARD_SPI_INSTANCE SPI2
#define SDCARD_SPI_CS_PIN PB12
#define SDCARD_DMA_CHANNEL_TX DMA1_Channel5
#define USE_ADC
#define ADC_INSTANCE ADC1
@ -109,10 +107,7 @@
#define RX_SPI_DEFAULT_PROTOCOL RX_SPI_FRSKY_X
#define USE_RX_FRSKY_SPI_TELEMETRY
#define RX_NSS_PIN SPI1_NSS_PIN
#define RX_SCK_PIN SPI1_SCK_PIN
#define RX_MISO_PIN SPI1_MISO_PIN
#define RX_MOSI_PIN SPI1_MOSI_PIN
#define RX_NSS_PIN PA4
#define RX_FRSKY_SPI_GDO_0_PIN PB0

10
src/main/target/NUCLEOF446RE/target.h
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@ -91,14 +91,12 @@
// Nordic Semiconductor uses 'CSN', STM uses 'NSS'
#define RX_CE_PIN PC7 // D9
#define RX_NSS_PIN PB6 // D10
#define RX_SCK_PIN PA5 // D13
#define RX_MISO_PIN PA6 // D12
#define RX_MOSI_PIN PA7 // D11
// NUCLEO has NSS on PB6, rather than the standard PA4
#define SPI1_NSS_PIN RX_NSS_PIN
#define SPI1_SCK_PIN RX_SCK_PIN
#define SPI1_MISO_PIN RX_MISO_PIN
#define SPI1_MOSI_PIN RX_MOSI_PIN
#define SPI1_SCK_PIN PA5 // D13
#define SPI1_MISO_PIN PA6 // D12
#define SPI1_MOSI_PIN PA7 // D11
#define USE_RX_NRF24
#define USE_RX_CX10