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Merge pull request #1549 from marbalon/master 

Added support for DShot on RACEBASE FC
This commit is contained in:
borisbstyle 2016-11-13 23:32:42 +01:00 committed by GitHub
parent fbcf0463b5 13132e40bf
commit 71ecc10e77
2 changed files with 20 additions and 7 deletions
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19
src/main/target/RACEBASE/target.c
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@ -25,10 +25,17 @@
#include "drivers/dma.h"
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
DEF_TIM(TIM2, CH1, PA0, TIM_USE_PPM, 1 ),
DEF_TIM(TIM4, CH1, PB6, TIM_USE_MOTOR, 1 ), // PWM2 - PC6
DEF_TIM(TIM4, CH2, PB7, TIM_USE_MOTOR, 1 ), // PWM3 - PC7
DEF_TIM(TIM4, CH3, PB8, TIM_USE_MOTOR, 1 ), // PMW4 - PC8
DEF_TIM(TIM4, CH4, PB9, TIM_USE_MOTOR, 1 ), // PWM5 - PC9
DEF_TIM(TIM1, CH1, PA8, TIM_USE_LED, 1 ), // PWM5 - PC9
DEF_TIM(TIM2, CH1, PA0, TIM_USE_PPM, TIMER_INPUT_ENABLED),
DEF_TIM(TIM8, CH1, PB6, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM1 - DMA2 CH3
DEF_TIM(TIM3, CH4, PB7, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM2 - DMA1 CH3
DEF_TIM(TIM8, CH2, PB8, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PMW3 - DMA2 CH5
DEF_TIM(TIM17,CH1,PB9, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM4 -DMA1 CH1
DEF_TIM(TIM1, CH1, PA8, TIM_USE_LED, TIMER_OUTPUT_ENABLED ), // LED - DMA1 CH2
};
//other working setup with dissabled uart1 TX / RX DMA
//DEF_TIM(TIM8, CH1, PB6, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM1 - DMA2 CH3
//DEF_TIM(TIM4, CH2, PB7, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM2 - DMA1 CH4
//DEF_TIM(TIM4, CH3, PB8, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PMW3 - DMA1 CH5
//DEF_TIM(TIM17,CH1,PB9, TIM_USE_MOTOR, TIMER_OUTPUT_ENABLED ), // PWM4 -DMA1 CH1
//DEF_TIM(TIM1, CH1, PA8, TIM_USE_LED, TIMER_OUTPUT_ENABLED ), // LED - DMA1 CH2

8
src/main/target/RACEBASE/target.h
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@ -116,8 +116,14 @@
#define TARGET_IO_PORTC (BIT(5))
#define TARGET_IO_PORTF (BIT(0)|BIT(1)|BIT(3)|BIT(4))
#define USE_DSHOT
#if defined(USE_UART3_RX_DMA) && defined(USE_DSHOT)
#undef USE_UART3_RX_DMA
#endif
#define USABLE_TIMER_CHANNEL_COUNT 6
#define USED_TIMERS (TIM_N(2) | TIM_N(4))
#define USED_TIMERS (TIM_N(2) | TIM_N(3)| TIM_N(4) | TIM_N(8) | TIM_N(17))