[H7] NUCLEOH725ZG target
This is a test target for Nucleo-H7A3ZI-Q board transplanted with STM32H725ZG.
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdbool.h>
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#include <stdint.h>
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#include "platform.h"
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#ifdef USE_TARGET_CONFIG
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#include "config_helper.h"
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#include "io/serial.h"
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#include "pg/sdcard.h"
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static targetSerialPortFunction_t targetSerialPortFunction[] = {
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{ SERIAL_PORT_USART3, FUNCTION_MSP },
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};
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void targetConfiguration(void)
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{
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targetSerialPortFunctionConfig(targetSerialPortFunction, ARRAYLEN(targetSerialPortFunction));
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sdcardConfigMutable()->mode = SDCARD_MODE_SDIO;
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sdcardConfigMutable()->useDma = true;
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}
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#endif
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
|
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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||||
*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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||||
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdint.h>
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#include "platform.h"
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#include "drivers/io.h"
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#include "drivers/dma.h"
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#include "drivers/timer.h"
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#include "drivers/timer_def.h"
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const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
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// DEF_TIM(TIM2, CH2, PB3, TIM_USE_LED, 0, 7, 0 ), // SPI1_SCK
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DEF_TIM(TIM12, CH2, PB15, TIM_USE_LED, 0, 0, 0 ),
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DEF_TIM(TIM1, CH2, PE11, TIM_USE_PWM|TIM_USE_PPM, 0, 0, 0 ),
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DEF_TIM(TIM1, CH1, PE9, TIM_USE_PWM, 0, 0, 0 ),
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DEF_TIM(TIM2, CH1, PA15, TIM_USE_PWM, 0, 0, 0 ),
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DEF_TIM(TIM8, CH1, PC6, TIM_USE_MOTOR, 0, 0, 4 ),
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DEF_TIM(TIM8, CH2, PC7, TIM_USE_MOTOR, 0, 1, 4),
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DEF_TIM(TIM8, CH3, PC8, TIM_USE_MOTOR, 0, 2, 4),
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DEF_TIM(TIM8, CH4, PC9, TIM_USE_MOTOR, 0, 3, 4),
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DEF_TIM(TIM3, CH1, PB4, TIM_USE_MOTOR, 0, 4, 0 ),
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DEF_TIM(TIM3, CH2, PB5, TIM_USE_MOTOR, 0, 5, 0 ),
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DEF_TIM(TIM5, CH3, PA2, TIM_USE_MOTOR, 0, 0, 0 ),
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DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, 0, 4, 0 ),
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DEF_TIM(TIM5, CH4, PA3, TIM_USE_MOTOR, 0, 1, 0 ),
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DEF_TIM(TIM5, CH1, PA0, TIM_USE_MOTOR, 0, 2, 0 ),
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// DEF_TIM(TIM4, CH3, PB8, TIM_USE_MOTOR, 0, 8, 0 ), // I2C1
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// DEF_TIM(TIM4, CH4, PB9, TIM_USE_MOTOR, 0, 0, 0 ), // I2C1
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// DEF_TIM(TIM9, CH2, PE6, TIM_USE_MOTOR, 0, 0, 0 ),
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};
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
|
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Note about "Nucleo-H725ZG"
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*
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* Nucleo-H725ZG is Nucleo-H7A3ZI-Q board transplanted with STM32H725ZG.
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* STM32H7A3ZI and STM32H725ZG are drop-in compatible, except for pin 119;
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* VDDMMC (supply) on H723 and VDD (supply) on H725. Since Nucleo-H723ZG connects
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* VDD to pin 119, the board is fully compatible with H725ZG.
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*/
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#pragma once
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#define TARGET_BOARD_IDENTIFIER "H725"
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#define USBD_PRODUCT_STRING "Nucleo-H725"
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#define USE_TARGET_CONFIG
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#define LED0_PIN PB0
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#define LED1_PIN PB7 // PE1 on NUCLEO-H743ZI2 (may collide with UART8_TX) XXX How about H7A3 case?
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//#define LED2_PIN PB14 // SDMMC2_D0
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// Nucleo-H7A3 has one button (The blue USER button).
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// Force two buttons to look at the single button so config reset on button works
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#define USE_BUTTONS
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#define BUTTON_A_PIN PC13
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#define BUTTON_A_PIN_INVERTED // Active high
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#define BUTTON_B_PIN PC13
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#define BUTTON_B_PIN_INVERTED // Active high
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#define USE_BEEPER
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#define BEEPER_PIN PE3
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#define BEEPER_INVERTED
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#define USE_UART
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#define USE_UART1
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#define UART1_RX_PIN PA10
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#define UART1_TX_PIN PA9
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#define USE_UART2
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#define UART2_RX_PIN NONE // PD6, collide with SDMMC2_CK
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#define UART2_TX_PIN PD5
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#define USE_UART3
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#define UART3_RX_PIN PD9 // Virtual COM port on NUCLEO-H7A3ZI-Q
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#define UART3_TX_PIN PD8 // Virtual COM port on NUCLEO-H7A3ZI-Q
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#define USE_UART4
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#define UART4_RX_PIN PC11
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#define UART4_TX_PIN PC10
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#define USE_UART5
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#define UART5_RX_PIN PD2
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#define UART5_TX_PIN PC12
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#define USE_UART6
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#define UART6_RX_PIN PC7
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#define UART6_TX_PIN PC6
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#define USE_UART7
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#define UART7_RX_PIN PE7
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#define UART7_TX_PIN PE8
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#define USE_UART8
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#define UART8_RX_PIN PE0
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#define UART8_TX_PIN PE1
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#define USE_UART9 // LPUART1
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#define UART9_RX_PIN PB7 // PA10 (Shared with UART1)
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#define UART9_TX_PIN PB6 // PA9 (Shared with UART1)
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#define USE_VCP
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#define USE_SOFTSERIAL1
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#define USE_SOFTSERIAL2
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#define SERIAL_PORT_COUNT 12
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#define USE_SPI
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#define USE_SPI_DEVICE_1
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#define SPI1_SCK_PIN PB3
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#define SPI1_MISO_PIN PB4
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#define SPI1_MOSI_PIN PB5
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#define USE_SPI_DEVICE_2
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#define SPI2_SCK_PIN NONE
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#define SPI2_MISO_PIN NONE
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#define SPI2_MOSI_PIN NONE
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#define USE_SPI_DEVICE_3
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#define SPI3_SCK_PIN PC10 // PC10
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#define SPI3_MISO_PIN PC11 // PC11
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#define SPI3_MOSI_PIN PC12 // PC12
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#define USE_SPI_DEVICE_4
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#define SPI4_SCK_PIN NONE
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#define SPI4_MISO_PIN NONE
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#define SPI4_MOSI_PIN NONE
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#define USE_SPI_DEVICE_5
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#define SPI5_SCK_PIN NONE
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#define SPI5_MISO_PIN NONE
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#define SPI5_MOSI_PIN NONE
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#define USE_SPI_DEVICE_6
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#define SPI6_SCK_PIN NONE
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#define SPI6_MISO_PIN NONE
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#define SPI6_MOSI_PIN NONE
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// #define USE_QUADSPI
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//#define USE_QUADSPI_DEVICE_1
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#define QUADSPI1_SCK_PIN NONE // PB2
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#define QUADSPI1_BK1_IO0_PIN NONE // PD11
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#define QUADSPI1_BK1_IO1_PIN NONE // PD12
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#define QUADSPI1_BK1_IO2_PIN NONE // PE2
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#define QUADSPI1_BK1_IO3_PIN NONE // PD13
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#define QUADSPI1_BK1_CS_PIN NONE // PB10
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#define QUADSPI1_BK2_IO0_PIN NONE // PE7
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#define QUADSPI1_BK2_IO1_PIN NONE // PE8
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#define QUADSPI1_BK2_IO2_PIN NONE // PE9
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#define QUADSPI1_BK2_IO3_PIN NONE // PE10
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#define QUADSPI1_BK2_CS_PIN NONE // NONE
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#define QUADSPI1_MODE QUADSPI_MODE_BK1_ONLY
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#define QUADSPI1_CS_FLAGS (QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED)
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#if !defined(NUCLEOH7A3_RAMBASED)
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#define USE_SDCARD
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#define USE_SDCARD_SDIO
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#define SDCARD_DETECT_PIN NONE
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// SDMMC1
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// CK PC12
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// CMD PD2
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// D0 PC8
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// D1 PC9
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// D2 PC10
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// D3 PC11
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// SDIO configuration for SDMMC1, 1-bit width
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#define SDIO_DEVICE SDIODEV_2 // SDIODEV_1 (for SDMMC1) or SDIODEV_2 (for SDMMC2) (or SDIOINVALID)
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#define SDIO_USE_4BIT false
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#define SDIO_CK_PIN PD6 // SDMMC1: PC12 SDMMC2: PC1 or PD6
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#define SDIO_CMD_PIN PD7 // SDMMC1: PD2 SDMMC2: PA0 or PD7
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#define SDIO_D0_PIN PB14 // SDMMC1: PC8 SDMMC2: PB14
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#define SDIO_D1_PIN NONE // SDMMC1: PC9 SDMMC2: PB15
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#define SDIO_D2_PIN NONE // SDMMC1: PC10 SDMMC2: PB3
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#define SDIO_D3_PIN NONE // SDMMC2: PC11 SDMMC2: PB4
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#define USE_BLACKBOX
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#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
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#endif
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#define USE_I2C
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#define USE_I2C_DEVICE_1
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#define I2C1_SCL PB8
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#define I2C1_SDA PB9
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#define I2C_DEVICE (I2CDEV_1)
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#define USE_MAG
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#define USE_MAG_HMC5883
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#define USE_MAG_SPI_HMC5883
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#define HMC5883_SPI_INSTANCE NULL
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#define HMC5883_CS_PIN NONE
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#define USE_BARO
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#define USE_BARO_LPS
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#define USE_BARO_BMP085
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#define USE_BARO_BMP280
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#define USE_BARO_BMP388
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#define USE_BARO_MS5611
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#define USE_BARO_SPI_BMP280
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#define BMP280_SPI_INSTANCE NULL
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#define BMP280_CS_PIN NONE
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#define USE_GYRO
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#define USE_MULTI_GYRO
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#define USE_ACC
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#define USE_FAKE_GYRO
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#define USE_FAKE_ACC
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#define USE_GYRO_SPI_MPU6000
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#define USE_ACC_SPI_MPU6000
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#define USE_GYRO_SPI_MPU6500
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#define USE_ACC_SPI_MPU6500
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#define USE_GYRO_SPI_MPU9250
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#define USE_ACC_SPI_MPU9250
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#define USE_GYRO_SPI_ICM42605
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#define USE_ACC_SPI_ICM42605
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#define GYRO_1_CS_PIN PD15
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#define GYRO_1_SPI_INSTANCE SPI1
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// I2C acc/gyro test, may require to activate
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// set gyro_x_bustype = I2C
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// set gyro_x_i2cBus = <Bus ordinal of I2C_DEVICE>
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//#define USE_GYRO_MPU6050
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//#define USE_ACC_MPU6050
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#define USE_FLASH_CHIP
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#define USE_FLASH_M25P16
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#define USE_FLASH_W25M
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#define FLASH_SPI_INSTANCE NULL
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#define FLASH_CS_PIN NONE
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#define USE_FLASHFS
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#define USE_BRUSHED_ESC_AUTODETECT // Detect if brushed motors are connected and set defaults appropriately to avoid motors spinning on boot
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#define USE_GYRO_REGISTER_DUMP // Adds gyroregisters command to cli to dump configured register values
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#define USE_TIMER
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#define USE_PWM_OUTPUT
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#define USE_MOTOR
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#define USE_EXTI
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#define USE_RANGEFINDER
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#define USE_RANGEFINDER_HCSR04
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#define USE_RANGEFINDER_TF
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#define USE_TRANSPONDER
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#define USE_MAX7456
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#define MAX7456_SPI_INSTANCE NULL // SPI3
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#define MAX7456_SPI_CS_PIN NONE // PC9
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#define USE_I2C_OLED_DISPLAY
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#define USE_ADC
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#define ADC1_INSTANCE ADC1
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#define ADC2_INSTANCE ADC2
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#define ADC3_INSTANCE ADC3
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// DMA stream assignmnets
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#define VBAT_ADC_PIN PB1 // ADC1
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#define CURRENT_METER_ADC_PIN PC0 // ADC1
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#define RSSI_ADC_PIN PF14 // ADC2
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#define EXTERNAL1_ADC_PIN PC3 // ADC3
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#define DEFAULT_VOLTAGE_METER_SOURCE VOLTAGE_METER_ADC
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#define DEFAULT_CURRENT_METER_SOURCE CURRENT_METER_ADC
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#define USE_DSHOT
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#define USE_DSHOT_DMAR
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#define USE_DMA
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// Thanks to DMAMUX, H7 does not have limitations on DMA stream assignments to devices (except for collisions among them).
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//#define UART1_TX_DMA_OPT 0
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//#define UART2_TX_DMA_OPT 1
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//#define UART3_TX_DMA_OPT 2
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//#define UART4_TX_DMA_OPT 3
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//#define UART5_TX_DMA_OPT 4
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//#define UART6_TX_DMA_OPT 5
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//#define UART7_TX_DMA_OPT 6
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//#define UART8_TX_DMA_OPT 7
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#define ADC1_DMA_OPT 8
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#define ADC2_DMA_OPT 9
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#define ADC3_DMA_OPT 10
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#define DEFAULT_FEATURE (FEATURE_OSD)
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#define TARGET_IO_PORTA 0xffff
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#define TARGET_IO_PORTB 0xffff
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#define TARGET_IO_PORTC 0xffff
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#define TARGET_IO_PORTD 0xffff
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#define TARGET_IO_PORTE 0xffff
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#define TARGET_IO_PORTF 0xffff
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#define TARGET_IO_PORTG 0xffff
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#define USABLE_TIMER_CHANNEL_COUNT 14
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#define USED_TIMERS ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(8) | TIM_N(12) )
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@ -0,0 +1,32 @@
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#
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# NUCLEO-H7A3ZI-Q board transplanted with STM32H725ZG
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#
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H725xG_TARGETS += $(TARGET)
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FEATURES += VCP ONBOARDFLASH SDCARD_SDIO
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# Top level Makefile adds, if not defined, HSE_VALUE, as default for F4 targets.
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# We don't want to assume any particular value until de facto design is established,
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# so we set the value here.
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#
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# However, HSE_VALUE is currently a global build option and can not be changed from
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# board to board. Generic target will have to store this value as a PG variable and
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# change clock on the fly after the PG became readable.
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HSE_VALUE = 8000000 # For NUCLEO-H7A3ZI-Q with STLINK, HSE is 8MHz from STLINK
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TARGET_SRC = \
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drivers/accgyro/accgyro_fake.c \
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drivers/accgyro/accgyro_mpu.c \
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drivers/accgyro/accgyro_mpu6500.c \
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drivers/accgyro/accgyro_spi_mpu6000.c \
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drivers/accgyro/accgyro_spi_mpu6500.c \
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drivers/accgyro/accgyro_spi_mpu9250.c \
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drivers/accgyro/accgyro_spi_icm42605.c \
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drivers/accgyro/accgyro_mpu6050.c \
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drivers/barometer/barometer_bmp085.c \
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drivers/barometer/barometer_bmp280.c \
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drivers/barometer/barometer_bmp388.c \
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drivers/barometer/barometer_ms5611.c \
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drivers/compass/compass_hmc5883l.c \
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drivers/max7456.c \
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