From ac02ee4cf208dbb6ed41e632fdc96e7192c23a5c Mon Sep 17 00:00:00 2001
From: jflyper <shinoda@jaist.ac.jp>
Date: Mon, 3 Dec 2018 22:52:23 +0900
Subject: [PATCH] Delete bogus clock pll entry

---
 src/main/target/system_stm32f4xx.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/src/main/target/system_stm32f4xx.c b/src/main/target/system_stm32f4xx.c
index 377559d57..bbdc15622 100644
--- a/src/main/target/system_stm32f4xx.c
+++ b/src/main/target/system_stm32f4xx.c
@@ -440,7 +440,6 @@ static const pllConfig_t overclockLevels[] = {
   { 216, 432, 2,  9 },  // 216 MHz
   { 240, 480, 2,  10 }  // 240 MHz
 #elif defined(STM32F411xE)
-  {  84, 336, 4,  7 },  // 84 MHz
   {  96, 384, 4,  8 },  // 96 MHz
   { 108, 432, 4,  9 },  // 108 MHz
   { 120, 480, 4, 10 },  // 120 MHz