Added CL_RACINGF4 target, based on #2671.
This commit is contained in:
parent
ae58a07f2a
commit
b46e0fe46d
|
@ -1 +0,0 @@
|
|||
|
|
@ -25,37 +25,31 @@
|
|||
#include "drivers/timer_def.h"
|
||||
|
||||
const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
|
||||
#if defined(OMNIBUSF4SD) ||defined(OMNIBUSF4)
|
||||
#ifdef OMNIBUSF4SD
|
||||
DEF_TIM(TIM4, CH3, PB8, TIM_USE_PWM | TIM_USE_PPM, TIMER_OUTPUT_NONE, 0), // PPM
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S2_IN
|
||||
#elif defined( OMNIBUSF4 )
|
||||
DEF_TIM(TIM12, CH1, PB14, TIM_USE_PWM | TIM_USE_PPM, TIMER_OUTPUT_NONE, 0), // PPM
|
||||
DEF_TIM(TIM12, CH2, PB15, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S2_IN
|
||||
#endif
|
||||
DEF_TIM(TIM8, CH1, PC6, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S3_IN
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S4_IN
|
||||
DEF_TIM(TIM8, CH3, PC8, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S5_IN
|
||||
DEF_TIM(TIM8, CH4, PC9, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S6_IN
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S1_OUT D1_ST7
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S2_OUT D1_ST2
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 1), // S3_OUT D1_ST6
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S4_OUT D1_ST1
|
||||
#ifdef OMNIBUSF4SD
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S5_OUT
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR | TIM_USE_LED, TIMER_OUTPUT_STANDARD, 0), // S6_OUT
|
||||
#elif defined( OMNIBUSF4 )
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR | TIM_USE_LED, TIMER_OUTPUT_STANDARD, 0), // S5_OUT
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S6_OUT
|
||||
#endif
|
||||
|
||||
#elif defined( CL_RACINGF4 )
|
||||
#if defined(CL_RACINGF4)
|
||||
DEF_TIM(TIM4, CH3, PB8, TIM_USE_PWM | TIM_USE_PPM, TIMER_OUTPUT_NONE, 0), // PPM
|
||||
#else
|
||||
#if defined(OMNIBUSF4SD)
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S2_IN
|
||||
#else
|
||||
DEF_TIM(TIM12, CH1, PB14, TIM_USE_PWM | TIM_USE_PPM, TIMER_OUTPUT_NONE, 0), // PPM
|
||||
DEF_TIM(TIM12, CH2, PB15, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S2_IN
|
||||
#endif
|
||||
DEF_TIM(TIM8, CH1, PC6, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S3_IN
|
||||
DEF_TIM(TIM8, CH2, PC7, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S4_IN
|
||||
DEF_TIM(TIM8, CH3, PC8, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S5_IN
|
||||
DEF_TIM(TIM8, CH4, PC9, TIM_USE_PWM, TIMER_OUTPUT_NONE, 0), // S6_IN
|
||||
#endif // CL_RACINGF4
|
||||
DEF_TIM(TIM3, CH3, PB0, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S1_OUT D1_ST7
|
||||
DEF_TIM(TIM3, CH4, PB1, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S2_OUT D1_ST2
|
||||
DEF_TIM(TIM2, CH4, PA3, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 1), // S3_OUT D1_ST6
|
||||
DEF_TIM(TIM2, CH3, PA2, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S4_OUT D1_ST1
|
||||
#if defined(CL_RACINGF4)
|
||||
DEF_TIM(TIM4, CH4, PB9, TIM_USE_MOTOR | TIM_USE_LED, TIMER_OUTPUT_STANDARD, 0), // S5_OUT
|
||||
#elif defined(OMNIBUSF4SD)
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S5_OUT
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR | TIM_USE_LED, TIMER_OUTPUT_STANDARD, 0), // S6_OUT
|
||||
#else
|
||||
DEF_TIM(TIM5, CH2, PA1, TIM_USE_MOTOR | TIM_USE_LED, TIMER_OUTPUT_STANDARD, 0), // S5_OUT
|
||||
DEF_TIM(TIM1, CH1, PA8, TIM_USE_MOTOR, TIMER_OUTPUT_STANDARD, 0), // S6_OUT
|
||||
#endif
|
||||
|
||||
};
|
||||
|
|
|
@ -15,15 +15,15 @@
|
|||
|
||||
#pragma once
|
||||
|
||||
#ifdef OMNIBUSF4SD
|
||||
#if defined(CL_RACINGF4)
|
||||
#define TARGET_BOARD_IDENTIFIER "CLR4"
|
||||
#elif defined(OMNIBUSF4SD)
|
||||
#define TARGET_BOARD_IDENTIFIER "OBSD"
|
||||
#elif OMNIBUSF4
|
||||
#else
|
||||
#define TARGET_BOARD_IDENTIFIER "OBF4"
|
||||
#elif CL_RACINGF4
|
||||
#define TARGET_BOARD_IDENTIFIER "CL_R"
|
||||
#endif
|
||||
|
||||
#ifdef CL_RACINGF4
|
||||
#if defined(CL_RACINGF4)
|
||||
#define USBD_PRODUCT_STRING "CL_RACINGF4"
|
||||
#else
|
||||
#define USBD_PRODUCT_STRING "OmnibusF4"
|
||||
|
@ -49,15 +49,15 @@
|
|||
#define GYRO
|
||||
#define USE_GYRO_SPI_MPU6000
|
||||
|
||||
#ifdef OMNIBUSF4SD
|
||||
#define GYRO_MPU6000_ALIGN CW270_DEG
|
||||
#define ACC_MPU6000_ALIGN CW270_DEG
|
||||
#elif OMNIBUSF4
|
||||
#define GYRO_MPU6000_ALIGN CW180_DEG
|
||||
#define ACC_MPU6000_ALIGN CW180_DEG
|
||||
#elif CL_RACINGF4
|
||||
#define GYRO_MPU6000_ALIGN CW0_DEG
|
||||
#define ACC_MPU6000_ALIGN CW0_DEG
|
||||
#if defined(CL_RACINGF4)
|
||||
#define GYRO_MPU6000_ALIGN CW0_DEG
|
||||
#define ACC_MPU6000_ALIGN CW0_DEG
|
||||
#elif defined(OMNIBUSF4SD)
|
||||
#define GYRO_MPU6000_ALIGN CW270_DEG
|
||||
#define ACC_MPU6000_ALIGN CW270_DEG
|
||||
#else
|
||||
#define GYRO_MPU6000_ALIGN CW180_DEG
|
||||
#define ACC_MPU6000_ALIGN CW180_DEG
|
||||
#endif
|
||||
|
||||
// MPU6000 interrupts
|
||||
|
@ -74,11 +74,11 @@
|
|||
|
||||
#define BARO
|
||||
#define USE_BARO_MS5611
|
||||
#ifdef OMNIBUSF4SD
|
||||
#define USE_BARO_BMP280
|
||||
#define USE_BARO_SPI_BMP280
|
||||
#define BMP280_SPI_INSTANCE SPI3
|
||||
#define BMP280_CS_PIN PB3 // v1
|
||||
#if defined(OMNIBUSF4SD)
|
||||
#define USE_BARO_BMP280
|
||||
#define USE_BARO_SPI_BMP280
|
||||
#define BMP280_SPI_INSTANCE SPI3
|
||||
#define BMP280_CS_PIN PB3 // v1
|
||||
#endif
|
||||
|
||||
#define OSD
|
||||
|
@ -88,32 +88,32 @@
|
|||
#define MAX7456_SPI_CLK (SPI_CLOCK_STANDARD*2)
|
||||
#define MAX7456_RESTORE_CLK (SPI_CLOCK_FAST)
|
||||
|
||||
#if defined( OMNIBUSF4SD )||defined( CL_RACINGF4 )
|
||||
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
|
||||
#define USE_SDCARD
|
||||
#define USE_SDCARD_SPI2
|
||||
#ifdef OMNIBUSF4SD
|
||||
#define SDCARD_DETECT_INVERTED
|
||||
#endif
|
||||
#define SDCARD_DETECT_PIN PB7
|
||||
#define SDCARD_SPI_INSTANCE SPI2
|
||||
#define SDCARD_SPI_CS_PIN SPI2_NSS_PIN
|
||||
// SPI2 is on the APB1 bus whose clock runs at 84MHz. Divide to under 400kHz for init:
|
||||
#define SDCARD_SPI_INITIALIZATION_CLOCK_DIVIDER 256 // 328kHz
|
||||
// Divide to under 25MHz for normal operation:
|
||||
#define SDCARD_SPI_FULL_SPEED_CLOCK_DIVIDER 4 // 21MHz
|
||||
|
||||
#define SDCARD_DMA_CHANNEL_TX DMA1_Stream4
|
||||
#define SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG DMA_FLAG_TCIF4
|
||||
#define SDCARD_DMA_CLK RCC_AHB1Periph_DMA1
|
||||
#define SDCARD_DMA_CHANNEL DMA_Channel_0
|
||||
#else
|
||||
#define ENABLE_BLACKBOX_LOGGING_ON_SPIFLASH_BY_DEFAULT
|
||||
#define M25P16_CS_PIN SPI3_NSS_PIN
|
||||
#define M25P16_SPI_INSTANCE SPI3
|
||||
#define USE_FLASHFS
|
||||
#define USE_FLASH_M25P16
|
||||
#if defined(OMNIBUSF4SD) || defined(CL_RACINGF4)
|
||||
#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
|
||||
#define USE_SDCARD
|
||||
#define USE_SDCARD_SPI2
|
||||
#if defined(OMNIBUSF4SD)
|
||||
#define SDCARD_DETECT_INVERTED
|
||||
#endif
|
||||
#define SDCARD_DETECT_PIN PB7
|
||||
#define SDCARD_SPI_INSTANCE SPI2
|
||||
#define SDCARD_SPI_CS_PIN SPI2_NSS_PIN
|
||||
// SPI2 is on the APB1 bus whose clock runs at 84MHz. Divide to under 400kHz for init:
|
||||
#define SDCARD_SPI_INITIALIZATION_CLOCK_DIVIDER 256 // 328kHz
|
||||
// Divide to under 25MHz for normal operation:
|
||||
#define SDCARD_SPI_FULL_SPEED_CLOCK_DIVIDER 4 // 21MHz
|
||||
|
||||
#define SDCARD_DMA_CHANNEL_TX DMA1_Stream4
|
||||
#define SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG DMA_FLAG_TCIF4
|
||||
#define SDCARD_DMA_CLK RCC_AHB1Periph_DMA1
|
||||
#define SDCARD_DMA_CHANNEL DMA_Channel_0
|
||||
#else
|
||||
#define ENABLE_BLACKBOX_LOGGING_ON_SPIFLASH_BY_DEFAULT
|
||||
#define M25P16_CS_PIN SPI3_NSS_PIN
|
||||
#define M25P16_SPI_INSTANCE SPI3
|
||||
#define USE_FLASHFS
|
||||
#define USE_FLASH_M25P16
|
||||
#endif // OMNIBUSF4
|
||||
|
||||
#define USE_VCP
|
||||
#define VBUS_SENSING_PIN PC5
|
||||
|
@ -127,41 +127,39 @@
|
|||
#define UART3_RX_PIN PB11
|
||||
#define UART3_TX_PIN PB10
|
||||
|
||||
#ifdef CL_RACINGF4
|
||||
#define USE_UART4
|
||||
#define UART4_RX_PIN PA1
|
||||
#define UART4_TX_PIN PA0
|
||||
#endif
|
||||
#define USE_UART6
|
||||
#define UART6_RX_PIN PC7
|
||||
#define UART6_TX_PIN PC6
|
||||
|
||||
#ifdef CL_RACINGF
|
||||
#define SERIAL_PORT_COUNT 5 //VCP, USART1, USART3,USART4, USART6,
|
||||
#if defined(CL_RACINGF4)
|
||||
#define USE_UART4
|
||||
#define UART4_RX_PIN PA1
|
||||
#define UART4_TX_PIN PA0
|
||||
|
||||
#define SERIAL_PORT_COUNT 5 //VCP, USART1, USART3,USART4, USART6,
|
||||
#else
|
||||
#define USE_SOFTSERIAL1
|
||||
#define USE_SOFTSERIAL2
|
||||
#define SERIAL_PORT_COUNT 6 //VCP, USART1, USART3, USART6, SOFTSERIAL x 2
|
||||
#define USE_SOFTSERIAL1
|
||||
#define USE_SOFTSERIAL2
|
||||
|
||||
#define SERIAL_PORT_COUNT 6 //VCP, USART1, USART3, USART6, SOFTSERIAL x 2
|
||||
#endif
|
||||
|
||||
|
||||
#define USE_ESCSERIAL
|
||||
#define ESCSERIAL_TIMER_TX_HARDWARE 0 // PWM 1
|
||||
|
||||
#define USE_SPI
|
||||
#define USE_SPI_DEVICE_1
|
||||
|
||||
#if defined( OMNIBUSF4SD ) || defined( CL_RACINGF4 )
|
||||
#define USE_SPI_DEVICE_2
|
||||
#define SPI2_NSS_PIN PB12
|
||||
#define SPI2_SCK_PIN PB13
|
||||
#define SPI2_MISO_PIN PB14
|
||||
#define SPI2_MOSI_PIN PB15
|
||||
#if defined(OMNIBUSF4SD) || defined(CL_RACINGF4)
|
||||
#define USE_SPI_DEVICE_2
|
||||
#define SPI2_NSS_PIN PB12
|
||||
#define SPI2_SCK_PIN PB13
|
||||
#define SPI2_MISO_PIN PB14
|
||||
#define SPI2_MOSI_PIN PB15
|
||||
#endif
|
||||
|
||||
#define USE_SPI_DEVICE_3
|
||||
#if defined( OMNIBUSF4SD ) || defined( CL_RACINGF4 )
|
||||
#if defined(OMNIBUSF4SD) || defined(CL_RACINGF4)
|
||||
#define SPI3_NSS_PIN PA15
|
||||
#else
|
||||
#define SPI3_NSS_PIN PB3
|
||||
|
@ -173,15 +171,16 @@
|
|||
#define USE_ADC
|
||||
#define CURRENT_METER_ADC_PIN PC1
|
||||
#define VBAT_ADC_PIN PC2
|
||||
#if defined(CL_RACINGF4)
|
||||
#define RSSI_ADC_PIN PC3
|
||||
#else
|
||||
//#define RSSI_ADC_PIN PA0
|
||||
#ifdef CL_RACINGF3
|
||||
#define RSSI_ADC_PIN PC3
|
||||
#endif
|
||||
|
||||
#define USE_ESC_SENSOR
|
||||
#define DEFAULT_RX_FEATURE FEATURE_RX_SERIAL
|
||||
#define AVOID_UART1_FOR_PWM_PPM
|
||||
#ifdef CL_RACINGF4
|
||||
#if defined(CL_RACINGF4)
|
||||
#define DEFAULT_FEATURES (FEATURE_BLACKBOX |FEATURE_CURRENT_METER | FEATURE_TELEMETRY| FEATURE_VBAT | FEATURE_OSD )
|
||||
#else
|
||||
#define DEFAULT_FEATURES (FEATURE_BLACKBOX | FEATURE_VBAT | FEATURE_OSD)
|
||||
|
|
|
@ -1,9 +1,9 @@
|
|||
F405_TARGETS += $(TARGET)
|
||||
|
||||
ifeq ($(TARGET), CL_RACINGF4)
|
||||
FEATURES += VCP SDCARD
|
||||
FEATURES = VCP SDCARD
|
||||
else
|
||||
FEATURES += VCP ONBOARDFLASH
|
||||
FEATURES += VCP ONBOARDFLASH
|
||||
endif
|
||||
|
||||
TARGET_SRC = \
|
||||
|
|
Loading…
Reference in New Issue