Merge pull request #718 from SergDoc/master
fix target F4BY a new firmvare
This commit is contained in:
Martin Budden
GitHub
commit
cb3f65482f
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@ -14,6 +14,7 @@ const uint16_t multiPPM[] = {
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PWM14 | (MAP_TO_MOTOR_OUTPUT << 8),
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PWM15 | (MAP_TO_MOTOR_OUTPUT << 8), // Swap to servo if needed
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PWM16 | (MAP_TO_MOTOR_OUTPUT << 8), // Swap to servo if needed
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PWM8 | (MAP_TO_SERVO_OUTPUT << 8), // Swap to servo if needed
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PWM7 | (MAP_TO_SERVO_OUTPUT << 8), // Swap to servo if needed
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PWM6 | (MAP_TO_SERVO_OUTPUT << 8), // Swap to servo if needed
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PWM5 | (MAP_TO_SERVO_OUTPUT << 8), // Swap to servo if needed
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@ -30,8 +31,8 @@ const uint16_t multiPWM[] = {
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PWM4 | (MAP_TO_PWM_INPUT << 8),
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PWM5 | (MAP_TO_PWM_INPUT << 8),
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PWM6 | (MAP_TO_PWM_INPUT << 8),
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PWM7 | (MAP_TO_PWM_INPUT << 8),
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PWM8 | (MAP_TO_PWM_INPUT << 8), // input #8
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PWM7 | (MAP_TO_SERVO_OUTPUT << 8),
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PWM8 | (MAP_TO_SERVO_OUTPUT << 8), // input #8
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PWM9 | (MAP_TO_MOTOR_OUTPUT << 8), // motor #1
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PWM10 | (MAP_TO_MOTOR_OUTPUT << 8), // motor #2
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PWM11 | (MAP_TO_MOTOR_OUTPUT << 8),
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@ -83,22 +84,24 @@ const uint16_t airPWM[] = {
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};
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const timerHardware_t timerHardware[USABLE_TIMER_CHANNEL_COUNT] = {
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{ TIM3, IO_TAG(PC9), TIM_Channel_4, TIM3_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM3, 0}, // S1_IN
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{ TIM3, IO_TAG(PC8), TIM_Channel_3, TIM3_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM3, 0}, // S2_IN
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{ TIM3, IO_TAG(PC6), TIM_Channel_1, TIM3_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM3, 0}, // S3_IN
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{ TIM3, IO_TAG(PC7), TIM_Channel_2, TIM3_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM3, 0}, // S4_IN
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{ TIM4, IO_TAG(PD15), TIM_Channel_4, TIM4_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM4, 0}, // S5_IN
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{ TIM4, IO_TAG(PD14), TIM_Channel_3, TIM4_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM4, 0}, // S6_IN
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{ TIM4, IO_TAG(PD13), TIM_Channel_2, TIM4_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM4, 0}, // S7_IN
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{ TIM4, IO_TAG(PD12), TIM_Channel_1, TIM4_IRQn, IOCFG_IPD, GPIO_Mode_AF, GPIO_AF_TIM4, 0}, // S8_IN
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{ TIM3, IO_TAG(PC9), TIM_Channel_4, TIM3_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM3}, // S1_IN
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{ TIM3, IO_TAG(PC8), TIM_Channel_3, TIM3_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM3}, // S2_IN
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{ TIM3, IO_TAG(PC6), TIM_Channel_1, TIM3_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM3}, // S3_IN
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{ TIM3, IO_TAG(PC7), TIM_Channel_2, TIM3_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM3}, // S4_IN
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{ TIM4, IO_TAG(PD15), TIM_Channel_4, TIM4_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM4}, // S5_IN
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{ TIM4, IO_TAG(PD14), TIM_Channel_3, TIM4_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM4}, // S6_IN
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{ TIM4, IO_TAG(PD13), TIM_Channel_2, TIM4_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM4}, // S7_IN
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{ TIM4, IO_TAG(PD12), TIM_Channel_1, TIM4_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM4}, // S8_IN
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{ TIM2, IO_TAG(PA0), TIM_Channel_1, TIM2_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM2, 0}, // S1_OUT
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{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM2_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM2, 0}, // S2_OUT
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{ TIM5, IO_TAG(PA2), TIM_Channel_3, TIM5_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM5, 0}, // S3_OUT
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{ TIM5, IO_TAG(PA3), TIM_Channel_4, TIM5_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM5, 0}, // S4_OUT
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{ TIM1, IO_TAG(PE9), TIM_Channel_1, TIM1_CC_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM1, 0}, // S5_OUT
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{ TIM1, IO_TAG(PE11), TIM_Channel_2, TIM1_CC_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM1, 0}, // S6_OUT
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{ TIM1, IO_TAG(PE13), TIM_Channel_3, TIM1_CC_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM1, 0}, // S7_OUT
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{ TIM1, IO_TAG(PE14), TIM_Channel_4, TIM1_CC_IRQn, IOCFG_AF_PP_PD, GPIO_Mode_AF, GPIO_AF_TIM1, 0}, // S8_OUT
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{ TIM2, IO_TAG(PA0), TIM_Channel_1, TIM2_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM2}, // S1_OUT
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{ TIM2, IO_TAG(PA1), TIM_Channel_2, TIM2_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM2}, // S2_OUT
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{ TIM5, IO_TAG(PA2), TIM_Channel_3, TIM5_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM5}, // S3_OUT
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{ TIM5, IO_TAG(PA3), TIM_Channel_4, TIM5_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM5}, // S4_OUT
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{ TIM1, IO_TAG(PE9), TIM_Channel_1, TIM1_CC_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM1}, // S5_OUT
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{ TIM1, IO_TAG(PE11), TIM_Channel_2, TIM1_CC_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM1}, // S6_OUT
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{ TIM1, IO_TAG(PE13), TIM_Channel_3, TIM1_CC_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM1}, // S7_OUT
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{ TIM1, IO_TAG(PE14), TIM_Channel_4, TIM1_CC_IRQn, 1, IOCFG_AF_PP, GPIO_AF_TIM1}, // S8_OUT
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{ TIM9, IO_TAG(PE6), TIM_Channel_2, TIM1_BRK_TIM9_IRQn, 0, IOCFG_AF_PP, GPIO_AF_TIM9 }, // sonar echo if needed
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};
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@ -58,45 +58,53 @@
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#define USE_SDCARD
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#define SDCARD_SPI_INSTANCE SPI3
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#define SDCARD_SPI_INSTANCE SPI2
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#define SDCARD_SPI_CS_PIN PE15
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// SPI3 is on the APB1 bus whose clock runs at 84MHz. Divide to under 400kHz for init:
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// SPI2 is on the APB1 bus whose clock runs at 84MHz. Divide to under 400kHz for init:
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#define SDCARD_SPI_INITIALIZATION_CLOCK_DIVIDER 256 // 328kHz
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// Divide to under 25MHz for normal operation:
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#define SDCARD_SPI_FULL_SPEED_CLOCK_DIVIDER 4 // 21MHz
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#define SDCARD_SPI_FULL_SPEED_CLOCK_DIVIDER 4 // 21MHz
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#define SDCARD_DMA_CHANNEL_TX DMA1_Stream4
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#define SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG DMA_FLAG_TCIF4
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#define SDCARD_DMA_CHANNEL_TX DMA1_Stream3
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#define SDCARD_DMA_CHANNEL_TX_COMPLETE_FLAG DMA_FLAG_TCIF3
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#define SDCARD_DMA_CLK RCC_AHB1Periph_DMA1
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#define SDCARD_DMA_CHANNEL DMA_Channel_0
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// Performance logging for SD card operations:
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#define USABLE_TIMER_CHANNEL_COUNT 16
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#define USABLE_TIMER_CHANNEL_COUNT 17
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#define USE_VCP
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#define VBUS_SENSING_PIN PA9
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#define USE_USART1
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#define USART1_RX_PIN PB7
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#define USART1_TX_PIN PB6
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#define USART1_AHB1_PERIPHERALS RCC_AHB1Periph_DMA2
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#define USE_UART1
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#define UART1_RX_PIN PB7
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#define UART1_TX_PIN PB6
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#define UART1_AHB1_PERIPHERALS RCC_AHB1Periph_DMA2
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#define USE_USART2
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#define USART2_RX_PIN PD6
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#define USART2_TX_PIN PD5
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#define USE_UART2
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#define UART2_RX_PIN PD6
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#define UART2_TX_PIN PD5
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#define USE_USART3
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#define USART3_RX_PIN PD9
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#define USART3_TX_PIN PD8
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#define USE_UART3
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#define UART3_RX_PIN PD9
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#define UART3_TX_PIN PD8
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#define USE_USART6
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#define USART6_RX_PIN PC7
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#define USART6_TX_PIN PC6
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#define USE_UART4
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#define UART4_RX_PIN PC11
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#define UART4_TX_PIN PC10
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//#define USE_UART5 - error in DMA!!!
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//#define UART5_RX_PIN PD2
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//#define UART5_TX_PIN PC12
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#define USE_UART6
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#define UART6_RX_PIN PC7
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#define UART6_TX_PIN PC6
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#define SERIAL_PORT_COUNT 5
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#define SERIAL_PORT_COUNT 6 //VCP, UART1, UART2, UART3, UART4, UART5, UART6
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#define USE_SPI
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@ -106,12 +114,18 @@
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#define SPI1_MOSI_PIN PA7
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#define SPI1_NSS_PIN NONE
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#define USE_SPI_DEVICE_2
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#define SPI2_NSS_PIN NONE
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#define SPI2_SCK_PIN PB13
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#define SPI2_MISO_PIN PB14
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#define SPI2_MOSI_PIN PB15
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#define USE_SPI_DEVICE_3
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#define SPI3_NSS_PIN NONE
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#define SPI2_SCK_PIN PB3
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#define SPI2_MISO_PIN PB4
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#define SPI2_MOSI_PIN PB5
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#define SPI3_NSS_PIN PA15
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#define SPI3_SCK_PIN PB3
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#define SPI3_MISO_PIN PB4
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#define SPI3_MOSI_PIN PB5
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#define USE_I2C
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@ -121,31 +135,20 @@
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#define I2C2_SDA PB11
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#define USE_ADC
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//#define BOARD_HAS_VOLTAGE_DIVIDER
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#define BOARD_HAS_VOLTAGE_DIVIDER
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#define VBAT_ADC_PIN PC3
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#define CURRENT_METER_ADC_PIN PC2
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#define RSSI_ADC_PIN PC1
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#define SENSORS_SET (SENSOR_ACC)
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// alternative defaults for F4BY
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//#define F4BY
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#define SPEKTRUM_BIND
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// USART6, PC7
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#define BIND_PIN PC7
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#define HARDWARE_BIND_PLUG
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// Hardware bind plug at PB2 (Pin 28)
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#define BINDPLUG_PIN PB2
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#define DEFAULT_FEATURES (FEATURE_VBAT | FEATURE_BLACKBOX | FEATURE_ONESHOT125)
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#define DEFAULT_RX_FEATURE FEATURE_RX_SERIAL
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#define SERIALRX_PROVIDER SERIALRX_SBUS
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#define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
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#define BRUSHED_MOTORS
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#define DEFAULT_RX_FEATURE FEATURE_RX_SERIAL
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#define DEFAULT_FEATURES (FEATURE_MOTOR_STOP | FEATURE_BLACKBOX)
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#define SPEKTRUM_BIND
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// UART6, PC7
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#define BIND_PIN PC7
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#define USE_SERIAL_4WAY_BLHELI_INTERFACE
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@ -155,5 +158,5 @@
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#define TARGET_IO_PORTD 0xffff
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#define TARGET_IO_PORTE 0xffff
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#define USED_TIMERS ( TIM_N(1) |TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(8) )
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#define USED_TIMERS ( TIM_N(1) |TIM_N(2) | TIM_N(3) | TIM_N(4) | TIM_N(5) | TIM_N(8) | TIM_N(9))
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