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[G4] SPI support

This commit is contained in:
jflyper 2019-07-08 23:53:27 +09:00
parent 287741b816
commit d316309ff5
4 changed files with 72 additions and 9 deletions
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8
src/main/drivers/bus_spi.h
View File

@ -33,7 +33,7 @@
#define SPI_IO_AF_SCK_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_DOWN)
#define SPI_IO_AF_MISO_CFG IO_CONFIG(GPIO_Mode_AF, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_UP)
#define SPI_IO_CS_CFG IO_CONFIG(GPIO_Mode_OUT, GPIO_Speed_50MHz, GPIO_OType_PP, GPIO_PuPd_NOPULL)
#elif defined(STM32F7) || defined(STM32H7)
#elif defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
#define SPI_IO_AF_CFG IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_NOPULL)
#define SPI_IO_AF_SCK_CFG_HIGH IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLUP)
#define SPI_IO_AF_SCK_CFG_LOW IO_CONFIG(GPIO_MODE_AF_PP, GPIO_SPEED_FREQ_VERY_HIGH, GPIO_PULLDOWN)
@ -67,6 +67,12 @@ typedef enum {
SPI_CLOCK_STANDARD = 8, //12.00000 MHz
SPI_CLOCK_FAST = 4, //25.00000 MHz
SPI_CLOCK_ULTRAFAST = 2 //50.00000 MHz
#elif defined(STM32G4)
// @170MHz
SPI_CLOCK_SLOW = 128, //00.78125 MHz
SPI_CLOCK_STANDARD = 16, //10.62500 MHz
SPI_CLOCK_FAST = 8, //21.25000 MHz
SPI_CLOCK_ULTRAFAST = 4 //42.50000 MHz
#else
SPI_CLOCK_SLOW = 128, //00.56250 MHz
SPI_CLOCK_STANDARD = 4, //09.00000 MHz

4
src/main/drivers/bus_spi_hal.c
View File

@ -60,7 +60,7 @@ void spiInitDevice(SPIDevice device, bool leadingEdge)
IOConfigGPIOAF(IOGetByTag(spi->mosi), SPI_IO_AF_CFG, spi->af);
#endif
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
IOConfigGPIOAF(IOGetByTag(spi->sck), spi->leadingEdge ? SPI_IO_AF_SCK_CFG_LOW : SPI_IO_AF_SCK_CFG_HIGH, spi->sckAF);
IOConfigGPIOAF(IOGetByTag(spi->miso), SPI_IO_AF_MISO_CFG, spi->misoAF);
IOConfigGPIOAF(IOGetByTag(spi->mosi), SPI_IO_AF_CFG, spi->mosiAF);
@ -85,8 +85,10 @@ void spiInitDevice(SPIDevice device, bool leadingEdge)
spi->hspi.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
spi->hspi.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
spi->hspi.Init.TIMode = SPI_TIMODE_DISABLED;
#if !defined(STM32G4)
spi->hspi.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA;
spi->hspi.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_ENABLE; /* Recommanded setting to avoid glitches */
#endif
if (spi->leadingEdge) {
spi->hspi.Init.CLKPolarity = SPI_POLARITY_LOW;

6
src/main/drivers/bus_spi_impl.h
View File

@ -20,7 +20,7 @@
#pragma once
#if defined(STM32F1) || defined(STM32F3) || defined(STM32F4)
#if defined(STM32F1) || defined(STM32F3) || defined(STM32F4) || defined(STM32G4)
#define MAX_SPI_PIN_SEL 2
#elif defined(STM32F7)
#define MAX_SPI_PIN_SEL 4
@ -32,7 +32,7 @@
typedef struct spiPinDef_s {
ioTag_t pin;
#if defined(STM32F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
uint8_t af;
#endif
} spiPinDef_t;
@ -59,7 +59,7 @@ typedef struct SPIDevice_s {
ioTag_t sck;
ioTag_t miso;
ioTag_t mosi;
#if defined(STM32F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
uint8_t sckAF;
uint8_t misoAF;
uint8_t mosiAF;

63
src/main/drivers/bus_spi_pinconfig.c
View File

@ -392,6 +392,61 @@ const spiHardware_t spiHardware[] = {
//.dmaIrqHandler = DMA2_ST1_HANDLER,
},
#endif
#ifdef STM32G4
{
.device = SPIDEV_1,
.reg = SPI1,
.sckPins = {
{ DEFIO_TAG_E(PA5), GPIO_AF5_SPI1 },
{ DEFIO_TAG_E(PB3), GPIO_AF5_SPI1 },
},
.misoPins = {
{ DEFIO_TAG_E(PA6), GPIO_AF5_SPI1 },
{ DEFIO_TAG_E(PB4), GPIO_AF5_SPI1 },
},
.mosiPins = {
{ DEFIO_TAG_E(PA7), GPIO_AF5_SPI1 },
{ DEFIO_TAG_E(PB5), GPIO_AF5_SPI1 },
},
.rcc = RCC_APB2(SPI1),
//.dmaIrqHandler = DMA2_ST3_HANDLER,
},
{
.device = SPIDEV_2,
.reg = SPI2,
.sckPins = {
{ DEFIO_TAG_E(PB13), GPIO_AF5_SPI2 },
},
.misoPins = {
{ DEFIO_TAG_E(PA10), GPIO_AF5_SPI2 },
{ DEFIO_TAG_E(PB14), GPIO_AF5_SPI2 },
},
.mosiPins = {
{ DEFIO_TAG_E(PA11), GPIO_AF5_SPI2 },
{ DEFIO_TAG_E(PB15), GPIO_AF5_SPI2 },
},
.rcc = RCC_APB11(SPI2),
//.dmaIrqHandler = DMA1_ST4_HANDLER,
},
{
.device = SPIDEV_3,
.reg = SPI3,
.sckPins = {
{ DEFIO_TAG_E(PB3), GPIO_AF6_SPI3 },
{ DEFIO_TAG_E(PC10), GPIO_AF6_SPI3 },
},
.misoPins = {
{ DEFIO_TAG_E(PB4), GPIO_AF6_SPI3 },
{ DEFIO_TAG_E(PC11), GPIO_AF6_SPI3 },
},
.mosiPins = {
{ DEFIO_TAG_E(PB5), GPIO_AF6_SPI3 },
{ DEFIO_TAG_E(PC12), GPIO_AF6_SPI3 },
},
.rcc = RCC_APB11(SPI3),
//.dmaIrqHandler = DMA1_ST7_HANDLER,
},
#endif
};
void spiPinConfigure(const spiPinConfig_t *pConfig)
@ -409,19 +464,19 @@ void spiPinConfigure(const spiPinConfig_t *pConfig)
for (int pindex = 0 ; pindex < MAX_SPI_PIN_SEL ; pindex++) {
if (pConfig[device].ioTagSck == hw->sckPins[pindex].pin) {
pDev->sck = hw->sckPins[pindex].pin;
#if defined(STM32F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
pDev->sckAF = hw->sckPins[pindex].af;
#endif
}
if (pConfig[device].ioTagMiso == hw->misoPins[pindex].pin) {
pDev->miso = hw->misoPins[pindex].pin;
#if defined(STM32F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
pDev->misoAF = hw->misoPins[pindex].af;
#endif
}
if (pConfig[device].ioTagMosi == hw->mosiPins[pindex].pin) {
pDev->mosi = hw->mosiPins[pindex].pin;
#if defined(STM32F7) || defined(STM32H7)
#if defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
pDev->mosiAF = hw->mosiPins[pindex].af;
#endif
}
@ -429,7 +484,7 @@ void spiPinConfigure(const spiPinConfig_t *pConfig)
if (pDev->sck && pDev->miso && pDev->mosi) {
pDev->dev = hw->reg;
#if !(defined(STM32F7) || defined(STM32H7))
#if !(defined(STM32F7) || defined(STM32H7) || defined(STM32G4))
pDev->af = hw->af;
#endif
pDev->rcc = hw->rcc;