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Refactored UART pin config similarly to SPI to accomodate F765

This commit is contained in:
Andrey Mironov 2018-09-07 23:21:17 +03:00
parent 8073cb8665
commit d6861b0842
6 changed files with 117 additions and 106 deletions
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19
src/main/drivers/serial_uart_impl.h
View File

@ -114,6 +114,13 @@
#define UARTDEV_COUNT (UARTDEV_COUNT_1 + UARTDEV_COUNT_2 + UARTDEV_COUNT_3 + UARTDEV_COUNT_4 + UARTDEV_COUNT_5 + UARTDEV_COUNT_6 + UARTDEV_COUNT_7 + UARTDEV_COUNT_8)
typedef struct uartPinDef_s {
ioTag_t pin;
#if defined(STM32F7)
uint8_t af;
#endif
} uartPinDef_t;
typedef struct uartHardware_s {
UARTDevice_e device; // XXX Not required for full allocation
USART_TypeDef* reg;
@ -125,8 +132,8 @@ typedef struct uartHardware_s {
DMA_Stream_TypeDef *txDMAStream;
DMA_Stream_TypeDef *rxDMAStream;
#endif
ioTag_t rxPins[UARTHARDWARE_MAX_PINS];
ioTag_t txPins[UARTHARDWARE_MAX_PINS];
uartPinDef_t rxPins[UARTHARDWARE_MAX_PINS];
uartPinDef_t txPins[UARTHARDWARE_MAX_PINS];
#if defined(STM32F7)
uint32_t rcc_ahb1;
rccPeriphTag_t rcc_apb2;
@ -134,9 +141,7 @@ typedef struct uartHardware_s {
#else
rccPeriphTag_t rcc;
#endif
#if defined(STM32F7)
uint8_t afs[UARTHARDWARE_MAX_PINS];
#else
#if !defined(STM32F7)
uint8_t af;
#endif
#if defined(STM32F7)
@ -159,6 +164,10 @@ typedef struct uartDevice_s {
const uartHardware_t *hardware;
ioTag_t rx;
ioTag_t tx;
#if defined(STM32F7)
uint8_t rxAF;
uint8_t txAF;
#endif
volatile uint8_t rxBuffer[UART_RX_BUFFER_SIZE];
volatile uint8_t txBuffer[UART_TX_BUFFER_SIZE];
} uartDevice_t;

12
src/main/drivers/serial_uart_pinconfig.c
View File

@ -52,11 +52,19 @@ void uartPinConfigure(const serialPinConfig_t *pSerialPinConfig)
const UARTDevice_e device = hardware->device;
for (int pindex = 0 ; pindex < UARTHARDWARE_MAX_PINS ; pindex++) {
if (hardware->rxPins[pindex] && (hardware->rxPins[pindex] == pSerialPinConfig->ioTagRx[device]))
if (hardware->rxPins[pindex].pin == pSerialPinConfig->ioTagRx[device]) {
uartdev->rx = pSerialPinConfig->ioTagRx[device];
#if defined(STM32F7)
uartdev->rxAF = hardware->rxPins[pindex].af;
#endif
}
if (hardware->txPins[pindex] && (hardware->txPins[pindex] == pSerialPinConfig->ioTagTx[device]))
if (hardware->txPins[pindex].pin == pSerialPinConfig->ioTagTx[device]) {
uartdev->tx = pSerialPinConfig->ioTagTx[device];
#if defined(STM32F7)
uartdev->txAF = hardware->txPins[pindex].af;
#endif
}
}
if (uartdev->rx || uartdev->tx) {

12
src/main/drivers/serial_uart_stm32f10x.c
View File

@ -67,8 +67,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART1,
.rxDMAChannel = UART1_RX_DMA_CHANNEL,
.txDMAChannel = UART1_TX_DMA_CHANNEL,
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PA10) }, { DEFIO_TAG_E(PB7) } },
.txPins = { { DEFIO_TAG_E(PA9) }, { DEFIO_TAG_E(PB6) } },
//.af = GPIO_AF_USART1,
.rcc = RCC_APB2(USART1),
.irqn = USART1_IRQn,
@ -82,8 +82,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART2,
.rxDMAChannel = UART2_RX_DMA_CHANNEL,
.txDMAChannel = UART2_TX_DMA_CHANNEL,
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PA3) }, { DEFIO_TAG_E(PD6) } },
.txPins = { { DEFIO_TAG_E(PA2) }, { DEFIO_TAG_E(PD5) } },
//.af = GPIO_AF_USART2,
.rcc = RCC_APB1(USART2),
.irqn = USART2_IRQn,
@ -97,8 +97,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART3,
.rxDMAChannel = UART3_RX_DMA_CHANNEL,
.txDMAChannel = UART3_TX_DMA_CHANNEL,
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PD9), DEFIO_TAG_E(PC11) },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PD8), DEFIO_TAG_E(PC10) },
.rxPins = { { DEFIO_TAG_E(PB11) }, { DEFIO_TAG_E(PD9) }, { DEFIO_TAG_E(PC11) } },
.txPins = { { DEFIO_TAG_E(PB10) }, { DEFIO_TAG_E(PD8) }, { DEFIO_TAG_E(PC10) } },
//.af = GPIO_AF_USART3,
.rcc = RCC_APB1(USART3),
.irqn = USART3_IRQn,

20
src/main/drivers/serial_uart_stm32f30x.c
View File

@ -90,8 +90,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART1,
.rxDMAChannel = UART1_RX_DMA,
.txDMAChannel = UART1_TX_DMA,
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), DEFIO_TAG_E(PC5), DEFIO_TAG_E(PE1) },
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), DEFIO_TAG_E(PC4), DEFIO_TAG_E(PE0) },
.rxPins = { { DEFIO_TAG_E(PA10) }, { DEFIO_TAG_E(PB7) }, { DEFIO_TAG_E(PC5) }, { DEFIO_TAG_E(PE1) } },
.txPins = { { DEFIO_TAG_E(PA9) }, { DEFIO_TAG_E(PB6) }, { DEFIO_TAG_E(PC4) }, { DEFIO_TAG_E(PE0) } },
.rcc = RCC_APB2(USART1),
.af = GPIO_AF_7,
.irqn = USART1_IRQn,
@ -106,8 +106,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART2,
.rxDMAChannel = UART2_RX_DMA,
.txDMAChannel = UART2_TX_DMA,
.rxPins = { DEFIO_TAG_E(PA15), DEFIO_TAG_E(PA3), DEFIO_TAG_E(PB4), DEFIO_TAG_E(PD6) },
.txPins = { DEFIO_TAG_E(PA14), DEFIO_TAG_E(PA2), DEFIO_TAG_E(PB3), DEFIO_TAG_E(PD5) },
.rxPins = { { DEFIO_TAG_E(PA15) }, { DEFIO_TAG_E(PA3) }, { DEFIO_TAG_E(PB4) }, { DEFIO_TAG_E(PD6) } },
.txPins = { { DEFIO_TAG_E(PA14) }, { DEFIO_TAG_E(PA2) }, { DEFIO_TAG_E(PB3) }, { DEFIO_TAG_E(PD5) } },
.rcc = RCC_APB1(USART2),
.af = GPIO_AF_7,
.irqn = USART2_IRQn,
@ -122,8 +122,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = USART3,
.rxDMAChannel = UART3_RX_DMA,
.txDMAChannel = UART3_TX_DMA,
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PB11) }, { DEFIO_TAG_E(PC11) }, { DEFIO_TAG_E(PD9) } },
.txPins = { { DEFIO_TAG_E(PB10) }, { DEFIO_TAG_E(PC10) }, { DEFIO_TAG_E(PD8) } },
.rcc = RCC_APB1(USART3),
.af = GPIO_AF_7,
.irqn = USART3_IRQn,
@ -139,8 +139,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = UART4,
.rxDMAChannel = 0, // XXX UART4_RX_DMA !?
.txDMAChannel = 0, // XXX UART4_TX_DMA !?
.rxPins = { DEFIO_TAG_E(PC11), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC10), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PC11) } },
.txPins = { { DEFIO_TAG_E(PC10) } },
.rcc = RCC_APB1(UART4),
.af = GPIO_AF_5,
.irqn = UART4_IRQn,
@ -156,8 +156,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.reg = UART5,
.rxDMAChannel = 0,
.txDMAChannel = 0,
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PD2) } },
.txPins = { { DEFIO_TAG_E(PC12) } },
.rcc = RCC_APB1(UART5),
.af = GPIO_AF_5,
.irqn = UART5_IRQn,

24
src/main/drivers/serial_uart_stm32f4xx.c
View File

@ -51,8 +51,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART1_TX_DMA
.txDMAStream = DMA2_Stream7,
#endif
.rxPins = { DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PA10) }, { DEFIO_TAG_E(PB7) } },
.txPins = { { DEFIO_TAG_E(PA9) }, { DEFIO_TAG_E(PB6) } },
.af = GPIO_AF_USART1,
.rcc = RCC_APB2(USART1),
.irqn = USART1_IRQn,
@ -72,8 +72,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART2_TX_DMA
.txDMAStream = DMA1_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PA3) }, { DEFIO_TAG_E(PD6) } },
.txPins = { { DEFIO_TAG_E(PA2) }, { DEFIO_TAG_E(PD5) } },
.af = GPIO_AF_USART2,
.rcc = RCC_APB1(USART2),
.irqn = USART2_IRQn,
@ -93,8 +93,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART3_TX_DMA
.txDMAStream = DMA1_Stream3,
#endif
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9) },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8) },
.rxPins = { { DEFIO_TAG_E(PB11) }, { DEFIO_TAG_E(PC11) }, { DEFIO_TAG_E(PD9) } },
.txPins = { { DEFIO_TAG_E(PB10) }, { DEFIO_TAG_E(PC10) }, { DEFIO_TAG_E(PD8) } },
.af = GPIO_AF_USART3,
.rcc = RCC_APB1(USART3),
.irqn = USART3_IRQn,
@ -114,8 +114,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART4_TX_DMA
.txDMAStream = DMA1_Stream4,
#endif
.rxPins = { DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PA1) }, { DEFIO_TAG_E(PC11) } },
.txPins = { { DEFIO_TAG_E(PA0) }, { DEFIO_TAG_E(PC10) } },
.af = GPIO_AF_UART4,
.rcc = RCC_APB1(UART4),
.irqn = UART4_IRQn,
@ -135,8 +135,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART5_TX_DMA
.txDMAStream = DMA1_Stream7,
#endif
.rxPins = { DEFIO_TAG_E(PD2), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC12), IO_TAG_NONE, IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PD2) } },
.txPins = { { DEFIO_TAG_E(PC12) } },
.af = GPIO_AF_UART5,
.rcc = RCC_APB1(UART5),
.irqn = UART5_IRQn,
@ -156,8 +156,8 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART6_TX_DMA
.txDMAStream = DMA2_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
.rxPins = { { DEFIO_TAG_E(PC7) }, { DEFIO_TAG_E(PG9) } },
.txPins = { { DEFIO_TAG_E(PC6) }, { DEFIO_TAG_E(PG14) } },
.af = GPIO_AF_USART6,
.rcc = RCC_APB2(USART6),
.irqn = USART6_IRQn,

136
src/main/drivers/serial_uart_stm32f7xx.c
View File

@ -54,24 +54,19 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.txDMAStream = DMA2_Stream7,
#endif
.rxPins = {
DEFIO_TAG_E(PA10), DEFIO_TAG_E(PB7),
{ DEFIO_TAG_E(PA10), GPIO_AF7_USART1 },
{ DEFIO_TAG_E(PB7), GPIO_AF7_USART1 },
#ifdef STM32F765xx
DEFIO_TAG_E(PB15),
#else
IO_TAG_NONE,
{ DEFIO_TAG_E(PB15), GPIO_AF4_USART1 }
#endif
IO_TAG_NONE
},
.txPins = {
DEFIO_TAG_E(PA9), DEFIO_TAG_E(PB6),
{ DEFIO_TAG_E(PA9), GPIO_AF7_USART1 },
{ DEFIO_TAG_E(PB6), GPIO_AF7_USART1 },
#ifdef STM32F765xx
DEFIO_TAG_E(PB14),
#else
IO_TAG_NONE,
{ DEFIO_TAG_E(PB14), GPIO_AF4_USART1 }
#endif
IO_TAG_NONE
},
.afs = { GPIO_AF7_USART1, GPIO_AF7_USART1, GPIO_AF4_USART1 },
#ifdef UART1_AHB1_PERIPHERALS
.rcc_ahb1 = UART1_AHB1_PERIPHERALS,
#endif
@ -94,9 +89,14 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART2_TX_DMA
.txDMAStream = DMA1_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PA3), DEFIO_TAG_E(PD6), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PA2), DEFIO_TAG_E(PD5), IO_TAG_NONE, IO_TAG_NONE },
.afs = { GPIO_AF7_USART2, GPIO_AF7_USART2 },
.rxPins = {
{ DEFIO_TAG_E(PA3), GPIO_AF7_USART2 },
{ DEFIO_TAG_E(PD6), GPIO_AF7_USART2 }
},
.txPins = {
{ DEFIO_TAG_E(PA2), GPIO_AF7_USART2 },
{ DEFIO_TAG_E(PD5), GPIO_AF7_USART2 }
},
#ifdef UART2_AHB1_PERIPHERALS
.rcc_ahb1 = UART2_AHB1_PERIPHERALS,
#endif
@ -119,9 +119,16 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART3_TX_DMA
.txDMAStream = DMA1_Stream3,
#endif
.rxPins = { DEFIO_TAG_E(PB11), DEFIO_TAG_E(PC11), DEFIO_TAG_E(PD9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PB10), DEFIO_TAG_E(PC10), DEFIO_TAG_E(PD8), IO_TAG_NONE },
.afs = { GPIO_AF7_USART3, GPIO_AF7_USART3, GPIO_AF7_USART3 },
.rxPins = {
{ DEFIO_TAG_E(PB11), GPIO_AF7_USART3 },
{ DEFIO_TAG_E(PC11), GPIO_AF7_USART3 },
{ DEFIO_TAG_E(PD9), GPIO_AF7_USART3 }
},
.txPins = {
{ DEFIO_TAG_E(PB10), GPIO_AF7_USART3 },
{ DEFIO_TAG_E(PC10), GPIO_AF7_USART3 },
{ DEFIO_TAG_E(PD8), GPIO_AF7_USART3 }
},
#ifdef UART3_AHB1_PERIPHERALS
.rcc_ahb1 = UART3_AHB1_PERIPHERALS,
#endif
@ -145,26 +152,21 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.txDMAStream = DMA1_Stream4,
#endif
.rxPins = {
DEFIO_TAG_E(PA1), DEFIO_TAG_E(PC11),
{ DEFIO_TAG_E(PA1), GPIO_AF8_UART4 },
{ DEFIO_TAG_E(PC11), GPIO_AF8_UART4 },
#ifdef STM32F765xx
DEFIO_TAG_E(PA11),
DEFIO_TAG_E(PD0),
#else
IO_TAG_NONE,
IO_TAG_NONE
{ DEFIO_TAG_E(PA11), GPIO_AF6_UART4 },
{ DEFIO_TAG_E(PD0), GPIO_AF8_UART4 }
#endif
},
.txPins = {
DEFIO_TAG_E(PA0), DEFIO_TAG_E(PC10),
{ DEFIO_TAG_E(PA0), GPIO_AF8_UART4 },
{ DEFIO_TAG_E(PC10), GPIO_AF8_UART4 },
#ifdef STM32F765xx
DEFIO_TAG_E(PA12),
DEFIO_TAG_E(PD0),
#else
IO_TAG_NONE,
IO_TAG_NONE
{ DEFIO_TAG_E(PA12), GPIO_AF6_UART4 },
{ DEFIO_TAG_E(PD1), GPIO_AF8_UART4 }
#endif
},
.afs = { GPIO_AF8_UART4, GPIO_AF8_UART4, GPIO_AF6_UART4, GPIO_AF8_UART4 },
#ifdef UART4_AHB1_PERIPHERALS
.rcc_ahb1 = UART4_AHB1_PERIPHERALS,
#endif
@ -188,22 +190,21 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.txDMAStream = DMA1_Stream7,
#endif
.rxPins = {
DEFIO_TAG_E(PD2),
{ DEFIO_TAG_E(PD2), GPIO_AF8_UART5 },
#ifdef STM32F765xx
DEFIO_TAG_E(PB5), DEFIO_TAG_E(PB8), DEFIO_TAG_E(PB12),
#else
IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE
{ DEFIO_TAG_E(PB5), GPIO_AF1_UART5 },
{ DEFIO_TAG_E(PB8), GPIO_AF7_UART5 },
{ DEFIO_TAG_E(PB12), GPIO_AF8_UART5 }
#endif
},
.txPins = {
DEFIO_TAG_E(PC12),
{ DEFIO_TAG_E(PC12), GPIO_AF8_UART5 },
#ifdef STM32F765xx
DEFIO_TAG_E(PB6), DEFIO_TAG_E(PB9), DEFIO_TAG_E(PB13),
#else
IO_TAG_NONE, IO_TAG_NONE, IO_TAG_NONE
{ DEFIO_TAG_E(PB6), GPIO_AF1_UART5 },
{ DEFIO_TAG_E(PB9), GPIO_AF7_UART5 },
{ DEFIO_TAG_E(PB13), GPIO_AF8_UART5 }
#endif
},
.afs = { GPIO_AF8_UART5, GPIO_AF1_UART5, GPIO_AF7_UART5, GPIO_AF8_UART5 },
#ifdef UART5_AHB1_PERIPHERALS
.rcc_ahb1 = UART5_AHB1_PERIPHERALS,
#endif
@ -226,9 +227,14 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART6_TX_DMA
.txDMAStream = DMA2_Stream6,
#endif
.rxPins = { DEFIO_TAG_E(PC7), DEFIO_TAG_E(PG9), IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PC6), DEFIO_TAG_E(PG14), IO_TAG_NONE },
.afs = { GPIO_AF8_USART6, GPIO_AF8_USART6 },
.rxPins = {
{ DEFIO_TAG_E(PC7), GPIO_AF8_USART6 },
{ DEFIO_TAG_E(PG9), GPIO_AF8_USART6 }
},
.txPins = {
{ DEFIO_TAG_E(PC6), GPIO_AF8_USART6 },
{ DEFIO_TAG_E(PG14), GPIO_AF8_USART6 }
},
#ifdef UART6_AHB1_PERIPHERALS
.rcc_ahb1 = UART6_AHB1_PERIPHERALS,
#endif
@ -252,22 +258,21 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
.txDMAStream = DMA1_Stream1,
#endif
.rxPins = {
DEFIO_TAG_E(PE7), DEFIO_TAG_E(PF6),
{ DEFIO_TAG_E(PE7), GPIO_AF8_UART7 },
{ DEFIO_TAG_E(PF6), GPIO_AF8_UART7 },
#ifdef STM32F765xx
DEFIO_TAG_E(PA8), DEFIO_TAG_E(PB3),
#else
IO_TAG_NONE, IO_TAG_NONE
{ DEFIO_TAG_E(PA8), GPIO_AF12_UART7 },
{ DEFIO_TAG_E(PB3), GPIO_AF12_UART7 }
#endif
},
.txPins = {
DEFIO_TAG_E(PE8), DEFIO_TAG_E(PF7),
{ DEFIO_TAG_E(PE8), GPIO_AF8_UART7 },
{ DEFIO_TAG_E(PF7), GPIO_AF8_UART7 },
#ifdef STM32F765xx
DEFIO_TAG_E(PA15), DEFIO_TAG_E(PB4),
#else
IO_TAG_NONE, IO_TAG_NONE
{ DEFIO_TAG_E(PA15), GPIO_AF12_UART7 },
{ DEFIO_TAG_E(PB4), GPIO_AF12_UART7 }
#endif
},
.afs = { GPIO_AF8_UART7, GPIO_AF8_UART7, GPIO_AF12_UART7, GPIO_AF12_UART7 },
#ifdef UART7_AHB1_PERIPHERALS
.rcc_ahb1 = UART7_AHB1_PERIPHERALS,
#endif
@ -290,9 +295,12 @@ const uartHardware_t uartHardware[UARTDEV_COUNT] = {
#ifdef USE_UART8_TX_DMA
.txDMAStream = DMA1_Stream0,
#endif
.rxPins = { DEFIO_TAG_E(PE0), IO_TAG_NONE, IO_TAG_NONE },
.txPins = { DEFIO_TAG_E(PE1), IO_TAG_NONE, IO_TAG_NONE },
.afs = { GPIO_AF8_UART8, GPIO_AF8_UART8, 0 },
.rxPins = {
{ DEFIO_TAG_E(PE0), GPIO_AF8_UART8 }
},
.txPins = {
{ DEFIO_TAG_E(PE1), GPIO_AF8_UART8 }
},
#ifdef UART8_AHB1_PERIPHERALS
.rcc_ahb1 = UART8_AHB1_PERIPHERALS,
#endif
@ -433,20 +441,6 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
s->Handle.Instance = hardware->reg;
size_t txPinIndex;
for (txPinIndex = 0; txPinIndex < UARTHARDWARE_MAX_PINS; ++txPinIndex) {
if (hardware->txPins[txPinIndex] == uartdev->tx) {
break;
}
}
size_t rxPinIndex;
for (rxPinIndex = 0; rxPinIndex < UARTHARDWARE_MAX_PINS; ++rxPinIndex) {
if (hardware->rxPins[rxPinIndex] == uartdev->rx) {
break;
}
}
IO_t txIO = IOGetByTag(uartdev->tx);
IO_t rxIO = IOGetByTag(uartdev->rx);
@ -458,17 +452,17 @@ uartPort_t *serialUART(UARTDevice_e device, uint32_t baudRate, portMode_e mode,
);
IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
IOConfigGPIOAF(txIO, ioCfg, hardware->afs[txPinIndex]);
IOConfigGPIOAF(txIO, ioCfg, uartdev->txAF);
}
else {
if ((mode & MODE_TX) && txIO) {
IOInit(txIO, OWNER_SERIAL_TX, RESOURCE_INDEX(device));
IOConfigGPIOAF(txIO, IOCFG_AF_PP, hardware->afs[txPinIndex]);
IOConfigGPIOAF(txIO, IOCFG_AF_PP, uartdev->txAF);
}
if ((mode & MODE_RX) && rxIO) {
IOInit(rxIO, OWNER_SERIAL_RX, RESOURCE_INDEX(device));
IOConfigGPIOAF(rxIO, IOCFG_AF_PP, hardware->afs[rxPinIndex]);
IOConfigGPIOAF(rxIO, IOCFG_AF_PP, uartdev->rxAF);
}
}