Added additional simplified define
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@ -80,6 +80,8 @@
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#define PLL_SAIN 384
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#define PLL_SAIQ 7
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#define PLL_SAIP RCC_PLLSAIP_DIV8
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/**
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* @}
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*/
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@ -181,7 +183,7 @@
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PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLLSAIP;
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PeriphClkInitStruct.PLLSAI.PLLSAIN = PLL_SAIN;
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PeriphClkInitStruct.PLLSAI.PLLSAIQ = PLL_SAIQ;
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PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV8;
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PeriphClkInitStruct.PLLSAI.PLLSAIP = PLL_SAIP;
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if(HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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while(1) {};
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