From f2a27951120d86fef3d795d6df41918b558376a4 Mon Sep 17 00:00:00 2001 From: jflyper Date: Sat, 22 Feb 2020 18:32:54 +0900 Subject: [PATCH] [G4] DMA update for RCC_ClockCmd --- src/main/drivers/dma_stm32g4xx.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/src/main/drivers/dma_stm32g4xx.c b/src/main/drivers/dma_stm32g4xx.c index d06db079b..0af0c895f 100644 --- a/src/main/drivers/dma_stm32g4xx.c +++ b/src/main/drivers/dma_stm32g4xx.c @@ -28,6 +28,7 @@ #include "drivers/nvic.h" #include "drivers/dma.h" +#include "drivers/rcc.h" #include "resource.h" /* @@ -75,18 +76,9 @@ DEFINE_DMA_IRQ_HANDLER(2, 8, DMA2_CH8_HANDLER) static void enableDmaClock(int index) { - // This is essentially copies of __HAL_RCC_DMA{1,2}_CLK_ENABLE macros - // squashed into one. - - const uint32_t rcc = dmaDescriptors[index].dma == DMA1 ? RCC_AHB1ENR_DMA1EN : RCC_AHB1ENR_DMA2EN; - - do { - __IO uint32_t tmpreg; - SET_BIT(RCC->AHB1ENR, rcc); - /* Delay after an RCC peripheral clock enabling */ - tmpreg = READ_BIT(RCC->AHB1ENR, rcc); - UNUSED(tmpreg); - } while (0); + RCC_ClockCmd(dmaDescriptors[index].dma == DMA1 ? RCC_AHB1(DMA1) : RCC_AHB1(DMA2), ENABLE); + // G4 has an independent enable bit for DMAMUX + RCC_ClockCmd(RCC_AHB1(DMAMUX1), ENABLE); } void dmaInit(dmaIdentifier_e identifier, resourceOwner_e owner, uint8_t resourceIndex)