commit
f6870e4189
|
@ -163,6 +163,7 @@ DEVICE_FLAGS += -DSTM32H743xx
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DEFAULT_LD_SCRIPT = $(LINKER_DIR)/stm32_flash_h743_2m.ld
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STARTUP_SRC = startup_stm32h743xx.s
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TARGET_FLASH := 2048
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DEVICE_FLAGS += -DMAX_MPU_REGIONS=16
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else ifeq ($(TARGET),$(filter $(TARGET),$(H750xB_TARGETS)))
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DEVICE_FLAGS += -DSTM32H750xx
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DEFAULT_LD_SCRIPT = $(LINKER_DIR)/stm32_flash_h750_128k.ld
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@ -181,6 +182,13 @@ TARGET_FLASH := FIRMWARE_SIZE
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DEFAULT_LD_SCRIPT = $(LINKER_DIR)/stm32_flash_h750_exst.ld
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endif
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ifeq ($(EXST),yes)
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# Upper 8 regions are reserved for a boot loader in EXST environment
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DEVICE_FLAGS += -DMAX_MPU_REGIONS=8
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else
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DEVICE_FLAGS += -DMAX_MPU_REGIONS=16
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endif
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ifneq ($(DEBUG),GDB)
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OPTIMISE_DEFAULT := -Os
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OPTIMISE_SPEED := -Os
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@ -230,6 +238,8 @@ MCU_COMMON_SRC = \
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drivers/persistent.c \
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drivers/transponder_ir_io_hal.c \
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drivers/audio_stm32h7xx.c \
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drivers/memprot_hal.c \
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drivers/memprot_stm32h7xx.c \
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#drivers/accgyro/accgyro_mpu.c \
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MCU_EXCLUDES = \
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@ -224,13 +224,40 @@ SECTIONS
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.DMA_RAM (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmaram_start = .);
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_sdmaram = .;
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_dmaram_start__ = _sdmaram;
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KEEP(*(.DMA_RAM))
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PROVIDE(dmaram_end = .);
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_edmaram = .;
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_dmaram_end__ = _edmaram;
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} >D2_RAM
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.DMA_RW_D2 (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarw_start = .);
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_sdmarw = .;
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_dmarw_start__ = _sdmarw;
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KEEP(*(.DMA_RW))
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PROVIDE(dmarw_end = .);
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_edmarw = .;
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_dmarw_end__ = _edmarw;
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} >D2_RAM
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.DMA_RW_AXI (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarwaxi_start = .);
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_sdmarwaxi = .;
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_dmarwaxi_start__ = _sdmarwaxi;
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KEEP(*(.DMA_RW_AXI))
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PROVIDE(dmarwaxi_end = .);
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_edmarwaxi = .;
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_dmarwaxi_end__ = _edmarwaxi;
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} >RAM
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.persistent_data (NOLOAD) :
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{
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__persistent_data_start__ = .;
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@ -226,6 +226,30 @@ SECTIONS
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_dmaram_end__ = _edmaram;
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} >D2_RAM
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.DMA_RW_D2 (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarw_start = .);
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_sdmarw = .;
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_dmarw_start__ = _sdmarw;
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KEEP(*(.DMA_RW))
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PROVIDE(dmarw_end = .);
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_edmarw = .;
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_dmarw_end__ = _edmarw;
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} >D2_RAM
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.DMA_RW_AXI (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarwaxi_start = .);
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_sdmarwaxi = .;
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_dmarwaxi_start__ = _sdmarwaxi;
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KEEP(*(.DMA_RW_AXI))
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PROVIDE(dmarwaxi_end = .);
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_edmarwaxi = .;
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_dmarwaxi_end__ = _edmarwaxi;
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} >RAM
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.persistent_data (NOLOAD) :
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{
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__persistent_data_start__ = .;
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@ -241,13 +241,40 @@ SECTIONS
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.DMA_RAM (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmaram_start = .);
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_sdmaram = .;
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_dmaram_start__ = _sdmaram;
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KEEP(*(.DMA_RAM))
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PROVIDE(dmaram_end = .);
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_edmaram = .;
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_dmaram_end__ = _edmaram;
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} >D2_RAM
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.DMA_RW_D2 (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarw_start = .);
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_sdmarw = .;
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_dmarw_start__ = _sdmarw;
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KEEP(*(.DMA_RW))
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PROVIDE(dmarw_end = .);
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_edmarw = .;
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_dmarw_end__ = _edmarw;
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} >D2_RAM
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.DMA_RW_AXI (NOLOAD) :
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{
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. = ALIGN(32);
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PROVIDE(dmarwaxi_start = .);
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_sdmarwaxi = .;
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_dmarwaxi_start__ = _sdmarwaxi;
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KEEP(*(.DMA_RW_AXI))
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PROVIDE(dmarwaxi_end = .);
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_edmarwaxi = .;
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_dmarwaxi_end__ = _edmarwaxi;
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} >RAM
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.persistent_data (NOLOAD) :
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{
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__persistent_data_start__ = .;
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@ -0,0 +1,38 @@
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/*
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* This file is part of Cleanflight and Betaflight.
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*
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* Cleanflight and Betaflight are free software. You can redistribute
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* this software and/or modify this software under the terms of the
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* GNU General Public License as published by the Free Software
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* Foundation, either version 3 of the License, or (at your option)
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* any later version.
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*
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* Cleanflight and Betaflight are distributed in the hope that they
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* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the GNU General Public License for more details.
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*
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||||
* You should have received a copy of the GNU General Public License
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* along with this software.
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*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#pragma once
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typedef struct mpuRegion_s {
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uint32_t start;
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uint32_t end; // Zero if determined by size member (MPU_REGION_SIZE_xxx)
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uint8_t size; // Zero if determined from linker symbols
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uint8_t perm;
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uint8_t exec;
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uint8_t shareable;
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uint8_t cacheable;
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uint8_t bufferable;
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} mpuRegion_t;
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extern mpuRegion_t mpuRegions[];
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extern unsigned mpuRegionCount;
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void memProtReset(void);
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void memProtConfigure(mpuRegion_t *mpuRegions, unsigned regionCount);
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@ -0,0 +1,107 @@
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/*
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* This file is part of Cleanflight and Betaflight.
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||||
*
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||||
* Cleanflight and Betaflight are free software. You can redistribute
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||||
* this software and/or modify this software under the terms of the
|
||||
* GNU General Public License as published by the Free Software
|
||||
* Foundation, either version 3 of the License, or (at your option)
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||||
* any later version.
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||||
*
|
||||
* Cleanflight and Betaflight are distributed in the hope that they
|
||||
* will be useful, but WITHOUT ANY WARRANTY; without even the implied
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||||
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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||||
* See the GNU General Public License for more details.
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||||
*
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||||
* You should have received a copy of the GNU General Public License
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||||
* along with this software.
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||||
*
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <string.h>
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#include "platform.h"
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#include "memprot.h"
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static void memProtConfigError(void)
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{
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for (;;) {}
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}
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void memProtConfigure(mpuRegion_t *regions, unsigned regionCount)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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if (regionCount > MAX_MPU_REGIONS) {
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memProtConfigError();
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}
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HAL_MPU_Disable();
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// Setup common members
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MPU_InitStruct.Enable = MPU_REGION_ENABLE;
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MPU_InitStruct.SubRegionDisable = 0x00;
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MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
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for (unsigned number = 0; number < regionCount; number++) {
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mpuRegion_t *region = ®ions[number];
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if (region->end == 0 && region->size == 0) {
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memProtConfigError();
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}
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MPU_InitStruct.Number = number;
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MPU_InitStruct.BaseAddress = region->start;
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if (region->size) {
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MPU_InitStruct.Size = region->size;
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} else {
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// Adjust start of the region to align with cache line size.
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uint32_t start = region->start & ~0x1F;
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uint32_t length = region->end - start;
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if (length < 32) {
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// This will also prevent flsl from returning negative (case length == 0)
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length = 32;
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}
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int msbpos = flsl(length) - 1;
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if (length == (1U << msbpos)) {
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msbpos += 1;
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}
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MPU_InitStruct.Size = msbpos;
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}
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// Copy per region attributes
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MPU_InitStruct.AccessPermission = region->perm;
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MPU_InitStruct.DisableExec = region->exec;
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MPU_InitStruct.IsShareable = region->shareable;
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MPU_InitStruct.IsCacheable = region->cacheable;
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MPU_InitStruct.IsBufferable = region->bufferable;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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}
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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void memProtReset(void)
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{
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MPU_Region_InitTypeDef MPU_InitStruct;
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/* Disable the MPU */
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HAL_MPU_Disable();
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// Disable existing regions
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for (uint8_t region = 0; region <= MAX_MPU_REGIONS; region++) {
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MPU_InitStruct.Enable = MPU_REGION_DISABLE;
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MPU_InitStruct.Number = region;
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HAL_MPU_ConfigRegion(&MPU_InitStruct);
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}
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HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
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}
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@ -0,0 +1,77 @@
|
|||
/*
|
||||
* This file is part of Cleanflight and Betaflight.
|
||||
*
|
||||
* Cleanflight and Betaflight are free software. You can redistribute
|
||||
* this software and/or modify this software under the terms of the
|
||||
* GNU General Public License as published by the Free Software
|
||||
* Foundation, either version 3 of the License, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* Cleanflight and Betaflight are distributed in the hope that they
|
||||
* will be useful, but WITHOUT ANY WARRANTY; without even the implied
|
||||
* warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
|
||||
* See the GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this software.
|
||||
*
|
||||
* If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include "platform.h"
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#include "memprot.h"
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// Defined in linker script
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extern uint8_t dmaram_start;
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extern uint8_t dmaram_end;
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extern uint8_t dmarwaxi_start;
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extern uint8_t dmarwaxi_end;
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|
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mpuRegion_t mpuRegions[] = {
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#ifdef USE_ITCM_RAM
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{
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||||
// Mark ITCM-RAM as read-only
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// "For Cortex®-M7, TCMs memories always behave as Non-cacheable, Non-shared normal memories, irrespectiveof the memory type attributes defined in the MPU for a memory region containing addresses held in the TCM"
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// See AN4838
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.start = 0x00000000,
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.end = 0, // Size defined by "size"
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.size = MPU_REGION_SIZE_64KB,
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.perm = MPU_REGION_PRIV_RO_URO,
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.exec = MPU_INSTRUCTION_ACCESS_ENABLE,
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.shareable = MPU_ACCESS_NOT_SHAREABLE,
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.cacheable = MPU_ACCESS_NOT_CACHEABLE,
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.bufferable = MPU_ACCESS_BUFFERABLE,
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},
|
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#endif
|
||||
{
|
||||
// DMA transmit buffer in D2 SRAM1
|
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// Reading needs cache coherence operation
|
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.start = (uint32_t)&dmaram_start,
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.end = (uint32_t)&dmaram_end,
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.size = 0, // Size determined by ".end"
|
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.perm = MPU_REGION_FULL_ACCESS,
|
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.exec = MPU_INSTRUCTION_ACCESS_ENABLE,
|
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.shareable = MPU_ACCESS_SHAREABLE,
|
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.cacheable = MPU_ACCESS_CACHEABLE,
|
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.bufferable = MPU_ACCESS_NOT_BUFFERABLE,
|
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},
|
||||
#ifdef USE_SDCARD_SDIO
|
||||
{
|
||||
// A region in AXI RAM accessible from SDIO internal DMA
|
||||
.start = (uint32_t)&dmarwaxi_start,
|
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.end = (uint32_t)&dmarwaxi_end,
|
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.size = 0, // Size determined by ".end"
|
||||
.perm = MPU_REGION_FULL_ACCESS,
|
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.exec = MPU_INSTRUCTION_ACCESS_ENABLE,
|
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.shareable = MPU_ACCESS_NOT_SHAREABLE,
|
||||
.cacheable = MPU_ACCESS_CACHEABLE,
|
||||
.bufferable = MPU_ACCESS_NOT_BUFFERABLE,
|
||||
},
|
||||
#endif
|
||||
};
|
||||
|
||||
unsigned mpuRegionCount = ARRAYLEN(mpuRegions);
|
||||
|
||||
STATIC_ASSERT(ARRAYLEN(mpuRegions) <= MAX_MPU_REGIONS, MPU_region_count_exceeds_limit);
|
|
@ -176,31 +176,6 @@ bool isMPUSoftReset(void)
|
|||
|
||||
void systemInit(void)
|
||||
{
|
||||
#ifdef USE_ITCM_RAM
|
||||
// Mark ITCM-RAM as read-only
|
||||
HAL_MPU_Disable();
|
||||
|
||||
// "For Cortex®-M7, TCMs memories always behave as Non-cacheable, Non-shared normal memories, irrespective of the memory type attributes defined in the MPU for a memory region containing addresses held in the TCM"
|
||||
// See AN4838
|
||||
|
||||
MPU_Region_InitTypeDef MPU_InitStruct;
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
MPU_InitStruct.BaseAddress = 0x00000000;
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_64KB;
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_PRIV_RO_URO;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_BUFFERABLE;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.SubRegionDisable = 0x00;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
#endif
|
||||
|
||||
|
||||
// Configure NVIC preempt/priority groups
|
||||
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITY_GROUPING);
|
||||
|
||||
|
|
|
@ -457,9 +457,8 @@ typedef struct afatfs_t {
|
|||
} initState;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef STM32H7
|
||||
uint8_t cache[AFATFS_SECTOR_SIZE * AFATFS_NUM_CACHE_SECTORS] __attribute__((aligned(32)));
|
||||
uint8_t *cache;
|
||||
#else
|
||||
uint8_t cache[AFATFS_SECTOR_SIZE * AFATFS_NUM_CACHE_SECTORS];
|
||||
#endif
|
||||
|
@ -512,6 +511,10 @@ typedef struct afatfs_t {
|
|||
uint32_t rootDirectorySectors; // Zero on FAT32, for FAT16 the number of sectors that the root directory occupies
|
||||
} afatfs_t;
|
||||
|
||||
#ifdef STM32H7
|
||||
static DMA_RW_AXI uint8_t afatfs_cache[AFATFS_SECTOR_SIZE * AFATFS_NUM_CACHE_SECTORS] __attribute__((aligned(32)));
|
||||
#endif
|
||||
|
||||
static afatfs_t afatfs;
|
||||
|
||||
static void afatfs_fileOperationContinue(afatfsFile_t *file);
|
||||
|
@ -3609,6 +3612,9 @@ afatfsError_e afatfs_getLastError(void)
|
|||
|
||||
void afatfs_init(void)
|
||||
{
|
||||
#ifdef STM32H7
|
||||
afatfs.cache = afatfs_cache;
|
||||
#endif
|
||||
afatfs.filesystemState = AFATFS_FILESYSTEM_STATE_INITIALIZATION;
|
||||
afatfs.initPhase = AFATFS_INITIALIZATION_READ_MBR;
|
||||
afatfs.lastClusterAllocated = FAT_SMALLEST_LEGAL_CLUSTER_NUMBER;
|
||||
|
|
|
@ -64,6 +64,8 @@
|
|||
#include "stm32h7xx.h"
|
||||
#include "drivers/system.h"
|
||||
#include "platform.h"
|
||||
#include "string.h"
|
||||
#include "common/utils.h"
|
||||
|
||||
#include "build/debug.h"
|
||||
|
||||
|
@ -508,96 +510,15 @@ void CRS_IRQHandler(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
void MPU_Config()
|
||||
{
|
||||
MPU_Region_InitTypeDef MPU_InitStruct;
|
||||
#include "build/debug.h"
|
||||
|
||||
HAL_MPU_Disable();
|
||||
void systemCheckResetReason(void);
|
||||
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
|
||||
// XXX FIXME Entire D2 SRAM1 region is setup as non-bufferable (write-through) and non-cachable.
|
||||
// Ideally, DMA buffer region should be prepared based on read and write activities,
|
||||
// and DMA buffers should be assigned to different region based on read/write activity on
|
||||
// the buffer.
|
||||
// XXX FIXME Further more, sizes of DMA buffer regions should tracked and size set as appropriate
|
||||
// using _<REGION>_start__ and _<REGION>_end__.
|
||||
|
||||
MPU_InitStruct.BaseAddress = 0x30000000;
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_128KB;
|
||||
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
||||
|
||||
// As described in p.10 of AN4838.
|
||||
|
||||
// Write through & no-cache config
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
|
||||
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER1;
|
||||
MPU_InitStruct.SubRegionDisable = 0x00;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
|
||||
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
|
||||
#ifdef USE_SDCARD_SDIO
|
||||
// The Base Address 0x24000000 is the SRAM1 accessible by the SDIO internal DMA.
|
||||
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
|
||||
MPU_InitStruct.BaseAddress = 0x24000000;
|
||||
#if defined(USE_EXST)
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_64KB;
|
||||
#else
|
||||
MPU_InitStruct.Size = MPU_REGION_SIZE_512KB;
|
||||
#endif
|
||||
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
|
||||
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
|
||||
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
|
||||
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
|
||||
MPU_InitStruct.Number = MPU_REGION_NUMBER2;
|
||||
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
|
||||
MPU_InitStruct.SubRegionDisable = 0x00;
|
||||
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
#endif
|
||||
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the FPU setting, vector table location and External memory
|
||||
* configuration.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void resetMPU(void)
|
||||
{
|
||||
MPU_Region_InitTypeDef MPU_InitStruct;
|
||||
|
||||
/* Disable the MPU */
|
||||
HAL_MPU_Disable();
|
||||
|
||||
#if !defined(USE_EXST)
|
||||
uint8_t highestRegion = MPU_REGION_NUMBER15;
|
||||
#else
|
||||
uint8_t highestRegion = MPU_REGION_NUMBER7;// currently 8-15 reserved by bootloader. Bootloader may write-protect the firmware region, this firmware can examine and undo this at it's peril.
|
||||
#endif
|
||||
|
||||
|
||||
// disable all existing regions
|
||||
for (uint8_t region = MPU_REGION_NUMBER0; region <= highestRegion; region++) {
|
||||
MPU_InitStruct.Enable = MPU_REGION_DISABLE;
|
||||
MPU_InitStruct.Number = region;
|
||||
HAL_MPU_ConfigRegion(&MPU_InitStruct);
|
||||
}
|
||||
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
|
||||
}
|
||||
#include "drivers/memprot.h"
|
||||
|
||||
void SystemInit (void)
|
||||
{
|
||||
resetMPU();
|
||||
memProtReset();
|
||||
|
||||
initialiseMemorySections();
|
||||
|
||||
|
@ -692,7 +613,7 @@ void SystemInit (void)
|
|||
|
||||
// Configure MPU
|
||||
|
||||
MPU_Config();
|
||||
memProtConfigure(mpuRegions, mpuRegionCount);
|
||||
|
||||
// Enable CPU L1-Cache
|
||||
SCB_EnableICache();
|
||||
|
|
|
@ -151,8 +151,10 @@
|
|||
|
||||
#ifdef USE_DMA_RAM
|
||||
#define DMA_RAM __attribute__((section(".DMA_RAM")))
|
||||
#define DMA_RW_AXI __attribute__((section(".DMA_AXI_RW")))
|
||||
#else
|
||||
#define DMA_RAM
|
||||
#define DMA_RW_AXI
|
||||
#endif
|
||||
|
||||
#define USE_BRUSHED_ESC_AUTODETECT // Detect if brushed motors are connected and set defaults appropriately to avoid motors spinning on boot
|
||||
|
|
Loading…
Reference in New Issue