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Fixed flash CRC check

This commit is contained in:
Benjamin Vedder 2019-04-18 22:30:01 +02:00
parent b2816ef596
commit 023d78679f
7 changed files with 71 additions and 66 deletions
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1
CHANGELOG
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@ -4,6 +4,7 @@
* Virtual motor support.
* Disable chuk cruise control on dropouts.
* Fix multiple VESCs over CAN duty cycle mode.
* Added boot and runtime flash memory CRC integrity check.
=== FW 3.54 ===
* Added mcpwm_foc_set_openloop_duty and mcpwm_foc_set_openloop_duty_phase.

2
Makefile
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@ -276,7 +276,7 @@ ifeq ($(USE_FWLIB),yes)
endif
build/$(PROJECT).bin: build/$(PROJECT).elf
$(BIN) build/$(PROJECT).elf build/$(PROJECT).bin
$(BIN) build/$(PROJECT).elf build/$(PROJECT).bin --gap-fill 0xFF
# Program
upload: build/$(PROJECT).bin

2
blackmagic/bm_if.c
View File

@ -194,7 +194,7 @@ static void terminal_flash_erase(int argc, const char **argv) {
sscanf(argv[1], "%x", &addr);
sscanf(argv[2], "%d", &len);
if (addr >= 0 && len >= 0) {
if (len >= 0) {
if (cur_target) {
bm_set_enabled(true);
target_print_en = true;

3
crc.c
View File

@ -73,6 +73,7 @@ uint32_t crc32(uint32_t *pBuffer, uint32_t BufferLength) {
for(index = 0; index < BufferLength; index++) {
CRC->DR = pBuffer[index];
}
return (CRC->DR);
}
@ -83,5 +84,5 @@ uint32_t crc32(uint32_t *pBuffer, uint32_t BufferLength) {
*/
void crc32_reset(void) {
/* Reset CRC generator */
CRC->CR = CRC_CR_RESET;
CRC->CR |= CRC_CR_RESET;
}

41
flash_helper.c
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@ -36,8 +36,7 @@
#define APP_BASE 0
#define NEW_APP_BASE 8
#define NEW_APP_SECTORS 3
#define APP_MAX_SIZE (3 * (1 << 17))
#define EEPROM_EMULATION_SIZE 0x8000
#define APP_MAX_SIZE (393216 - 8) // Note that the bootloader needs 8 extra bytes
// Base address of the Flash sectors
#define ADDR_FLASH_SECTOR_0 ((uint32_t)0x08000000) // Base @ of Sector 0, 16 Kbytes
@ -53,15 +52,17 @@
#define ADDR_FLASH_SECTOR_10 ((uint32_t)0x080C0000) // Base @ of Sector 10, 128 Kbytes
#define ADDR_FLASH_SECTOR_11 ((uint32_t)0x080E0000) // Base @ of Sector 11, 128 Kbytes
#define APP_CRC_WAS_CALCULATED_FLAG ((uint32_t)0xAAAAAAAA)
#define APP_CRC_WAS_CALCULATED_FLAG_ADDRESS (uint32_t*)(APP_MAX_SIZE - 8)
#define VECTOR_TABLE_ADDRESS ((uint32_t*)ADDR_FLASH_SECTOR_0)
#define VECTOR_TABLE_SIZE ((uint32_t)(ADDR_FLASH_SECTOR_1 - ADDR_FLASH_SECTOR_0))
#define EEPROM_EMULATION_SIZE ((uint32_t)(ADDR_FLASH_SECTOR_4 - ADDR_FLASH_SECTOR_2))
#define APP_START_ADDRESS ((uint32_t *)(ADDR_FLASH_SECTOR_1 + EEPROM_EMULATION_SIZE))
#define APP_START_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_3))
#define APP_SIZE ((uint32_t)(APP_MAX_SIZE - VECTOR_TABLE_SIZE - EEPROM_EMULATION_SIZE))
#define APP_CRC_WAS_CALCULATED_FLAG ((uint32_t)0x00000000)
#define APP_CRC_WAS_CALCULATED_FLAG_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_0 + APP_MAX_SIZE - 8))
#define APP_CRC_ADDRESS ((uint32_t*)(ADDR_FLASH_SECTOR_0 + APP_MAX_SIZE - 4))
typedef struct {
uint32_t crc_flag;
uint32_t crc;
@ -225,13 +226,12 @@ uint32_t flash_helper_verify_flash_memory(void) {
uint32_t crc;
// Look for a flag indicating that the CRC was previously computed.
// If it is blank (0xFFFFFFFF), calculate and store the CRC.
if( (APP_CRC_WAS_CALCULATED_FLAG_ADDRESS)[0] == APP_CRC_WAS_CALCULATED_FLAG )
{
if(APP_CRC_WAS_CALCULATED_FLAG_ADDRESS[0] == APP_CRC_WAS_CALCULATED_FLAG) {
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
crc32_reset();
// compute vector table (sector 0)
crc32((VECTOR_TABLE_ADDRESS), (VECTOR_TABLE_SIZE)/4);
crc32(VECTOR_TABLE_ADDRESS, (VECTOR_TABLE_SIZE) / 4);
// skip emulated EEPROM (sector 1 and 2)
@ -242,8 +242,7 @@ uint32_t flash_helper_verify_flash_memory(void) {
// A CRC over the full image should return zero.
return (crc == 0) ? FAULT_CODE_NONE : FAULT_CODE_FLASH_CORRUPTION;
}
else {
} else {
FLASH_Unlock();
FLASH_ClearFlag(FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR |
FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
@ -270,7 +269,7 @@ uint32_t flash_helper_verify_flash_memory(void) {
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, DISABLE);
//Store CRC
res = FLASH_ProgramWord(APP_MAX_SIZE - 4, crc);
res = FLASH_ProgramWord((uint32_t)APP_CRC_ADDRESS, crc);
if (res != FLASH_COMPLETE) {
FLASH_Lock();
return FAULT_CODE_FLASH_CORRUPTION;
@ -285,29 +284,33 @@ uint32_t flash_helper_verify_flash_memory(void) {
uint32_t flash_helper_verify_flash_memory_chunk(void) {
static uint32_t index = 0;
const uint32_t chunk_size = 8192;
uint32_t chunk_size = 1024;
uint32_t res = FAULT_CODE_NONE;
uint32_t crc = 0;
uint32_t tot_bytes = VECTOR_TABLE_SIZE + APP_SIZE;
// Make sure RCC_AHB1Periph_CRC is enabled
if (index == 0) {
crc32_reset();
}
if (index < VECTOR_TABLE_SIZE) {
crc32((VECTOR_TABLE_ADDRESS + index), chunk_size/4);
if ((index + chunk_size) >= tot_bytes) {
chunk_size = tot_bytes - index;
}
else {
crc = crc32((uint32_t*)((uint32_t)APP_START_ADDRESS + index - VECTOR_TABLE_SIZE), chunk_size/4);
if (index < VECTOR_TABLE_SIZE) {
crc32(VECTOR_TABLE_ADDRESS + index / 4, chunk_size / 4);
} else {
crc = crc32(APP_START_ADDRESS + (index - VECTOR_TABLE_SIZE) / 4, chunk_size / 4);
}
index += chunk_size;
if (index >= (VECTOR_TABLE_SIZE + APP_SIZE)) {
if (index >= tot_bytes) {
index = 0;
if (crc != 0) {
res = FAULT_CODE_FLASH_CORRUPTION;
}
}
return res;
}

6
ld_eeprom_emu.ld
View File

@ -26,8 +26,8 @@
MEMORY
{
flash : org = 0x08000000, len = 16k
flash2 : org = 0x0800C000, len = 393216 - 8 /* NEW_APP_MAX_SIZE - CRC_INFO */
crcinfo : org = 0x0805FFF8, len = 8 /* CRC info*/
flash2 : org = 0x0800C000, len = 393216 - 16 /* NEW_APP_MAX_SIZE - CRC_INFO */
crcinfo : org = 0x0805FFF0, len = 8 /* CRC info */
ram0 : org = 0x20000000, len = 128k /* SRAM1 + SRAM2 */
ram1 : org = 0x20000000, len = 112k /* SRAM1 */
ram2 : org = 0x2001C000, len = 16k /* SRAM2 */
@ -146,7 +146,7 @@ SECTIONS
_etext = .;
_textdata = _etext;
_crcinfo_start_address = 0x0805FFF8;
_crcinfo_start_address = 0x0805FFF0;
.crcinfo _crcinfo_start_address :
{

6
main.c
View File

@ -75,12 +75,12 @@
// Private variables
static THD_WORKING_AREA(periodic_thread_wa, 1024);
static THD_WORKING_AREA(timer_thread_wa, 128);
static THD_WORKING_AREA(flash_integrity_check_thread_wa, 1024);
static THD_WORKING_AREA(flash_integrity_check_thread_wa, 256);
static THD_FUNCTION(flash_integrity_check_thread, arg) {
(void)arg;
chRegSetThreadName("Flash integrity check");
chRegSetThreadName("Flash check");
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_CRC, ENABLE);
for(;;) {
@ -88,7 +88,7 @@ static THD_FUNCTION(flash_integrity_check_thread, arg) {
NVIC_SystemReset();
}
chThdSleepMilliseconds(50);
chThdSleepMilliseconds(6);
}
}