From 06398a45e8e8d50acbb25d531787641aefb4fb1d Mon Sep 17 00:00:00 2001 From: "Jeffrey M. Friesen" Date: Mon, 16 Mar 2020 14:57:55 -0700 Subject: [PATCH] started adding support for stormcore, needs more work --- conf_general.h | 9 +- hwconf/hw_stormcore_100d.c | 472 +++++++++++++++++++++++++++++++++++++ hwconf/hw_stormcore_100d.h | 383 ++++++++++++++++++++++++++++++ hwconf/hw_stormcore_100s.c | 246 +++++++++++++++++++ hwconf/hw_stormcore_100s.h | 251 ++++++++++++++++++++ hwconf/hw_stormcore_60d.c | 284 ++++++++++++++++++++++ hwconf/hw_stormcore_60d.h | 357 ++++++++++++++++++++++++++++ hwconf/hw_unity.h | 9 +- mcpwm_foc.c | 8 +- 9 files changed, 2009 insertions(+), 10 deletions(-) create mode 100644 hwconf/hw_stormcore_100d.c create mode 100644 hwconf/hw_stormcore_100d.h create mode 100644 hwconf/hw_stormcore_100s.c create mode 100644 hwconf/hw_stormcore_100s.h create mode 100644 hwconf/hw_stormcore_60d.c create mode 100644 hwconf/hw_stormcore_60d.h diff --git a/conf_general.h b/conf_general.h index 785772dc..fd42133e 100644 --- a/conf_general.h +++ b/conf_general.h @@ -130,8 +130,13 @@ //#define HW_SOURCE "hw_100_250.c" //#define HW_HEADER "hw_100_250.h" -#define HW_SOURCE "hw_unity.c" -#define HW_HEADER "hw_unity.h" +//#define HW_SOURCE "hw_unity.c" +//#define HW_HEADER "hw_unity.h" + +#define HW_SOURCE "hw_stormcore_100d.c" +#define HW_HEADER "hw_stormcore_100d.h" + + #endif #ifndef HW_SOURCE diff --git a/hwconf/hw_stormcore_100d.c b/hwconf/hw_stormcore_100d.c new file mode 100644 index 00000000..9169fd21 --- /dev/null +++ b/hwconf/hw_stormcore_100d.c @@ -0,0 +1,472 @@ +/* + Copyright 2016 Benjamin Vedder benjamin@vedder.se + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ +#include "hw.h" +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "drv8323s.h" +#include "comm_can.h" +#include "mc_interface.h" +#include "ledpwm.h" + + +typedef enum { + SWITCH_BOOTED = 0, + SWITCH_TURN_ON_DELAY_ACTIVE, + SWITCH_HELD_AFTER_TURN_ON, + SWITCH_TURNED_ON, + SWITCH_SHUTTING_DOWN, +} switch_states; + +// Variables +static volatile bool i2c_running = false; +static THD_WORKING_AREA(smart_switch_thread_wa, 128); +static THD_WORKING_AREA(mux_thread_wa, 128); +static THD_FUNCTION(mux_thread, arg); +static volatile switch_states switch_state = SWITCH_BOOTED; + + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE +}; + +void hw_init_gpio(void) { + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE); + + + + + // LEDs + palSetPadMode(GPIOA, 8, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(GPIOC, 9, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + //Temp switches + palSetPadMode(ADC_SW_EN_PORT, ADC_SW_EN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_1_PORT, ADC_SW_1_PIN , + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_2_PORT, ADC_SW_2_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_3_PORT, ADC_SW_3_PIN , + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + + ENABLE_MOS_TEMP1(); + + // GPIOC (ENABLE_GATE) + palSetPadMode(GPIOE, 14, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(GPIOD, 4, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + DISABLE_GATE(); + // GPIOB (DCCAL) + + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOE, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOE, 11, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 12, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOC, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOC, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6, PAL_MODE_INPUT_PULLUP); + + // Fault pin + palSetPadMode(GPIOE, 3, PAL_MODE_INPUT_PULLUP); + palSetPadMode(GPIOD, 3, PAL_MODE_INPUT_PULLUP); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG); + ENABLE_GATE(); + + drv8323s_init(); +} + +void hw_setup_adc_channels(void) { + + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles); //0 + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 2, ADC_SampleTime_15Cycles); //3 + ADC_RegularChannelConfig(ADC1, ADC_Channel_5 , 3, ADC_SampleTime_15Cycles); //6 + ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 4, ADC_SampleTime_15Cycles); //9 + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); //12 + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_8, 1, ADC_SampleTime_15Cycles); //1 + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 2, ADC_SampleTime_15Cycles); //4 + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); //7 + ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 4, ADC_SampleTime_15Cycles); //10 + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); //13 + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); //2 + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 2, ADC_SampleTime_15Cycles); //5 + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 3, ADC_SampleTime_15Cycles); //8 + ADC_RegularChannelConfig(ADC3, ADC_Channel_11, 4, ADC_SampleTime_15Cycles); //11 + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 5, ADC_SampleTime_15Cycles); //14 + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles); + + + ADC_InjectedChannelConfig(ADC2, ADC_Channel_5, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 2, ADC_SampleTime_15Cycles); + + // ADC_InjectedChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + // ADC_InjectedChannelConfig(ADC3, ADC_Channel_0, 2, ADC_SampleTime_15Cycles); + //ADC_InjectedChannelConfig(ADC3, ADC_Channel_1, 3, ADC_SampleTime_15Cycles); + + chThdCreateStatic(mux_thread_wa, sizeof(mux_thread_wa), NORMALPRIO, mux_thread, NULL); +} + +void hw_start_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) { + if (i2c_running) { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for(int i = 0;i < 16;i++) { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + + +static THD_FUNCTION(mux_thread, arg) { + chRegSetThreadName("adc_mux"); + (void)arg; + + for (;;) { + ENABLE_MOS_TEMP1(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_TEMP_MOS] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_MOS_TEMP2(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_TEMP_MOS_M2] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_MOT_TEMP1(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_TEMP_MOTOR] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_MOT_TEMP2(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_TEMP_MOTOR_2] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_ADC_EXT_1(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_EXT] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_ADC_EXT_2(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_EXT2] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_ADC_EXT_3(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_EXT3] = ADC_Value[ADC_IND_ADC_MUX]; + + ENABLE_V_BATT_DIV(); + chThdSleepMilliseconds(1); + ADC_Value[ADC_IND_V_BATT] = ADC_Value[ADC_IND_ADC_MUX]; + + } +} + +void smart_switch_keep_on(void) { + palSetPad(SWITCH_OUT_GPIO, SWITCH_OUT_PIN); + + //#ifdef HW_HAS_RGB_SWITCH + // LED_SWITCH_B_ON(); + // ledpwm_set_intensity(SWITCH_LED_B, 1.0); + //#else + // ledpwm_set_intensity(SWITCH_LED, 1.0); + // ledpwm_set_switch_intensity(0.6); + //#endif +} + +void smart_switch_shut_down(void) { + switch_state = SWITCH_SHUTTING_DOWN; + palClearPad(SWITCH_OUT_GPIO, SWITCH_OUT_PIN); +#ifdef HW_HAS_STORMCORE_SWITCH + palClearPad(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN); +#endif + return; +} + +bool smart_switch_is_pressed(void) { + if(palReadPad(SWITCH_IN_GPIO, SWITCH_IN_PIN) == 1) + return true; + else + return false; +} + +static THD_FUNCTION(smart_switch_thread, arg) { + (void)arg; + chRegSetThreadName("smart_switch"); + + unsigned int millis_switch_pressed = 0; + + for (;;) { + switch (switch_state) { + case SWITCH_BOOTED: + ledpwm_set_intensity(LED_HW1, 0.6); +#ifdef HW_HAS_RGB_SWITCH + ledpwm_set_intensity(LED_HW1, 1.0); +#else + ledpwm_set_intensity(LED_HW1, 1.0); +#endif + switch_state = SWITCH_TURN_ON_DELAY_ACTIVE; + break; + case SWITCH_TURN_ON_DELAY_ACTIVE: + chThdSleepMilliseconds(500); + ledpwm_set_intensity(LED_HW1, 0.6); + switch_state = SWITCH_HELD_AFTER_TURN_ON; +#ifdef HW_HAS_STORMCORE_SWITCH + chThdSleepMilliseconds(5000); + palSetPad(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN); +#endif + break; + case SWITCH_HELD_AFTER_TURN_ON: + smart_switch_keep_on(); + if(smart_switch_is_pressed()){ + switch_state = SWITCH_HELD_AFTER_TURN_ON; + } else { + switch_state = SWITCH_TURNED_ON; + } + break; + case SWITCH_TURNED_ON: + if (smart_switch_is_pressed()) { + millis_switch_pressed++; + ledpwm_set_intensity(LED_HW1, 1.0); + } else { + millis_switch_pressed = 0; + ledpwm_set_intensity(LED_HW1, 0.6); + } + + if (millis_switch_pressed > SMART_SWITCH_MSECS_PRESSED_OFF) { + switch_state = SWITCH_SHUTTING_DOWN; + } + break; + case SWITCH_SHUTTING_DOWN: + ledpwm_set_intensity(LED_HW1, 0.0); + + // TODO: Implement this? + // for (int i = 0;i < CAN_STATUS_MSGS_TO_STORE;i++) { + // can_status_msg *msg = comm_can_get_status_msg_index(i); + // comm_can_set_shutdown(msg->id); + // } + + smart_switch_shut_down(); + chThdSleepMilliseconds(10000); + smart_switch_keep_on(); + switch_state = SWITCH_TURN_ON_DELAY_ACTIVE; + break; + default: + break; + } + chThdSleepMilliseconds(1); + } +} + +void smart_switch_thread_start(void) { + chThdCreateStatic(smart_switch_thread_wa, sizeof(smart_switch_thread_wa), + NORMALPRIO, smart_switch_thread, NULL); +} + +void smart_switch_pin_init(void) { + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE); + + palSetPadMode(SWITCH_IN_GPIO, SWITCH_IN_PIN, PAL_MODE_INPUT); + palSetPadMode(SWITCH_OUT_GPIO,SWITCH_OUT_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(SWITCH_LED_1_GPIO,SWITCH_LED_1_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST); +#ifdef HW_HAS_RGB_SWITCH + palSetPadMode(SWITCH_LED_2_GPIO,SWITCH_LED_2_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST); +#endif +#ifdef HW_HAS_STORMCORE_SWITCH + palSetPadMode(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); + palClearPad(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN); + palSetPad(SWITCH_OUT_GPIO, SWITCH_OUT_PIN); +#endif +#ifdef HW_HAS_RGB_SWITCH + LED_SWITCH_B_ON(); + LED_SWITCH_R_OFF(); + LED_SWITCH_G_OFF(); +#else + LED_PWM1_ON(); +#endif + + return; +} + diff --git a/hwconf/hw_stormcore_100d.h b/hwconf/hw_stormcore_100d.h new file mode 100644 index 00000000..2624b9c8 --- /dev/null +++ b/hwconf/hw_stormcore_100d.h @@ -0,0 +1,383 @@ +/* + Copyright 2016 Benjamin Vedder benjamin@vedder.se + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ +#ifndef HW_STORMCORE_100D_H_ +#define HW_STORMCORE_100D_H_ + +#define HW_NAME "STORMCORE_100D" + +#define HW_HAS_DUAL_MOTORS +#include "drv8323s.h" + +// HW properties +#define HW_HAS_DRV8323S // for idrive do 0x073b for reg 4 (LS) and 0x034b for reg 3 (HS) +#define HW_HAS_3_SHUNTS + +#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \ + drv8323s_write_reg(3,0x377); \ + drv8323s_write_reg(4,0x777); + +//#define HW_DEAD_TIME_NSEC 360.0 // Dead time + +#define HW_HAS_DUAL_MOTOR +//Switch Pins +#define HW_HAS_STORMCORE_SWITCH +#define HW_HAS_RGB_SWITCH +#define SWITCH_IN_GPIO GPIOA +#define SWITCH_IN_PIN 15 +#define SWITCH_OUT_GPIO GPIOB +#define SWITCH_OUT_PIN 13 +#define SWITCH_PRECHARGE_GPIO GPIOE +#define SWITCH_PRECHARGE_PIN 2 +#define SWITCH_LED_3_GPIO GPIOD +#define SWITCH_LED_3_PIN 15 +#define SWITCH_LED_2_GPIO GPIOD +#define SWITCH_LED_2_PIN 10 +#define SWITCH_LED_1_GPIO GPIOD +#define SWITCH_LED_1_PIN 11 + +#define LED_PWM1_ON() palClearPad(SWITCH_LED_1_GPIO,SWITCH_LED_1_PIN) +#define LED_PWM1_OFF() palSetPad(SWITCH_LED_1_GPIO,SWITCH_LED_1_PIN) +#define LED_PWM2_ON() palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_PWM2_OFF() palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_PWM3_ON() palClearPad(SWITCH_LED_3_GPIO, SWITCH_LED_3_PIN) +#define LED_PWM3_OFF() palSetPad(SWITCH_LED_3_GPIO, SWITCH_LED_3_PIN) + +#define SMART_SWITCH_MSECS_PRESSED_OFF 2000 + + +#define DCCAL_ON() //drv8323s_dccal_on() +#define DCCAL_OFF() //drv8323s_dccal_off() + +#define HW_EARLY_INIT() smart_switch_pin_init(); smart_switch_thread_start(); + + + +//Pins for BLE UART +//#define USE_ALT_UART_PORT + +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD1 +#define HW_UART_P_GPIO_AF GPIO_AF_USART1 +#define HW_UART_P_TX_PORT GPIOA +#define HW_UART_P_TX_PIN 9 +#define HW_UART_P_RX_PORT GPIOA +#define HW_UART_P_RX_PIN 10 + +// SPI for DRV8301 +#define DRV8323S_MOSI_GPIO GPIOC +#define DRV8323S_MOSI_PIN 12 +#define DRV8323S_MISO_GPIO GPIOC +#define DRV8323S_MISO_PIN 11 +#define DRV8323S_SCK_GPIO GPIOC +#define DRV8323S_SCK_PIN 10 +#define DRV8323S_CS_GPIO GPIOC +#define DRV8323S_CS_PIN 13 +#define DRV8323S_CS_GPIO2 GPIOD +#define DRV8323S_CS_PIN2 2 +#define DRV8323S_CS_GPIO3 GPIOE +#define DRV8323S_CS_PIN3 15 + +// Macros +#define ENABLE_GATE() palSetPad(GPIOE, 14); palSetPad(GPIOD, 4); +#define DISABLE_GATE() palClearPad(GPIOE, 14); palClearPad(GPIOD, 4); + +#define ADC_SW_EN_PORT GPIOB +#define ADC_SW_EN_PIN 12 +#define ADC_SW_1_PORT GPIOD +#define ADC_SW_1_PIN 7 +#define ADC_SW_2_PORT GPIOB +#define ADC_SW_2_PIN 3 +#define ADC_SW_3_PORT GPIOE +#define ADC_SW_3_PIN 7 + +#define ENABLE_MOS_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOS_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOT_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOT_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_ADC_EXT_2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_ADC_EXT_1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_ADC_EXT_3() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_V_BATT_DIV() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); + + +#define IS_DRV_FAULT() (!palReadPad(GPIOE, 3)) +#define IS_DRV_FAULT2() (!palReadPad(GPIOD, 3)) + +#define LED_GREEN_ON() palSetPad(GPIOC, 9);// palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN); +#define LED_GREEN_OFF() palClearPad(GPIOC, 9);// palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN); +#define LED_RED_ON() palSetPad(GPIOA, 8); //palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN); +#define LED_RED_OFF() palClearPad(GPIOA, 8); //palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN); +#define LED_SWITCH_R_ON() palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN) +#define LED_SWITCH_R_OFF() palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN) +#define LED_SWITCH_G_ON() palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_SWITCH_G_OFF() palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_SWITCH_B_ON() palClearPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN) +#define LED_SWITCH_B_OFF() palSetPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN) + + +/* + * ADC Vector + * + * 0: IN0 CURR3 + * 1: IN15 CURR4 + * 2: IN3 SERVO2/ADC + * 3: IN9 CURR1 + * 4: IN8 CURR2 + * 5: IN10 AN_IN + * 6: IN0 SENS2 + * 7: IN1 SENS3 + * 8: IN2 SENS1 + * 9: IN5 ADC_EXT + * 10: IN4 ADC_TEMP + * 11: IN13 SENS4 + * 12: Vrefint + * 13: IN11 SENS6 + * 14: IN12 SENS5 + * 15: IN6 ADC_EXT2 + */ + +#define HW_ADC_CHANNELS 15 +#define HW_ADC_CHANNELS_EXTRA 8 +#define HW_ADC_INJ_CHANNELS 2 +#define HW_ADC_NBR_CONV 5 + +// ADC Indexes + +#define ADC_IND_CURR1 0 +#define ADC_IND_CURR2 1 +#define ADC_IND_VIN_SENS 2 + +#define ADC_IND_CURR3 3 +#define ADC_IND_CURR4 4 +#define ADC_IND_VM_SENSE 5 + +#define ADC_IND_CURR6 6 +#define ADC_IND_CURR5 7 +#define ADC_IND_SENS4 8 + +#define ADC_IND_ADC_MUX 9 +#define ADC_IND_SENS5 10 +#define ADC_IND_SENS6 11 + +#define ADC_IND_SENS2 12 +#define ADC_IND_SENS3 13 +#define ADC_IND_SENS1 14 + +#define ADC_IND_TEMP_MOS 15 +#define ADC_IND_TEMP_MOS_M2 16 +#define ADC_IND_TEMP_MOTOR 17 +#define ADC_IND_TEMP_MOTOR_2 18 +#define ADC_IND_EXT 19 +#define ADC_IND_EXT2 20 +#define ADC_IND_EXT3 21 +#define ADC_IND_V_BATT 22 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.3 +#endif +#ifndef VIN_R1 +#define VIN_R1 68000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 2200.0 +#endif +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN 10.0 +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES 0.001 +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) +#define GET_BATT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_ADC_MUX] * ((VIN_R1 + VIN_R2) / VIN_R2)) +#define GET_VM_SENSE_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VM_SENSE] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4095.0 * V_REG) + +// NTC Termistors +#define NTC_RES(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side // High side ->((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3434.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) +#define NTC_TEMP_MOTOR2(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif + +// Number of servo outputs +#define HW_SERVO_NUM 2 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_ICU_TIMER TIM9 +#define HW_ICU_DEV ICUD9 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM9 +#define HW_ICU_GPIO GPIOE +#define HW_ICU_PIN 5 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOD +#define HW_HALL_ENC_PIN1 13 +#define HW_HALL_ENC_GPIO2 GPIOD +#define HW_HALL_ENC_PIN2 12 +#define HW_HALL_ENC_GPIO3 GPIOD +#define HW_HALL_ENC_PIN3 14 +#define HW_ENC_TIM TIM4 +#define HW_ENC_TIM_AF GPIO_AF_TIM4 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOD +#define HW_ENC_EXTI_PINSRC EXTI_PinSource14 +#define HW_ENC_EXTI_CH EXTI15_10_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line14 +#define HW_ENC_EXTI_ISR_VEC EXTI15_10_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM4_IRQn +#define HW_ENC_TIM_ISR_VEC TIM4_IRQHandler + +#define HW_HALL_ENC_GPIO4 GPIOB +#define HW_HALL_ENC_PIN4 4 +#define HW_HALL_ENC_GPIO5 GPIOB +#define HW_HALL_ENC_PIN5 6 +#define HW_HALL_ENC_GPIO6 GPIOB +#define HW_HALL_ENC_PIN6 7 +#define HW_ENC_TIM2 TIM3 +#define HW_ENC_TIM_AF2 GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN2() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC2 EXTI_PortSourceGPIOB +#define HW_ENC_EXTI_PINSRC2 EXTI_PinSource7 +#define HW_ENC_EXTI_CH2 EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE2 EXTI_Line6 +#define HW_ENC_EXTI_ISR_VEC2 EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH2 TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC2 TIM3_IRQHandler + +// NRF pins +// NRF pins +#define NRF_PORT_CSN GPIOD +#define NRF_PIN_CSN 3 +#define NRF_PORT_SCK GPIOD +#define NRF_PIN_SCK 2 +#define NRF_PORT_MOSI GPIOD +#define NRF_PIN_MOSI 11 +#define NRF_PORT_MISO GPIOD +#define NRF_PIN_MISO 10 + +// NRF SWD +#define NRF5x_SWDIO_GPIO GPIOD +#define NRF5x_SWDIO_PIN 6 +#define NRF5x_SWCLK_GPIO GPIOD +#define NRF5x_SWCLK_PIN 5 + +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOB +#define HW_SPI_PIN_NSS 11 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOB +#define HW_SPI_PIN_MOSI 5 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_L4 ADC_Value[ADC_IND_SENS4] +#define ADC_V_L5 ADC_Value[ADC_IND_SENS5] +#define ADC_V_L6 ADC_Value[ADC_IND_SENS6] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +#define READ_HALL1_2() palReadPad(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4) +#define READ_HALL2_2() palReadPad(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5) +#define READ_HALL3_2() palReadPad(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6) + +//CAN +#define HW_CANRX_PORT GPIOD +#define HW_CANRX_PIN 0 +#define HW_CANTX_PORT GPIOD +#define HW_CANTX_PIN 1 + + +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 92.0 +#endif +#ifndef MCCONF_M_DRV8301_OC_ADJ +#define MCCONF_M_DRV8301_OC_ADJ 14 +#endif +// Setting limits +#define HW_LIM_CURRENT -150.0, 150.0 +#define HW_LIM_CURRENT_IN -120.0, 120.0 +#define HW_LIM_CURRENT_ABS 0.0, 200.0 +#define HW_LIM_VIN 6.0, 94.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.95 +#define HW_LIM_TEMP_FET -40.0, 120.0 + +// Functions +void smart_switch_thread_start(void); +void smart_switch_pin_init(void); +bool smart_switch_is_pressed(void); +void smart_switch_shut_down(void); +void smart_switch_keep_on(void); + +#endif /* HW_STORMCORE_100D_H_ */ diff --git a/hwconf/hw_stormcore_100s.c b/hwconf/hw_stormcore_100s.c new file mode 100644 index 00000000..16025af1 --- /dev/null +++ b/hwconf/hw_stormcore_100s.c @@ -0,0 +1,246 @@ +/* + Copyright 2019 Benjamin Vedder benjamin@vedder.se + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +#include "hw.h" + +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "utils.h" +#include "drv8323s.h" + + + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE +}; + +void hw_init_gpio(void) { + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + + // LEDs + palSetPadMode(GPIOB, 0, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(GPIOB, 1, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + // ENABLE_GATE + palSetPadMode(GPIOB, 5, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + ENABLE_GATE(); + + // Disable BMI160 + palSetPadMode(GPIOA, 15, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPad(GPIOA, 15); + + // Disable DCCAL + palSetPadMode(GPIOD, 2, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palClearPad(GPIOD, 2); + + ENABLE_GATE(); + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + + // Fault pin + palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG); + + drv8323s_init(); + +} + +void hw_setup_adc_channels(void) { + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles); + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles); + ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) { + if (i2c_running) { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for(int i = 0;i < 16;i++) { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} + + diff --git a/hwconf/hw_stormcore_100s.h b/hwconf/hw_stormcore_100s.h new file mode 100644 index 00000000..cc0e1eea --- /dev/null +++ b/hwconf/hw_stormcore_100s.h @@ -0,0 +1,251 @@ +/* + Copyright 2019 Benjamin Vedder benjamin@vedder.se + + This file is part of the VESC firmware. + + The VESC firmware is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + The VESC firmware is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ + +#ifndef HW_STORMCORE_100S_H_ +#define HW_STORMCORE_100S_H_ + +#include "drv8323s.h" + +#define HW_NAME "STORMCORE_100S" + +// HW properties +#define HW_HAS_DRV8323S +#define HW_HAS_3_SHUNTS +//#define INVERTED_SHUNT_POLARITY + +//#define HW_DEAD_TIME_NSEC 400.0 // Dead time + +// Macros +#define ENABLE_GATE() palSetPad(GPIOB, 5) +#define DISABLE_GATE() palClearPad(GPIOB, 5) + +#define DCCAL_ON() drv8323s_dccal_on() +#define DCCAL_OFF() drv8323s_dccal_off() + +#define IS_DRV_FAULT() (!palReadPad(GPIOB, 7)) + +#define LED_GREEN_ON() palSetPad(GPIOB, 0) +#define LED_GREEN_OFF() palClearPad(GPIOB, 0) +#define LED_RED_ON() palSetPad(GPIOB, 1) +#define LED_RED_OFF() palClearPad(GPIOB, 1) + +//#define PHASE_FILTER_GPIO GPIOC +//#define PHASE_FILTER_PIN 13 +//#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) +//#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN) + +/* + * ADC Vector + * + * 0: IN0 SENS1 + * 1: IN1 SENS2 + * 2: IN2 SENS3 + * 3: IN10 CURR1 + * 4: IN11 CURR2 + * 5: IN12 CURR3 + * 6: IN5 ADC_EXT1 + * 7: IN6 ADC_EXT2 + * 8: IN3 TEMP_PCB + * 9: IN14 TEMP_MOTOR + * 10: IN15 ADC_EXT3 + * 11: IN13 AN_IN + * 12: Vrefint + * 13: IN0 SENS1 + * 14: IN1 SENS2 + */ + +#define HW_ADC_CHANNELS 15 +#define HW_ADC_INJ_CHANNELS 3 +#define HW_ADC_NBR_CONV 5 + +// ADC Indexes +#define ADC_IND_SENS1 0 +#define ADC_IND_SENS2 1 +#define ADC_IND_SENS3 2 +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_CURR3 5 +#define ADC_IND_VIN_SENS 11 +#define ADC_IND_EXT 6 +#define ADC_IND_EXT2 7 +#define ADC_IND_TEMP_MOS 8 +#define ADC_IND_TEMP_MOTOR 9 +#define ADC_IND_VREFINT 12 + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.3 +#endif +#ifndef VIN_R1 +#define VIN_R1 68000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 2200.0 +#endif +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN 10.0 +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES 0.001 +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// NTC Termistors +#define NTC_RES(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) //NTC is low side onb this hardware +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG) + +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR3_DOUBLE_SAMPLE +#define CURR3_DOUBLE_SAMPLE 0 +#endif + +// Number of servo outputs +#define HW_SERVO_NUM 1 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + + +// ICU Peripheral for servo decoding +#define HW_USE_SERVO_TIM4 +#define HW_ICU_DEV ICUD4 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM4 +#define HW_ICU_GPIO GPIOB +#define HW_ICU_PIN 6 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOC +#define HW_HALL_ENC_PIN1 6 +#define HW_HALL_ENC_GPIO2 GPIOC +#define HW_HALL_ENC_PIN2 7 +#define HW_HALL_ENC_GPIO3 GPIOC +#define HW_HALL_ENC_PIN3 8 +#define HW_ENC_TIM TIM3 +#define HW_ENC_TIM_AF GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC +#define HW_ENC_EXTI_PINSRC EXTI_PinSource8 +#define HW_ENC_EXTI_CH EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line8 +#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOA +#define HW_SPI_PIN_NSS 4 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOA +#define HW_SPI_PIN_MOSI 7 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// SPI for DRV8323S +#define DRV8323S_MOSI_GPIO GPIOC +#define DRV8323S_MOSI_PIN 12 +#define DRV8323S_MISO_GPIO GPIOC +#define DRV8323S_MISO_PIN 11 +#define DRV8323S_SCK_GPIO GPIOC +#define DRV8323S_SCK_PIN 10 +#define DRV8323S_CS_GPIO GPIOC +#define DRV8323S_CS_PIN 9 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) + +// Default setting overrides +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 92.0 // Maximum input voltage +#endif +#ifndef MCCONF_L_CURRENT_MAX +#define MCCONF_L_CURRENT_MAX 60.0 // Current limit in Amperes (Upper) +#endif +#ifndef MCCONF_L_CURRENT_MIN +#define MCCONF_L_CURRENT_MIN -60.0 // Current limit in Amperes (Lower) +#endif +#ifndef MCCONF_L_IN_CURRENT_MAX +#define MCCONF_L_IN_CURRENT_MAX 60.0 // Input current limit in Amperes (Upper) +#endif +#ifndef MCCONF_L_IN_CURRENT_MIN +#define MCCONF_L_IN_CURRENT_MIN -60.0 // Input current limit in Amperes (Lower) +#endif +#ifndef MCCONF_L_MAX_ABS_CURRENT +#define MCCONF_L_MAX_ABS_CURRENT 160.0 // The maximum absolute current above which a fault is generated +#endif + +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif +#ifndef MCCONF_FOC_F_SW +#define MCCONF_FOC_F_SW 20000.0 +#endif + +// Setting limits +#define HW_LIM_CURRENT -120.0, 120.0 +#define HW_LIM_CURRENT_IN -100.0, 100.0 +#define HW_LIM_CURRENT_ABS 0.0, 160.0 +#define HW_LIM_VIN 6.0, 92.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.99 +#define HW_LIM_TEMP_FET -40.0, 110.0 + +#endif /* HW_HV_stormcore_H_ */ diff --git a/hwconf/hw_stormcore_60d.c b/hwconf/hw_stormcore_60d.c new file mode 100644 index 00000000..d01ee2c9 --- /dev/null +++ b/hwconf/hw_stormcore_60d.c @@ -0,0 +1,284 @@ +/* + Copyright 2016 Benjamin Vedder benjamin@vedder.se + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ +#include "hw.h" +#include "ch.h" +#include "hal.h" +#include "stm32f4xx_conf.h" +#include "drv8323s.h" + +// Variables +static volatile bool i2c_running = false; + +// I2C configuration +static const I2CConfig i2cfg = { + OPMODE_I2C, + 100000, + STD_DUTY_CYCLE +}; + +void hw_init_gpio(void) { + // GPIO clock enable + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE); + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE); + + + + + // LEDs + palSetPadMode(GPIOA, 8, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(GPIOC, 9, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + //Temp switches + palSetPadMode(ADC_SW_EN_PORT, ADC_SW_EN_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_1_PORT, ADC_SW_1_PIN , + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_2_PORT, ADC_SW_2_PIN, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(ADC_SW_3_PORT, ADC_SW_3_PIN , + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + + + ENABLE_MOS_TEMP1(); + + // GPIOC (ENABLE_GATE) + palSetPadMode(GPIOE, 14, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + palSetPadMode(GPIOD, 4, + PAL_MODE_OUTPUT_PUSHPULL | + PAL_STM32_OSPEED_HIGHEST); + DISABLE_GATE(); + DISABLE_GATE2(); + // GPIOB (DCCAL) + + + // GPIOA Configuration: Channel 1 to 3 as alternate function push-pull + palSetPadMode(GPIOE, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOE, 11, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 12, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOE, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOC, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOC, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) | + PAL_STM32_OSPEED_HIGHEST | + PAL_STM32_PUDR_FLOATING); + + // Hall sensors + palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5, PAL_MODE_INPUT_PULLUP); + palSetPadMode(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6, PAL_MODE_INPUT_PULLUP); + + // Fault pin + palSetPadMode(GPIOE, 3, PAL_MODE_INPUT_PULLUP); + palSetPadMode(GPIOD, 3, PAL_MODE_INPUT_PULLUP); + + // ADC Pins + palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG); + palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG); + ENABLE_GATE() + ENABLE_GATE2() + + drv8323s_init(); +} + +void hw_setup_adc_channels(void) { + + // ADC1 regular channels + ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles); //0 + ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 2, ADC_SampleTime_15Cycles);//3 + ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 3, ADC_SampleTime_15Cycles);//6 + ADC_RegularChannelConfig(ADC1, ADC_Channel_5 , 4, ADC_SampleTime_15Cycles);//9 + ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 5, ADC_SampleTime_15Cycles);//12 + + // ADC2 regular channels + ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);//1 + ADC_RegularChannelConfig(ADC2, ADC_Channel_8, 2, ADC_SampleTime_15Cycles);//4 + ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 3, ADC_SampleTime_15Cycles);//7 + ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 4, ADC_SampleTime_15Cycles);//10 + ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 5, ADC_SampleTime_15Cycles);//13 + + // ADC3 regular channels + ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);//2 + ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);//5 + ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);//8 + ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);//11 + ADC_RegularChannelConfig(ADC3, ADC_Channel_11, 5, ADC_SampleTime_15Cycles);//14 + + // Injected channels + ADC_InjectedChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles); + + + ADC_InjectedChannelConfig(ADC2, ADC_Channel_5, 1, ADC_SampleTime_15Cycles); + ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 2, ADC_SampleTime_15Cycles); + + // ADC_InjectedChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles); + // ADC_InjectedChannelConfig(ADC3, ADC_Channel_0, 2, ADC_SampleTime_15Cycles); + //ADC_InjectedChannelConfig(ADC3, ADC_Channel_1, 3, ADC_SampleTime_15Cycles); +} + +void hw_start_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (!i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + i2cStart(&HW_I2C_DEV, &i2cfg); + i2c_running = true; + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +void hw_stop_i2c(void) { + i2cAcquireBus(&HW_I2C_DEV); + + if (i2c_running) { + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT); + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT); + + i2cStop(&HW_I2C_DEV); + i2c_running = false; + + } + + i2cReleaseBus(&HW_I2C_DEV); +} + +/** + * Try to restore the i2c bus + */ +void hw_try_restore_i2c(void) { + if (i2c_running) { + i2cAcquireBus(&HW_I2C_DEV); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + chThdSleep(1); + + for(int i = 0;i < 16;i++) { + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + } + + // Generate start then stop condition + palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + chThdSleep(1); + palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN); + chThdSleep(1); + palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN); + + palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, + PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) | + PAL_STM32_OTYPE_OPENDRAIN | + PAL_STM32_OSPEED_MID1 | + PAL_STM32_PUDR_PULLUP); + + HW_I2C_DEV.state = I2C_STOP; + i2cStart(&HW_I2C_DEV, &i2cfg); + + i2cReleaseBus(&HW_I2C_DEV); + } +} diff --git a/hwconf/hw_stormcore_60d.h b/hwconf/hw_stormcore_60d.h new file mode 100644 index 00000000..2c5b2aa8 --- /dev/null +++ b/hwconf/hw_stormcore_60d.h @@ -0,0 +1,357 @@ +/* + Copyright 2016 Benjamin Vedder benjamin@vedder.se + + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + */ +#ifndef HW_STORMCORE_60D_H_ +#define HW_STORMCORE_60D_H_ + +#define HW_NAME "STORMCORE_60D" +#include "drv8323s.h" + +// HW properties +#define HW_HAS_DRV8323S // for idrive do 0x073b for reg 4 (LS) and 0x034b for reg 3 (HS) +#define HW_HAS_3_SHUNTS + +#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \ + drv8323s_write_reg(3,0x377); \ + drv8323s_write_reg(4,0x777); + +//#define HW_DEAD_TIME_NSEC 360.0 // Dead time + +#define HW_HAS_DUAL_MOTOR +//Switch Pins +#define HW_HAS_STORMCORE_SWITCH +#define HW_HAS_RGB_SWITCH +#define SWITCH_IN_GPIO GPIOA +#define SWITCH_IN_PIN 15 +#define SWITCH_OUT_GPIO GPIOB +#define SWITCH_OUT_PIN 13 +#define SWITCH_PRECHARGE_GPIO GPIOE +#define SWITCH_PRECHARGE_PIN 2 +#define SWITCH_LED_3_GPIO GPIOD +#define SWITCH_LED_3_PIN 15 +#define SWITCH_LED_2_GPIO GPIOD +#define SWITCH_LED_2_PIN 10 +#define SWITCH_LED_1_GPIO GPIOD +#define SWITCH_LED_1_PIN 11 + + +#define DCCAL_ON() //drv8323s_dccal_on() +#define DCCAL_OFF() //drv8323s_dccal_off() + +#define HW_EARLY_INIT() smart_switch_pin_init(); smart_switch_thread_start(); + + + +//Pins for BLE UART +//#define USE_ALT_UART_PORT + +#define HW_UART_P_BAUD 115200 +#define HW_UART_P_DEV SD1 +#define HW_UART_P_GPIO_AF GPIO_AF_USART1 +#define HW_UART_P_TX_PORT GPIOA +#define HW_UART_P_TX_PIN 9 +#define HW_UART_P_RX_PORT GPIOA +#define HW_UART_P_RX_PIN 10 + +// SPI for DRV8301 +#define DRV8323S_MOSI_GPIO GPIOC +#define DRV8323S_MOSI_PIN 12 +#define DRV8323S_MISO_GPIO GPIOC +#define DRV8323S_MISO_PIN 11 +#define DRV8323S_SCK_GPIO GPIOC +#define DRV8323S_SCK_PIN 10 +#define DRV8323S_CS_GPIO GPIOC +#define DRV8323S_CS_PIN 13 +#define DRV8323S_CS_GPIO2 GPIOD +#define DRV8323S_CS_PIN2 2 +#define DRV8323S_CS_GPIO3 GPIOE +#define DRV8323S_CS_PIN3 15 + +// Macros +#define ENABLE_GATE() palSetPad(GPIOE, 14); +#define DISABLE_GATE() palClearPad(GPIOE, 14) +#define ENABLE_GATE2() palSetPad(GPIOD, 4); +#define DISABLE_GATE2() palClearPad(GPIOD, 4) + +#define ADC_SW_EN_PORT GPIOB +#define ADC_SW_EN_PIN 12 +#define ADC_SW_1_PORT GPIOD +#define ADC_SW_1_PIN 7 +#define ADC_SW_2_PORT GPIOB +#define ADC_SW_2_PIN 3 +#define ADC_SW_3_PORT GPIOE +#define ADC_SW_3_PIN 7 + +#define ENABLE_MOS_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOS_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOT_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_MOT_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); +#define ENABLE_V_BATT_DIV() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\ + palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN ); + + +#define IS_DRV_FAULT() (!palReadPad(GPIOE, 3)) +#define IS_DRV_FAULT2() (!palReadPad(GPIOD, 3)) + +#define LED_GREEN_ON() palSetPad(GPIOC, 9); //palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN); +#define LED_GREEN_OFF() palClearPad(GPIOC, 9); //palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN); +#define LED_RED_ON() palSetPad(GPIOA, 8); //palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN); +#define LED_RED_OFF() palClearPad(GPIOA, 8); //palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN); +#define LED_SWITCH_R_ON() palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN) +#define LED_SWITCH_R_OFF() palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN) +#define LED_SWITCH_G_ON() palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_SWITCH_G_OFF() palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN) +#define LED_SWITCH_B_ON() palClearPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN) +#define LED_SWITCH_B_OFF() palSetPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN) + + +/* + * ADC Vector + * + * 0: IN14 CURR3 + * 1: IN15 CURR4 + * 2: IN3 SERVO2/ADC + * 3: IN9 CURR1 + * 4: IN8 CURR2 + * 5: IN10 AN_IN + * 6: IN0 SENS2 + * 7: IN1 SENS3 + * 8: IN2 SENS1 + * 9: IN5 ADC_EXT + * 10: IN4 ADC_TEMP + * 11: IN13 SENS4 + * 12: Vrefint + * 13: IN11 SENS6 + * 14: IN12 SENS5 + * 15: IN6 ADC_EXT2 + */ + +#define HW_ADC_CHANNELS 15 +#define HW_ADC_INJ_CHANNELS 2 +#define HW_ADC_NBR_CONV 5 + +// ADC Indexes + +#define ADC_IND_SENS2 0 +#define ADC_IND_SENS3 1 +#define ADC_IND_SENS1 2 + +#define ADC_IND_CURR1 3 +#define ADC_IND_CURR2 4 +#define ADC_IND_VIN_SENS 5 + +#define ADC_IND_CURR3 6 +#define ADC_IND_CURR4 7 +#define ADC_IND_VM_SENSE 8 + +#define ADC_IND_CURR6 9 +#define ADC_IND_CURR5 10 +#define ADC_IND_SENS4 11 + +#define ADC_IND_ADC_MUX 12 +#define ADC_IND_SENS5 13 +#define ADC_IND_SENS6 14 + + + + + + + + + + + +// ADC macros and settings + +// Component parameters (can be overridden) +#ifndef V_REG +#define V_REG 3.3 +#endif +#ifndef VIN_R1 +#define VIN_R1 68000.0 +#endif +#ifndef VIN_R2 +#define VIN_R2 2200.0 +#endif +#ifndef CURRENT_AMP_GAIN +#define CURRENT_AMP_GAIN 10.0 +#endif +#ifndef CURRENT_SHUNT_RES +#define CURRENT_SHUNT_RES 0.001 +#endif + +// Input voltage +#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2)) +#define GET_BATT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_ADC_MUX] * ((VIN_R1 + VIN_R2) / VIN_R2)) +#define GET_VM_SENSE_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VM_SENSE] * ((VIN_R1 + VIN_R2) / VIN_R2)) + +// Voltage on ADC channel +#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4095.0 * V_REG) + +#define SHUTDOWN_RESET() mc_interface_reset_seconds_inactive() + +// NTC Termistors +#define NTC_RES(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side // High side ->((4095.0 * 10000.0) / adc_val - 10000.0) +#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3434.0) + (1.0 / 298.15)) - 273.15) + +#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side +#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) +#define NTC_TEMP_MOTOR2(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15) +// Double samples in beginning and end for positive current measurement. +// Useful when the shunt sense traces have noise that causes offset. +#ifndef CURR1_DOUBLE_SAMPLE +#define CURR1_DOUBLE_SAMPLE 0 +#endif +#ifndef CURR2_DOUBLE_SAMPLE +#define CURR2_DOUBLE_SAMPLE 0 +#endif + +// Number of servo outputs +#define HW_SERVO_NUM 2 + +// UART Peripheral +#define HW_UART_DEV SD3 +#define HW_UART_GPIO_AF GPIO_AF_USART3 +#define HW_UART_TX_PORT GPIOB +#define HW_UART_TX_PIN 10 +#define HW_UART_RX_PORT GPIOB +#define HW_UART_RX_PIN 11 + +// ICU Peripheral for servo decoding +#define HW_ICU_TIMER TIM9 +#define HW_ICU_DEV ICUD9 +#define HW_ICU_CHANNEL ICU_CHANNEL_1 +#define HW_ICU_GPIO_AF GPIO_AF_TIM9 +#define HW_ICU_GPIO GPIOE +#define HW_ICU_PIN 5 + +// I2C Peripheral +#define HW_I2C_DEV I2CD2 +#define HW_I2C_GPIO_AF GPIO_AF_I2C2 +#define HW_I2C_SCL_PORT GPIOB +#define HW_I2C_SCL_PIN 10 +#define HW_I2C_SDA_PORT GPIOB +#define HW_I2C_SDA_PIN 11 + +// Hall/encoder pins +#define HW_HALL_ENC_GPIO1 GPIOD +#define HW_HALL_ENC_PIN1 13 +#define HW_HALL_ENC_GPIO2 GPIOD +#define HW_HALL_ENC_PIN2 12 +#define HW_HALL_ENC_GPIO3 GPIOD +#define HW_HALL_ENC_PIN3 14 +#define HW_ENC_TIM TIM4 +#define HW_ENC_TIM_AF GPIO_AF_TIM4 +#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE) +#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOD +#define HW_ENC_EXTI_PINSRC EXTI_PinSource14 +#define HW_ENC_EXTI_CH EXTI15_10_IRQn +#define HW_ENC_EXTI_LINE EXTI_Line14 +#define HW_ENC_EXTI_ISR_VEC EXTI15_10_IRQHandler +#define HW_ENC_TIM_ISR_CH TIM4_IRQn +#define HW_ENC_TIM_ISR_VEC TIM4_IRQHandler + +#define HW_HALL_ENC_GPIO4 GPIOB +#define HW_HALL_ENC_PIN4 4 +#define HW_HALL_ENC_GPIO5 GPIOB +#define HW_HALL_ENC_PIN5 6 +#define HW_HALL_ENC_GPIO6 GPIOB +#define HW_HALL_ENC_PIN6 7 +#define HW_ENC_TIM2 TIM3 +#define HW_ENC_TIM_AF2 GPIO_AF_TIM3 +#define HW_ENC_TIM_CLK_EN2() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE) +#define HW_ENC_EXTI_PORTSRC2 EXTI_PortSourceGPIOB +#define HW_ENC_EXTI_PINSRC2 EXTI_PinSource7 +#define HW_ENC_EXTI_CH2 EXTI9_5_IRQn +#define HW_ENC_EXTI_LINE2 EXTI_Line6 +#define HW_ENC_EXTI_ISR_VEC2 EXTI9_5_IRQHandler +#define HW_ENC_TIM_ISR_CH2 TIM3_IRQn +#define HW_ENC_TIM_ISR_VEC2 TIM3_IRQHandler + +// NRF pins +// NRF pins +#define NRF_PORT_CSN GPIOD +#define NRF_PIN_CSN 3 +#define NRF_PORT_SCK GPIOD +#define NRF_PIN_SCK 2 +#define NRF_PORT_MOSI GPIOD +#define NRF_PIN_MOSI 11 +#define NRF_PORT_MISO GPIOD +#define NRF_PIN_MISO 10 + +// NRF SWD +#define NRF5x_SWDIO_GPIO GPIOD +#define NRF5x_SWDIO_PIN 6 +#define NRF5x_SWCLK_GPIO GPIOD +#define NRF5x_SWCLK_PIN 5 + +#ifndef MCCONF_DEFAULT_MOTOR_TYPE +#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC +#endif + +// SPI pins +#define HW_SPI_DEV SPID1 +#define HW_SPI_GPIO_AF GPIO_AF_SPI1 +#define HW_SPI_PORT_NSS GPIOB +#define HW_SPI_PIN_NSS 11 +#define HW_SPI_PORT_SCK GPIOA +#define HW_SPI_PIN_SCK 5 +#define HW_SPI_PORT_MOSI GPIOB +#define HW_SPI_PIN_MOSI 5 +#define HW_SPI_PORT_MISO GPIOA +#define HW_SPI_PIN_MISO 6 + +// Measurement macros +#define ADC_V_L1 ADC_Value[ADC_IND_SENS1] +#define ADC_V_L2 ADC_Value[ADC_IND_SENS2] +#define ADC_V_L3 ADC_Value[ADC_IND_SENS3] +#define ADC_V_L4 ADC_Value[ADC_IND_SENS4] +#define ADC_V_L5 ADC_Value[ADC_IND_SENS5] +#define ADC_V_L6 ADC_Value[ADC_IND_SENS6] +#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) + +// Macros +#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1) +#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2) +#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3) +#define READ_HALL4() palReadPad(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4) +#define READ_HALL5() palReadPad(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5) +#define READ_HALL6() palReadPad(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6) + +//CAN +#define HW_CANH_PORT GPIOD +#define HW_CANH_PIN 0 +#define HW_CANL_PORT GPIOD +#define HW_CANL_PIN 1 +#ifndef MCCONF_L_MAX_VOLTAGE +#define MCCONF_L_MAX_VOLTAGE 58.0 +#endif +// Setting limits +#define HW_LIM_CURRENT -150.0, 150.0 +#define HW_LIM_CURRENT_IN -120.0, 120.0 +#define HW_LIM_CURRENT_ABS 0.0, 200.0 +#define HW_LIM_VIN 6.0, 58.0 +#define HW_LIM_ERPM -200e3, 200e3 +#define HW_LIM_DUTY_MIN 0.0, 0.1 +#define HW_LIM_DUTY_MAX 0.0, 0.95 +#define HW_LIM_TEMP_FET -40.0, 120.0 + +#endif /* HW_STORMCORE_60D_H_ */ diff --git a/hwconf/hw_unity.h b/hwconf/hw_unity.h index 2e1c028d..a2f55b56 100644 --- a/hwconf/hw_unity.h +++ b/hwconf/hw_unity.h @@ -72,13 +72,13 @@ //#define DISABLE_GATE2() palClearPad(GPIOD, 4) #define ENABLE_MOS_TEMP1() palSetPad(GPIOE, 7); palClearPad(GPIOD, 8);\ - palClearPad(GPIOD, 9); palClearPad(GPIOB, 12); + palClearPad(GPIOD, 9); palClearPad(GPIOB, 12); #define ENABLE_MOS_TEMP2() palSetPad(GPIOD, 8); palClearPad(GPIOE, 7);\ - palClearPad(GPIOD, 9); palClearPad(GPIOB, 12); + palClearPad(GPIOD, 9); palClearPad(GPIOB, 12); #define ENABLE_MOT_TEMP1() palSetPad(GPIOD, 9); palClearPad(GPIOE, 7);\ - palClearPad(GPIOD, 8); palClearPad(GPIOB, 12); + palClearPad(GPIOD, 8); palClearPad(GPIOB, 12); #define ENABLE_MOT_TEMP2() palSetPad(GPIOB, 12); palClearPad(GPIOE, 7);\ - palClearPad(GPIOD, 8); palClearPad(GPIOD, 9); + palClearPad(GPIOD, 8); palClearPad(GPIOD, 9); #define DCCAL_ON() palSetPad(GPIOB, 8) #define DCCAL_OFF() palClearPad(GPIOB, 8) @@ -275,6 +275,7 @@ #define ADC_V_L4 ADC_Value[ADC_IND_SENS4] #define ADC_V_L5 ADC_Value[ADC_IND_SENS5] #define ADC_V_L6 ADC_Value[ADC_IND_SENS6] + #define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2) // Macros diff --git a/mcpwm_foc.c b/mcpwm_foc.c index d3827016..fcf97c93 100644 --- a/mcpwm_foc.c +++ b/mcpwm_foc.c @@ -2106,7 +2106,7 @@ void mcpwm_foc_adc_int_handler(void *p, uint32_t flags) { #ifdef HW_HAS_3_SHUNTS #ifdef HW_HAS_DUAL_MOTORS - int curr2 = is_second_motor ? GET_CURRENT3() : GET_CURRENT3_M2(); + int curr2 = is_second_motor ? GET_CURRENT3_M2() : GET_CURRENT3(); #else int curr2 = GET_CURRENT3(); #endif @@ -2762,9 +2762,9 @@ static void timer_update(volatile motor_all_state_t *motor, float dt) { } // Update and the observer gain. - motor->m_gamma_now = utils_map(fabsf(motor->m_motor_state.duty_now), 0.0, 1.0, - motor->m_conf->foc_observer_gain * motor->m_conf->foc_observer_gain_slow, - motor->m_conf->foc_observer_gain); + motor->m_gamma_now = utils_map(fabsf(motor->m_motor_state.duty_now), + 0.0, 30.0 / motor->m_motor_state.v_bus, motor->m_conf->foc_observer_gain_slow * motor->m_conf->foc_observer_gain, + motor->m_conf->foc_observer_gain); } static THD_FUNCTION(timer_thread, arg) {