diff --git a/ChibiOS_3.0.2/os/hal/src/usb.c b/ChibiOS_3.0.2/os/hal/src/usb.c index c563d5fe..5c852cbc 100644 --- a/ChibiOS_3.0.2/os/hal/src/usb.c +++ b/ChibiOS_3.0.2/os/hal/src/usb.c @@ -757,7 +757,7 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) { usbp->ep0state = USB_EP0_WAITING_TX0; return; } - /* Falls into, it is intentional.*/ + /* Falls through. */ case USB_EP0_WAITING_TX0: /* Transmit phase over, receiving the zero sized status packet.*/ usbp->ep0state = USB_EP0_WAITING_STS; @@ -782,7 +782,7 @@ void _usb_ep0in(USBDriver *usbp, usbep_t ep) { case USB_EP0_RX: /* All the above are invalid states in the IN phase.*/ osalDbgAssert(false, "EP0 state machine error"); - /* Falling through is intentional.*/ + /* Falls through. */ case USB_EP0_ERROR: /* Error response, the state machine goes into an error state, the low level layer will have to reset it to USB_EP0_WAITING_SETUP after @@ -842,7 +842,7 @@ void _usb_ep0out(USBDriver *usbp, usbep_t ep) { case USB_EP0_SENDING_STS: /* All the above are invalid states in the IN phase.*/ osalDbgAssert(false, "EP0 state machine error"); - /* Falling through is intentional.*/ + /* Falls through. */ case USB_EP0_ERROR: /* Error response, the state machine goes into an error state, the low level layer will have to reset it to USB_EP0_WAITING_SETUP after diff --git a/ChibiOS_3.0.2/os/rt/src/chschd.c b/ChibiOS_3.0.2/os/rt/src/chschd.c index e53384b3..8a3b8055 100644 --- a/ChibiOS_3.0.2/os/rt/src/chschd.c +++ b/ChibiOS_3.0.2/os/rt/src/chschd.c @@ -288,11 +288,12 @@ static void wakeup(void *p) { #if CH_CFG_USE_SEMAPHORES == TRUE case CH_STATE_WTSEM: chSemFastSignalI(tp->p_u.wtsemp); - /* Falls into, intentional. */ #endif #if (CH_CFG_USE_CONDVARS == TRUE) && (CH_CFG_USE_CONDVARS_TIMEOUT == TRUE) + /* Falls through. */ case CH_STATE_WTCOND: #endif + /* Falls through. */ case CH_STATE_QUEUED: /* States requiring dequeuing.*/ (void) queue_dequeue(tp);