mirror of https://github.com/rusefi/bldc.git
HW 4.10 support
This commit is contained in:
Benjamin Vedder
parent
984b846401
commit
116ef561d0
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@ -50,13 +50,14 @@
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* Select only one hardware version
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* Select only one hardware version
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*/
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*/
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#if !defined(HW_VERSION_40) && !defined(HW_VERSION_45) && !defined(HW_VERSION_46) && \
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#if !defined(HW_VERSION_40) && !defined(HW_VERSION_45) && !defined(HW_VERSION_46) && \
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!defined(HW_VERSION_48) && !defined(HW_VERSION_49) && !defined(HW_VERSION_R2) && \
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!defined(HW_VERSION_48) && !defined(HW_VERSION_49) && !defined(HW_VERSION_410) && \
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!defined(HW_VERSION_VICTOR_R1A)
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!defined(HW_VERSION_R2) && !defined(HW_VERSION_VICTOR_R1A)
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//#define HW_VERSION_40
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//#define HW_VERSION_40
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//#define HW_VERSION_45
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//#define HW_VERSION_45
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//#define HW_VERSION_46 // Also for 4.7
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//#define HW_VERSION_46 // Also for 4.7
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#define HW_VERSION_48
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#define HW_VERSION_48
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//#define HW_VERSION_49
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//#define HW_VERSION_49
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//#define HW_VERSION_410
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//#define HW_VERSION_R2
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//#define HW_VERSION_R2
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//#define HW_VERSION_VICTOR_R1A
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//#define HW_VERSION_VICTOR_R1A
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#endif
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#endif
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@ -84,8 +85,7 @@
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* Use encoder
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* Use encoder
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*/
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*/
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#define ENCODER_ENABLE 0
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#define ENCODER_ENABLE 0
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#define ENCODER_COUNTS 14400
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#define ENCODER_COUNTS 6400
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//#define ENCODER_COUNTS 10000
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/*
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/*
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* Enable CAN-bus
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* Enable CAN-bus
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@ -37,10 +37,10 @@
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#include "hw_48.h"
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#include "hw_48.h"
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#elif defined HW_VERSION_49
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#elif defined HW_VERSION_49
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#include "hw_49.h"
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#include "hw_49.h"
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#elif defined HW_VERSION_410
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#include "hw_410.h"
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#elif defined HW_VERSION_R2
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#elif defined HW_VERSION_R2
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#include "hw_r2.h"
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#include "hw_r2.h"
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#elif defined HW_VERSION_BW
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#include "hw_bw.h"
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#elif defined HW_VERSION_VICTOR_R1A
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#elif defined HW_VERSION_VICTOR_R1A
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#include "hw_victor_r1a.h"
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#include "hw_victor_r1a.h"
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#else
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#else
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@ -0,0 +1,245 @@
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/*
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Copyright 2015 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#ifdef HW_VERSION_410
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "servo.h"
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// Variables
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static volatile bool i2c_running = false;
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// I2C configuration
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static const I2CConfig i2cfg = {
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OPMODE_I2C,
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100000,
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STD_DUTY_CYCLE
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};
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void hw_init_gpio(void) {
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// GPIO clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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// LEDs
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palSetPadMode(GPIOC, 4,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOC, 5,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// GPIOC (ENABLE_GATE)
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palSetPadMode(GPIOC, 10,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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DISABLE_GATE();
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// GPIOB (DCCAL)
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palSetPadMode(GPIOB, 12,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
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palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Hall sensors
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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// Fault pin
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palSetPadMode(GPIOC, 12, PAL_MODE_INPUT_PULLUP);
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// ADC Pins
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
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}
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void hw_setup_adc_channels(void) {
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// ADC1 regular channels
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 4, ADC_SampleTime_15Cycles);
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// ADC2 regular channels
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
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// ADC3 regular channels
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 4, ADC_SampleTime_15Cycles);
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// Injected channels
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_8, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_9, 2, ADC_SampleTime_15Cycles);
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}
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void hw_setup_servo_outputs(void) {
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// Set up GPIO ports
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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// Set up servo structures
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servos[0].gpio = GPIOB;
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servos[0].pin = 5;
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servos[0].offset = 0;
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servos[0].pos = 128;
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servos[1].gpio = GPIOB;
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servos[1].pin = 4;
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servos[1].offset = 0;
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servos[1].pos = 0;
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}
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void hw_start_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (!i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2c_running = true;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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void hw_stop_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
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i2cStop(&HW_I2C_DEV);
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i2c_running = false;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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/**
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* Try to restore the i2c bus
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*/
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void hw_try_restore_i2c(void) {
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if (i2c_running) {
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i2cAcquireBus(&HW_I2C_DEV);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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for(int i = 0;i < 16;i++) {
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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}
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// Generate start then stop condition
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palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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HW_I2C_DEV.state = I2C_STOP;
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2cReleaseBus(&HW_I2C_DEV);
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}
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}
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#endif
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@ -0,0 +1,182 @@
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/*
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Copyright 2015 Benjamin Vedder benjamin@vedder.se
|
||||||
|
|
||||||
|
This program is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
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#ifndef HW_410_H_
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#define HW_410_H_
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// Macros
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#define ENABLE_GATE() palSetPad(GPIOC, 10)
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#define DISABLE_GATE() palClearPad(GPIOC, 10)
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#define DCCAL_ON() palSetPad(GPIOB, 12)
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#define DCCAL_OFF() palClearPad(GPIOB, 12)
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#define IS_DRV_FAULT() (!palReadPad(GPIOC, 12))
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#define LED_GREEN_ON() palSetPad(GPIOC, 4)
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#define LED_GREEN_OFF() palClearPad(GPIOC, 4)
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#define LED_RED_ON() palSetPad(GPIOC, 5)
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#define LED_RED_OFF() palClearPad(GPIOC, 5)
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/*
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* ADC Vector
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*
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* 0: IN0 SENS3
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* 1: IN1 SENS2
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* 2: IN2 SENS1
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* 3: IN5 CURR2
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* 4: IN6 CURR1
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* 5: IN3 TEMP_MOSFET
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||||||
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* 6: Vrefint
|
||||||
|
* 7: IN9 ADC_EXT2
|
||||||
|
* 8: IN12 AN_IN
|
||||||
|
* 9: IN4 TX_SDA_NSS
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||||||
|
* 10: IN15 ADC_EXT
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||||||
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* 11: IN10 TEMP_MOTOR
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||||||
|
*/
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||||||
|
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||||||
|
#define HW_ADC_CHANNELS 12
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||||||
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#define HW_ADC_NBR_CONV 4
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||||||
|
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||||||
|
// ADC Indexes
|
||||||
|
#define ADC_IND_SENS1 2
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||||||
|
#define ADC_IND_SENS2 1
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||||||
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#define ADC_IND_SENS3 0
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||||||
|
#define ADC_IND_CURR1 4
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||||||
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#define ADC_IND_CURR2 3
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||||||
|
#define ADC_IND_VIN_SENS 8
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||||||
|
#define ADC_IND_EXT 10
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||||||
|
#define ADC_IND_EXT2 7
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||||||
|
#define ADC_IND_TEMP_MOS1 5
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||||||
|
#define ADC_IND_TEMP_MOS2 5
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||||||
|
#define ADC_IND_TEMP_MOS3 5
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||||||
|
#define ADC_IND_TEMP_MOS4 5
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||||||
|
#define ADC_IND_TEMP_MOS5 5
|
||||||
|
#define ADC_IND_TEMP_MOS6 5
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||||||
|
#define ADC_IND_TEMP_PCB 5
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||||||
|
#define ADC_IND_VREFINT 6
|
||||||
|
|
||||||
|
// ADC macros and settings
|
||||||
|
|
||||||
|
// Component parameters (can be overridden)
|
||||||
|
#ifndef V_REG
|
||||||
|
//#define V_REG 3.3
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R1
|
||||||
|
#define VIN_R1 39000.0
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R2
|
||||||
|
#define VIN_R2 2200.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_AMP_GAIN
|
||||||
|
#define CURRENT_AMP_GAIN 10.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_SHUNT_RES
|
||||||
|
#define CURRENT_SHUNT_RES 0.001
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Input voltage
|
||||||
|
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
||||||
|
|
||||||
|
// Voltage on ADC channel
|
||||||
|
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4095.0 * V_REG)
|
||||||
|
|
||||||
|
// NTC Termistors
|
||||||
|
//#define NTC_RES(adc_val) (10000.0 / ((4096.0 / (float)adc_val) - 1.0))
|
||||||
|
#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
|
||||||
|
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3434.0) + (1.0 / 298.15)) - 273.15)
|
||||||
|
|
||||||
|
// Double samples in beginning and end for positive current measurement.
|
||||||
|
// Useful when the shunt sense traces have noise that causes offset.
|
||||||
|
#ifndef CURR1_DOUBLE_SAMPLE
|
||||||
|
#define CURR1_DOUBLE_SAMPLE 0
|
||||||
|
#endif
|
||||||
|
#ifndef CURR2_DOUBLE_SAMPLE
|
||||||
|
#define CURR2_DOUBLE_SAMPLE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Number of servo outputs
|
||||||
|
#define HW_SERVO_NUM 2
|
||||||
|
|
||||||
|
// UART Peripheral
|
||||||
|
#define HW_UART_DEV UARTD6
|
||||||
|
#define HW_UART_GPIO_AF GPIO_AF_USART6
|
||||||
|
#define HW_UART_TX_PORT GPIOC
|
||||||
|
#define HW_UART_TX_PIN 6
|
||||||
|
#define HW_UART_RX_PORT GPIOC
|
||||||
|
#define HW_UART_RX_PIN 7
|
||||||
|
|
||||||
|
// ICU Peripheral for servo decoding
|
||||||
|
#define HW_ICU_CHANNEL ICU_CHANNEL_2
|
||||||
|
#define HW_ICU_GPIO_AF GPIO_AF_TIM3
|
||||||
|
#define HW_ICU_GPIO GPIOB
|
||||||
|
#define HW_ICU_PIN 5
|
||||||
|
|
||||||
|
// I2C Peripheral
|
||||||
|
#define HW_I2C_DEV I2CD2
|
||||||
|
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||||
|
#define HW_I2C_SCL_PORT GPIOB
|
||||||
|
#define HW_I2C_SCL_PIN 10
|
||||||
|
#define HW_I2C_SDA_PORT GPIOB
|
||||||
|
#define HW_I2C_SDA_PIN 11
|
||||||
|
|
||||||
|
// Hall/encoder pins
|
||||||
|
#define HW_HALL_ENC_GPIO1 GPIOB
|
||||||
|
#define HW_HALL_ENC_PIN1 6
|
||||||
|
#define HW_HALL_ENC_GPIO2 GPIOB
|
||||||
|
#define HW_HALL_ENC_PIN2 7
|
||||||
|
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN3 11
|
||||||
|
#define HW_ENC_TIM TIM4
|
||||||
|
#define HW_ENC_TIM_AF GPIO_AF_TIM4
|
||||||
|
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||||
|
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||||
|
#define HW_ENC_EXTI_PINSRC EXTI_PinSource11
|
||||||
|
#define HW_ENC_EXTI_CH EXTI15_10_IRQn
|
||||||
|
#define HW_ENC_EXTI_LINE EXTI_Line11
|
||||||
|
#define HW_ENC_EXTI_ISR_VEC EXTI15_10_IRQHandler
|
||||||
|
|
||||||
|
// NRF pins
|
||||||
|
#define NRF_PORT_CSN GPIOB
|
||||||
|
#define NRF_PIN_CSN 11
|
||||||
|
#define NRF_PORT_SCK GPIOA
|
||||||
|
#define NRF_PIN_SCK 5
|
||||||
|
#define NRF_PORT_MOSI GPIOA
|
||||||
|
#define NRF_PIN_MOSI 7
|
||||||
|
#define NRF_PORT_MISO GPIOA
|
||||||
|
#define NRF_PIN_MISO 6
|
||||||
|
|
||||||
|
// SPI pins
|
||||||
|
#define HW_SPI_PORT_CSN GPIOB
|
||||||
|
#define HW_SPI_PIN_CSN 11
|
||||||
|
#define HW_SPI_PORT_SCK GPIOA
|
||||||
|
#define HW_SPI_PIN_SCK 5
|
||||||
|
#define HW_SPI_PORT_MOSI GPIOA
|
||||||
|
#define HW_SPI_PIN_MOSI 7
|
||||||
|
#define HW_SPI_PORT_MISO GPIOA
|
||||||
|
#define HW_SPI_PIN_MISO 6
|
||||||
|
|
||||||
|
// Measurement macros
|
||||||
|
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||||
|
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||||
|
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||||
|
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||||
|
|
||||||
|
// Macros
|
||||||
|
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||||
|
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||||
|
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||||
|
|
||||||
|
#endif /* HW_410_H_ */
|
||||||
|
|
@ -4,6 +4,7 @@ HWSRC = hwconf/hw_40.c \
|
||||||
hwconf/hw_46.c \
|
hwconf/hw_46.c \
|
||||||
hwconf/hw_48.c \
|
hwconf/hw_48.c \
|
||||||
hwconf/hw_49.c \
|
hwconf/hw_49.c \
|
||||||
|
hwconf/hw_410.c \
|
||||||
hwconf/hw_victor_r1a.c
|
hwconf/hw_victor_r1a.c
|
||||||
|
|
||||||
HWINC = hwconf
|
HWINC = hwconf
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue