mirror of https://github.com/rusefi/bldc.git
Fixed conflicts with master merge
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commit
2f19819d27
2
Makefile
2
Makefile
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@ -7,7 +7,7 @@
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ifeq ($(USE_OPT),)
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USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 -std=gnu99 -D_GNU_SOURCE
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USE_OPT += -DBOARD_OTG_NOVBUSSENS $(build_args)
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USE_OPT += -fsingle-precision-constant -Wdouble-promotion
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USE_OPT += -fsingle-precision-constant -Wdouble-promotion -specs=nosys.specs
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endif
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# C specific options here (added to USE_OPT).
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26
commands.c
26
commands.c
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@ -1065,6 +1065,32 @@ void commands_process_packet(unsigned char *data, unsigned int len,
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reply_func(send_buffer, ind);
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} break;
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case COMM_SET_CAN_MODE: {
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int32_t ind = 0;
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bool store = data[ind++];
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bool ack = data[ind++];
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bool mode = data[ind++];
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app_configuration *appconf = mempools_alloc_appconf();
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*appconf = *app_get_configuration();
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appconf->can_mode = mode;
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if (store) {
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conf_general_store_app_configuration(appconf);
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}
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app_set_configuration(appconf);
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mempools_free_appconf(appconf);
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if (ack) {
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ind = 0;
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uint8_t send_buffer[50];
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send_buffer[ind++] = packet_id;
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reply_func(send_buffer, ind);
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}
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} break;
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// Blocking commands. Only one of them runs at any given time, in their
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// own thread. If other blocking commands come before the previous one has
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// finished, they are discarded.
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@ -99,7 +99,8 @@
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//#define HW75_300_VEDDER_FIRST_PCB
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// Second revision with separate UART for NRF51
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#define HW75_300_REV_2
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//#define HW75_300_REV_2
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#define HW75_300_REV_3
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//#define HW_SOURCE "hw_75_300.c"
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//#define HW_HEADER "hw_75_300.h"
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@ -765,7 +765,8 @@ typedef enum {
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COMM_CAN_FWD_FRAME,
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COMM_SET_BATTERY_CUT,
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COMM_SET_BLE_NAME,
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COMM_SET_BLE_PIN
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COMM_SET_BLE_PIN,
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COMM_SET_CAN_MODE
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} COMM_PACKET_ID;
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// CAN commands
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@ -20,7 +20,9 @@
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#ifndef HW_75_300_H_
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#define HW_75_300_H_
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#ifdef HW75_300_REV_2
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#ifdef HW75_300_REV_3
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#define HW_NAME "75_300_R3"
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#elif defined(HW75_300_REV_2)
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#define HW_NAME "75_300_R2"
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#else
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#define HW_NAME "75_300"
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@ -197,6 +199,14 @@
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#define HW_UART_P_RX_PIN 11
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#endif
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#ifdef HW75_300_REV_3
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// NRF SWD
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#define NRF5x_SWDIO_GPIO GPIOA
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#define NRF5x_SWDIO_PIN 15
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#define NRF5x_SWCLK_GPIO GPIOB
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#define NRF5x_SWCLK_PIN 3
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#endif
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// ICU Peripheral for servo decoding
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#define HW_USE_SERVO_TIM4
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#define HW_ICU_TIMER TIM4
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