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100D Functioning 

Modified hw config of 100D to get running.

Increased delay in drv8323s to improve stability of spi bus (was getting erroneous read/write at anything lower)

added custom settings for drv8323s for things like adjustable gate drive currents and shunt amplifier gains.  Maybe should move to hw conf and do the motor switch from mc_interface.
This commit is contained in:
Jeffrey M. Friesen 2020-03-16 19:33:33 -07:00
parent b96a65ef64
commit 36bdbebae3
4 changed files with 343 additions and 284 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

66
hwconf/drv8323s.c
View File

@ -29,6 +29,7 @@
#include "commands.h"
#include <string.h>
#include <stdio.h>
#include "mc_interface.h"
// Private functions
static uint16_t spi_exchange(uint16_t x);
@ -52,6 +53,12 @@ void drv8323s_init(void) {
palSetPadMode(DRV8323S_CS_GPIO, DRV8323S_CS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(DRV8323S_MOSI_GPIO, DRV8323S_MOSI_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palSetPad(DRV8323S_MOSI_GPIO, DRV8323S_MOSI_PIN);
palSetPad(DRV8323S_CS_GPIO2, DRV8323S_CS_PIN2);
#ifdef DRV8323S_CS_GPIO2
palSetPadMode(DRV8323S_CS_GPIO2, DRV8323S_CS_PIN2, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palSetPad(DRV8323S_CS_GPIO2, DRV8323S_CS_PIN2);
#endif
chThdSleepMilliseconds(100);
@ -62,34 +69,34 @@ void drv8323s_init(void) {
drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN);
terminal_register_command_callback(
"drv8323s_read_reg",
"Read a register from the DRV8323S and print it.",
"[reg]",
terminal_read_reg);
"drv8323s_read_reg",
"Read a register from the DRV8323S and print it.",
"[reg]",
terminal_read_reg);
terminal_register_command_callback(
"drv8323s_write_reg",
"Write to a DRV8323S register.",
"[reg] [hexvalue]",
terminal_write_reg);
"drv8323s_write_reg",
"Write to a DRV8323S register.",
"[reg] [hexvalue]",
terminal_write_reg);
terminal_register_command_callback(
"drv8323s_set_oc_adj",
"Set the DRV8323S OC ADJ register.",
"[value]",
terminal_set_oc_adj);
"drv8323s_set_oc_adj",
"Set the DRV8323S OC ADJ register.",
"[value]",
terminal_set_oc_adj);
terminal_register_command_callback(
"drv8323s_print_faults",
"Print all current DRV8323S faults.",
0,
terminal_print_faults);
"drv8323s_print_faults",
"Print all current DRV8323S faults.",
0,
terminal_print_faults);
terminal_register_command_callback(
"drv8323s_reset_faults",
"Reset all latched DRV8323S faults.",
0,
terminal_reset_faults);
"drv8323s_reset_faults",
"Reset all latched DRV8323S faults.",
0,
terminal_reset_faults);
}
/**
@ -382,18 +389,35 @@ static void spi_transfer(uint16_t *in_buf, const uint16_t *out_buf, int length)
static void spi_begin(void) {
spi_delay();
#ifdef DRV8323S_CS_GPIO2
if (mc_interface_motor_now() == 2) {
palClearPad(DRV8323S_CS_GPIO2, DRV8323S_CS_PIN2);
} else {
palClearPad(DRV8323S_CS_GPIO, DRV8323S_CS_PIN);
}
#else
palClearPad(DRV8323S_CS_GPIO, DRV8323S_CS_PIN);
#endif
spi_delay();
}
static void spi_end(void) {
spi_delay();
#ifdef DRV8323S_CS_GPIO2
if (mc_interface_motor_now() == 2) {
palSetPad(DRV8323S_CS_GPIO2, DRV8323S_CS_PIN2);
} else {
palSetPad(DRV8323S_CS_GPIO, DRV8323S_CS_PIN);
}
#else
palSetPad(DRV8323S_CS_GPIO, DRV8323S_CS_PIN);
#endif
spi_delay();
}
static void spi_delay(void) {
for (volatile int i = 0;i < 10;i++) {
for (volatile int i = 0;i < 40;i++) {
__NOP();
}
}

471
hwconf/hw_stormcore_100d.c
View File

@ -36,268 +36,275 @@ typedef enum {
static volatile bool i2c_running = false;
static THD_WORKING_AREA(smart_switch_thread_wa, 128);
static THD_WORKING_AREA(mux_thread_wa, 128);
static THD_WORKING_AREA(switch_color_thread_wa, 128);
static THD_FUNCTION(mux_thread, arg);
static THD_FUNCTION(switch_color_thread, arg);
static volatile switch_states switch_state = SWITCH_BOOTED;
static volatile float switch_bright = 0.75;
// I2C configuration
static const I2CConfig i2cfg = {
OPMODE_I2C,
100000,
STD_DUTY_CYCLE
OPMODE_I2C,
100000,
STD_DUTY_CYCLE
};
void hw_init_gpio(void) {
// GPIO clock enable
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
// GPIO clock enable
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
// LEDs
palSetPadMode(GPIOA, 8,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(GPIOC, 9,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
// LEDs
palSetPadMode(GPIOA, 8,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(GPIOC, 9,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
//Temp switches
palSetPadMode(ADC_SW_EN_PORT, ADC_SW_EN_PIN,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_1_PORT, ADC_SW_1_PIN ,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_2_PORT, ADC_SW_2_PIN,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_3_PORT, ADC_SW_3_PIN ,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
//Temp switches
palSetPadMode(ADC_SW_EN_PORT, ADC_SW_EN_PIN,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_1_PORT, ADC_SW_1_PIN ,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_2_PORT, ADC_SW_2_PIN,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(ADC_SW_3_PORT, ADC_SW_3_PIN ,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
ENABLE_MOS_TEMP1();
ENABLE_MOS_TEMP1();
// GPIOC (ENABLE_GATE)
palSetPadMode(GPIOE, 14,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(GPIOD, 4,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
DISABLE_GATE();
// GPIOB (DCCAL)
// GPIOC (ENABLE_GATE)
palSetPadMode(GPIOE, 14,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(GPIOD, 4,
PAL_MODE_OUTPUT_PUSHPULL |
PAL_STM32_OSPEED_HIGHEST);
DISABLE_GATE();
// GPIOB (DCCAL)
// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
palSetPadMode(GPIOE, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
palSetPadMode(GPIOE, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 11, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 12, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 11, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 12, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOE, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOC, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
palSetPadMode(GPIOA, 7, PAL_MODE_ALTERNATE(GPIO_AF_TIM8) |
PAL_STM32_OSPEED_HIGHEST |
PAL_STM32_PUDR_FLOATING);
// Hall sensors
palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6, PAL_MODE_INPUT_PULLUP);
// Hall sensors
palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO4, HW_HALL_ENC_PIN4, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO5, HW_HALL_ENC_PIN5, PAL_MODE_INPUT_PULLUP);
palSetPadMode(HW_HALL_ENC_GPIO6, HW_HALL_ENC_PIN6, PAL_MODE_INPUT_PULLUP);
// Fault pin
palSetPadMode(GPIOE, 3, PAL_MODE_INPUT_PULLUP);
palSetPadMode(GPIOD, 3, PAL_MODE_INPUT_PULLUP);
// Fault pin
palSetPadMode(GPIOE, 3, PAL_MODE_INPUT_PULLUP);
palSetPadMode(GPIOD, 3, PAL_MODE_INPUT_PULLUP);
// ADC Pins
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
ENABLE_GATE();
// ADC Pins
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
ENABLE_GATE();
drv8323s_init();
drv8323s_init();
}
void hw_setup_adc_channels(void) {
// ADC1 regular channels
ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles); //0
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 2, ADC_SampleTime_15Cycles); //3
ADC_RegularChannelConfig(ADC1, ADC_Channel_5 , 3, ADC_SampleTime_15Cycles); //6
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 4, ADC_SampleTime_15Cycles); //9
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); //12
// ADC1 regular channels
ADC_RegularChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles); //0
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 2, ADC_SampleTime_15Cycles); //3
ADC_RegularChannelConfig(ADC1, ADC_Channel_5 , 3, ADC_SampleTime_15Cycles); //6
ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 4, ADC_SampleTime_15Cycles); //9
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 5, ADC_SampleTime_15Cycles); //12
// ADC2 regular channels
ADC_RegularChannelConfig(ADC2, ADC_Channel_8, 1, ADC_SampleTime_15Cycles); //1
ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 2, ADC_SampleTime_15Cycles); //4
ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); //7
ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 4, ADC_SampleTime_15Cycles); //10
ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); //13
// ADC2 regular channels
ADC_RegularChannelConfig(ADC2, ADC_Channel_8, 1, ADC_SampleTime_15Cycles); //1
ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 2, ADC_SampleTime_15Cycles); //4
ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); //7
ADC_RegularChannelConfig(ADC2, ADC_Channel_12, 4, ADC_SampleTime_15Cycles); //10
ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 5, ADC_SampleTime_15Cycles); //13
// ADC3 regular channels
ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); //2
ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 2, ADC_SampleTime_15Cycles); //5
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 3, ADC_SampleTime_15Cycles); //8
ADC_RegularChannelConfig(ADC3, ADC_Channel_11, 4, ADC_SampleTime_15Cycles); //11
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 5, ADC_SampleTime_15Cycles); //14
// ADC3 regular channels
ADC_RegularChannelConfig(ADC3, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); //2
ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 2, ADC_SampleTime_15Cycles); //5
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 3, ADC_SampleTime_15Cycles); //8
ADC_RegularChannelConfig(ADC3, ADC_Channel_11, 4, ADC_SampleTime_15Cycles); //11
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 5, ADC_SampleTime_15Cycles); //14
// Injected channels
ADC_InjectedChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles);
// Injected channels
ADC_InjectedChannelConfig(ADC1, ADC_Channel_9, 1, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC1, ADC_Channel_8, 2, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC2, ADC_Channel_5, 1, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 2, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC2, ADC_Channel_5, 1, ADC_SampleTime_15Cycles);
ADC_InjectedChannelConfig(ADC2, ADC_Channel_4, 2, ADC_SampleTime_15Cycles);
// ADC_InjectedChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
// ADC_InjectedChannelConfig(ADC3, ADC_Channel_0, 2, ADC_SampleTime_15Cycles);
//ADC_InjectedChannelConfig(ADC3, ADC_Channel_1, 3, ADC_SampleTime_15Cycles);
// ADC_InjectedChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
// ADC_InjectedChannelConfig(ADC3, ADC_Channel_0, 2, ADC_SampleTime_15Cycles);
//ADC_InjectedChannelConfig(ADC3, ADC_Channel_1, 3, ADC_SampleTime_15Cycles);
chThdCreateStatic(mux_thread_wa, sizeof(mux_thread_wa), NORMALPRIO, mux_thread, NULL);
chThdCreateStatic(switch_color_thread_wa, sizeof(switch_color_thread_wa), LOWPRIO, switch_color_thread, NULL);
}
void hw_start_i2c(void) {
i2cAcquireBus(&HW_I2C_DEV);
i2cAcquireBus(&HW_I2C_DEV);
if (!i2c_running) {
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
if (!i2c_running) {
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
i2cStart(&HW_I2C_DEV, &i2cfg);
i2c_running = true;
}
i2cStart(&HW_I2C_DEV, &i2cfg);
i2c_running = true;
}
i2cReleaseBus(&HW_I2C_DEV);
i2cReleaseBus(&HW_I2C_DEV);
}
void hw_stop_i2c(void) {
i2cAcquireBus(&HW_I2C_DEV);
i2cAcquireBus(&HW_I2C_DEV);
if (i2c_running) {
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
if (i2c_running) {
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
i2cStop(&HW_I2C_DEV);
i2c_running = false;
i2cStop(&HW_I2C_DEV);
i2c_running = false;
}
}
i2cReleaseBus(&HW_I2C_DEV);
i2cReleaseBus(&HW_I2C_DEV);
}
/**
* Try to restore the i2c bus
*/
void hw_try_restore_i2c(void) {
if (i2c_running) {
i2cAcquireBus(&HW_I2C_DEV);
if (i2c_running) {
i2cAcquireBus(&HW_I2C_DEV);
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
chThdSleep(1);
chThdSleep(1);
for(int i = 0;i < 16;i++) {
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
}
for(int i = 0;i < 16;i++) {
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
}
// Generate start then stop condition
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
chThdSleep(1);
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
// Generate start then stop condition
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
chThdSleep(1);
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
chThdSleep(1);
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
PAL_STM32_OTYPE_OPENDRAIN |
PAL_STM32_OSPEED_MID1 |
PAL_STM32_PUDR_PULLUP);
HW_I2C_DEV.state = I2C_STOP;
i2cStart(&HW_I2C_DEV, &i2cfg);
HW_I2C_DEV.state = I2C_STOP;
i2cStart(&HW_I2C_DEV, &i2cfg);
i2cReleaseBus(&HW_I2C_DEV);
}
i2cReleaseBus(&HW_I2C_DEV);
}
}
@ -337,13 +344,11 @@ static THD_FUNCTION(mux_thread, arg) {
ENABLE_V_BATT_DIV();
chThdSleepMilliseconds(1);
ADC_Value[ADC_IND_V_BATT] = ADC_Value[ADC_IND_ADC_MUX];
}
}
void smart_switch_keep_on(void) {
palSetPad(SWITCH_OUT_GPIO, SWITCH_OUT_PIN);
//#ifdef HW_HAS_RGB_SWITCH
// LED_SWITCH_B_ON();
// ledpwm_set_intensity(SWITCH_LED_B, 1.0);
@ -369,31 +374,66 @@ bool smart_switch_is_pressed(void) {
return false;
}
static THD_FUNCTION(switch_color_thread, arg) {
(void)arg;
chRegSetThreadName("switch_color_thread");
for (;;) {
float switch_red = 0;
float switch_green = 0;
float switch_blue = 1.0;
mc_fault_code fault = mc_interface_get_fault();
if (fault != FAULT_CODE_NONE) {
ledpwm_set_intensity(LED_HW2, 0);
ledpwm_set_intensity(LED_HW1, 0);
for (int i = 0;i < (int)fault;i++) {
ledpwm_set_intensity(LED_HW3, 1.0);
chThdSleepMilliseconds(250);
ledpwm_set_intensity(LED_HW3, 0.0);
chThdSleepMilliseconds(250);
}
chThdSleepMilliseconds(500);
} else {
float wh_left;
float left = mc_interface_get_battery_level(&wh_left);
if(left < 0.5){
float intense = utils_map(left,0.0, 0.5, 0.0, 1.0);
utils_truncate_number(&intense,0,1);
switch_blue = intense;
switch_red = 1.0-intense;
}else{
float intense = utils_map(left , 0.5, 1.0, 0.0, 1.0);
utils_truncate_number(&intense,0,1);
switch_green = intense;
switch_blue = 1.0-intense;
}
ledpwm_set_intensity(LED_HW1, switch_bright*switch_blue);
ledpwm_set_intensity(LED_HW2, switch_bright*switch_green);
ledpwm_set_intensity(LED_HW3, switch_bright*switch_red);
}
chThdSleepMilliseconds(20);
}
}
static THD_FUNCTION(smart_switch_thread, arg) {
(void)arg;
chRegSetThreadName("smart_switch");
unsigned int millis_switch_pressed = 0;
for (;;) {
switch (switch_state) {
case SWITCH_BOOTED:
ledpwm_set_intensity(LED_HW1, 0.6);
#ifdef HW_HAS_RGB_SWITCH
ledpwm_set_intensity(LED_HW1, 1.0);
#else
ledpwm_set_intensity(LED_HW1, 1.0);
#endif
switch_state = SWITCH_TURN_ON_DELAY_ACTIVE;
break;
case SWITCH_TURN_ON_DELAY_ACTIVE:
chThdSleepMilliseconds(500);
ledpwm_set_intensity(LED_HW1, 0.6);
switch_state = SWITCH_HELD_AFTER_TURN_ON;
#ifdef HW_HAS_STORMCORE_SWITCH
chThdSleepMilliseconds(5000);
palSetPad(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN);
#endif
break;
case SWITCH_HELD_AFTER_TURN_ON:
smart_switch_keep_on();
@ -406,10 +446,10 @@ static THD_FUNCTION(smart_switch_thread, arg) {
case SWITCH_TURNED_ON:
if (smart_switch_is_pressed()) {
millis_switch_pressed++;
ledpwm_set_intensity(LED_HW1, 1.0);
switch_bright = 1.0;
} else {
millis_switch_pressed = 0;
ledpwm_set_intensity(LED_HW1, 0.6);
switch_bright = 0.5;
}
if (millis_switch_pressed > SMART_SWITCH_MSECS_PRESSED_OFF) {
@ -417,7 +457,7 @@ static THD_FUNCTION(smart_switch_thread, arg) {
}
break;
case SWITCH_SHUTTING_DOWN:
ledpwm_set_intensity(LED_HW1, 0.0);
switch_bright = 0;
// TODO: Implement this?
// for (int i = 0;i < CAN_STATUS_MSGS_TO_STORE;i++) {
@ -447,26 +487,17 @@ void smart_switch_pin_init(void) {
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);
palSetPadMode(SWITCH_IN_GPIO, SWITCH_IN_PIN, PAL_MODE_INPUT);
palSetPadMode(SWITCH_IN_GPIO, SWITCH_IN_PIN, PAL_MODE_INPUT_PULLDOWN);
palSetPadMode(SWITCH_OUT_GPIO,SWITCH_OUT_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(SWITCH_LED_1_GPIO,SWITCH_LED_1_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
#ifdef HW_HAS_RGB_SWITCH
palSetPadMode(SWITCH_LED_2_GPIO,SWITCH_LED_2_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
palSetPadMode(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
#endif
#ifdef HW_HAS_STORMCORE_SWITCH
palSetPadMode(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palClearPad(SWITCH_PRECHARGE_GPIO, SWITCH_PRECHARGE_PIN);
palSetPad(SWITCH_OUT_GPIO, SWITCH_OUT_PIN);
#endif
#ifdef HW_HAS_RGB_SWITCH
LED_SWITCH_B_ON();
LED_SWITCH_R_OFF();
LED_SWITCH_G_OFF();
#else
LED_PWM1_ON();
#endif
return;
}

88
hwconf/hw_stormcore_100d.h
View File

@ -27,8 +27,8 @@
#define HW_HAS_3_SHUNTS
#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \
drv8323s_write_reg(3,0x377); \
drv8323s_write_reg(4,0x777);
drv8323s_write_reg(3,0x3AA); \
drv8323s_write_reg(4,0x7AA);
//#define HW_DEAD_TIME_NSEC 360.0 // Dead time
@ -36,6 +36,7 @@
//Switch Pins
#define HW_HAS_STORMCORE_SWITCH
#define HW_HAS_RGB_SWITCH
#define SWITCH_IN_GPIO GPIOA
#define SWITCH_IN_PIN 15
#define SWITCH_OUT_GPIO GPIOB
@ -95,46 +96,47 @@
#define ENABLE_GATE() palSetPad(GPIOE, 14); palSetPad(GPIOD, 4);
#define DISABLE_GATE() palClearPad(GPIOE, 14); palClearPad(GPIOD, 4);
#define ADC_SW_EN_PORT GPIOB
#define ADC_SW_EN_PIN 12
#define ADC_SW_1_PORT GPIOD
#define ADC_SW_1_PIN 7
#define ADC_SW_2_PORT GPIOB
#define ADC_SW_2_PIN 3
#define ADC_SW_3_PORT GPIOE
#define ADC_SW_3_PIN 7
#define ADC_SW_EN_PORT GPIOB
#define ADC_SW_EN_PIN 12
#define ADC_SW_1_PORT GPIOD
#define ADC_SW_1_PIN 7
#define ADC_SW_2_PORT GPIOB
#define ADC_SW_2_PIN 3
#define ADC_SW_3_PORT GPIOE
#define ADC_SW_3_PIN 7
#define ENABLE_MOS_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_MOS_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_MOT_TEMP1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_MOT_TEMP2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_ADC_EXT_2() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_ADC_EXT_1() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_ADC_EXT_3() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define ENABLE_V_BATT_DIV() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN); palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN );\
palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN ); palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN );
#define AD_DIS() palSetPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN )
#define AD1_L() palClearPad(ADC_SW_1_PORT, ADC_SW_1_PIN )
#define AD1_H() palSetPad(ADC_SW_1_PORT, ADC_SW_1_PIN )
#define AD2_L() palClearPad(ADC_SW_2_PORT, ADC_SW_2_PIN )
#define AD2_H() palSetPad(ADC_SW_2_PORT, ADC_SW_2_PIN )
#define AD3_L() palClearPad(ADC_SW_3_PORT, ADC_SW_3_PIN )
#define AD3_H() palSetPad(ADC_SW_3_PORT, ADC_SW_3_PIN )
#define AD_EN() palClearPad(ADC_SW_EN_PORT, ADC_SW_EN_PIN )
#define ENABLE_MOS_TEMP1() AD_DIS(); AD3_L(); AD2_L(); AD1_L(); AD_EN();
#define ENABLE_MOS_TEMP2() AD_DIS(); AD3_L(); AD2_L(); AD1_H(); AD_EN();
#define ENABLE_MOT_TEMP1() AD_DIS(); AD3_L(); AD2_H(); AD1_L(); AD_EN();
#define ENABLE_MOT_TEMP2() AD_DIS(); AD3_L(); AD2_H(); AD1_H(); AD_EN();
#define ENABLE_ADC_EXT_2() AD_DIS(); AD3_H(); AD2_L(); AD1_L(); AD_EN();
#define ENABLE_ADC_EXT_1() AD_DIS(); AD3_H(); AD2_L(); AD1_H(); AD_EN();
#define ENABLE_ADC_EXT_3() AD_DIS(); AD3_H(); AD2_H(); AD1_L(); AD_EN();
#define ENABLE_V_BATT_DIV() AD_DIS(); AD3_H(); AD2_H(); AD1_H(); AD_EN();
#define IS_DRV_FAULT() (!palReadPad(GPIOE, 3))
#define IS_DRV_FAULT2() (!palReadPad(GPIOD, 3))
#define IS_DRV_FAULT() (!palReadPad(GPIOE, 3))
#define IS_DRV_FAULT2() (!palReadPad(GPIOD, 3))
#define LED_GREEN_ON() palSetPad(GPIOC, 9);// palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN);
#define LED_GREEN_OFF() palClearPad(GPIOC, 9);// palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN);
#define LED_RED_ON() palSetPad(GPIOA, 8); //palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN);
#define LED_RED_OFF() palClearPad(GPIOA, 8); //palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN);
#define LED_SWITCH_R_ON() palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN)
#define LED_SWITCH_R_OFF() palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN)
#define LED_SWITCH_G_ON() palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN)
#define LED_SWITCH_G_OFF() palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN)
#define LED_SWITCH_B_ON() palClearPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN)
#define LED_SWITCH_B_OFF() palSetPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN)
#define LED_GREEN_ON() palSetPad(GPIOC, 9);// palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN);
#define LED_GREEN_OFF() palClearPad(GPIOC, 9);// palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN);
#define LED_RED_ON() palSetPad(GPIOA, 8); //palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN);
#define LED_RED_OFF() palClearPad(GPIOA, 8); //palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN);
#define LED_SWITCH_R_ON() palClearPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN)
#define LED_SWITCH_R_OFF() palSetPad(SWITCH_LED_3_GPIO,SWITCH_LED_3_PIN)
#define LED_SWITCH_G_ON() palClearPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN)
#define LED_SWITCH_G_OFF() palSetPad(SWITCH_LED_2_GPIO, SWITCH_LED_2_PIN)
#define LED_SWITCH_B_ON() palClearPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN)
#define LED_SWITCH_B_OFF() palSetPad(SWITCH_LED_1_GPIO, SWITCH_LED_1_PIN)
/*
@ -159,7 +161,7 @@
*/
#define HW_ADC_CHANNELS 15
#define HW_ADC_CHANNELS_EXTRA 8
#define HW_ADC_CHANNELS_EXTRA 15
#define HW_ADC_INJ_CHANNELS 2
#define HW_ADC_NBR_CONV 5
@ -191,7 +193,7 @@
#define ADC_IND_TEMP_MOTOR_2 18
#define ADC_IND_EXT 19
#define ADC_IND_EXT2 20
#define ADC_IND_EXT3 21
#define ADC_IND_EXT3 21
#define ADC_IND_V_BATT 22
// ADC macros and settings
@ -215,7 +217,7 @@
// Input voltage
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
#define GET_BATT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_ADC_MUX] * ((VIN_R1 + VIN_R2) / VIN_R2))
#define GET_BATT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_V_BATT] * ((VIN_R1 + VIN_R2) / VIN_R2))
#define GET_VM_SENSE_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VM_SENSE] * ((VIN_R1 + VIN_R2) / VIN_R2))
// Voltage on ADC channel
@ -226,8 +228,8 @@
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3434.0) + (1.0 / 298.15)) - 273.15)
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
#define NTC_TEMP_MOTOR2(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_ADC_MUX]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
#define NTC_TEMP_MOTOR2(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR2]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
// Double samples in beginning and end for positive current measurement.
// Useful when the shunt sense traces have noise that causes offset.
#ifndef CURR1_DOUBLE_SAMPLE

2
mc_interface.c
View File

@ -165,6 +165,7 @@ void mc_interface_init(void) {
#elif defined(HW_HAS_DRV8323S)
drv8323s_set_oc_mode(motor_now()->m_conf.m_drv8301_oc_mode);
drv8323s_set_oc_adj(motor_now()->m_conf.m_drv8301_oc_adj);
DRV8323S_CUSTOM_SETTINGS();
#endif
#ifdef HW_HAS_DUAL_MOTORS
@ -178,6 +179,7 @@ void mc_interface_init(void) {
#elif defined(HW_HAS_DRV8323S)
drv8323s_set_oc_mode(motor_now()->m_conf.m_drv8301_oc_mode);
drv8323s_set_oc_adj(motor_now()->m_conf.m_drv8301_oc_adj);
DRV8323S_CUSTOM_SETTINGS();
#endif
#endif
mc_interface_select_motor_thread(motor_old);