mirror of https://github.com/rusefi/bldc.git
Add config for A100S V4, Add A50S V23C 8S
Adds A100S V4 a 6 FET 100v for up to 200A motor, 120A battery. Adds A50S V23C 8S, adds and 8S variant of the A50S V23C that has a higher gain for lower noise. Also corrects the A50S V23c 3.3v reference to the correct voltage.
This commit is contained in:
Euan
parent
69e249ee13
commit
54b717b5d6
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@ -0,0 +1,8 @@
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#ifndef HW_A100S_V4_H_
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#define HW_A100S_V4_H_
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#define HW_A100S_V4
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#include "hw_a100s_v4_core.h"
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#endif /* HW_A100S_V4_H_ */
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@ -0,0 +1,408 @@
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/*
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Copyright 2018 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "utils.h"
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#include <math.h>
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#include "mc_interface.h"
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#include "commands.h"
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#include "terminal.h"
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#include "mcpwm.h"
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#include "mcpwm_foc.h"
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#include "app.h"
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#include "mempools.h"
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#include "timeout.h"
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#include "stdio.h"
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#include "imu.h"
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// Variables
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static volatile bool i2c_running = false;
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static volatile bool drv_handshake_complete = false;
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// Private functions
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static void terminal_cmd_doublepulse(int argc, const char** argv);
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// I2C configuration
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static const I2CConfig i2cfg = {
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OPMODE_I2C,
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100000,
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STD_DUTY_CYCLE
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};
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void hw_init_gpio(void) {
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// GPIO clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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// LEDs
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palSetPadMode(GPIOB, 5,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOB, 7,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
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palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Hall sensors
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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// Phase filters
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palSetPadMode(GPIOC, 9, PAL_MODE_OUTPUT_OPENDRAIN);
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palSetPadMode(GPIOC, 13, PAL_MODE_OUTPUT_OPENDRAIN);
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palSetPadMode(GPIOC, 14, PAL_MODE_OUTPUT_OPENDRAIN);
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PHASE_FILTER_OFF();
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// Current filter
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palSetPadMode(GPIOB, 2, PAL_MODE_OUTPUT_OPENDRAIN);
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palSetPadMode(GPIOB, 3, PAL_MODE_OUTPUT_OPENDRAIN);
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palSetPadMode(GPIOB, 4, PAL_MODE_OUTPUT_OPENDRAIN);
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CURRENT_FILTER_OFF();
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// ADC Pins
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
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//register terminal callbacks
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terminal_register_command_callback(
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"double_pulse",
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"Start a double pulse test",
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0,
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terminal_cmd_doublepulse);
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}
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void hw_setup_adc_channels(void) {
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// ADC1 regular channels
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ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); // 0 - ADC_IND_CURR1
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 2, ADC_SampleTime_15Cycles); // 3 - ADC_IND_SENS1
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); // 6 - ADC_IND_EXT
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 4, ADC_SampleTime_15Cycles); // 9 - ADC_IND_VREFINT
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ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 5, ADC_SampleTime_15Cycles); // 12 - unused
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// ADC2 regular channels
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ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); // 1 - ADC_IND_CURR2
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 2, ADC_SampleTime_15Cycles); // 4 - ADC_IND_SENS2
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ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); // 7 - ADC_IND_EXT2
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ADC_RegularChannelConfig(ADC2, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); // 10 - ADC_IND_TEMP_MOTOR
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ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 5, ADC_SampleTime_15Cycles); // 13 - unused
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// ADC3 regular channels - only a subset of channels avaliable
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ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); // 2 - ADC_IND_CURR3
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 2, ADC_SampleTime_15Cycles); // 5 - ADC_IND_SENS3
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ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 3, ADC_SampleTime_15Cycles); // 8 - ADC_IND_VIN_SENS
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ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 4, ADC_SampleTime_15Cycles); // 11 - ADC_IND_TEMP_MOS
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ADC_RegularChannelConfig(ADC3, ADC_Channel_14, 5, ADC_SampleTime_15Cycles); // 14 - UNUSED
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// Injected channels
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles); // ADC_IND_CURR3
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles); // ADC_IND_CURR3
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles); // ADC_IND_CURR3
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}
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void hw_start_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (!i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2c_running = true;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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void hw_stop_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
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i2cStop(&HW_I2C_DEV);
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i2c_running = false;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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/**
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* Try to restore the i2c bus
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*/
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void hw_try_restore_i2c(void) {
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if (i2c_running) {
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i2cAcquireBus(&HW_I2C_DEV);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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for(int i = 0;i < 16;i++) {
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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}
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// Generate start then stop condition
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palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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HW_I2C_DEV.state = I2C_STOP;
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2cReleaseBus(&HW_I2C_DEV);
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}
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}
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static void terminal_cmd_doublepulse(int argc, const char** argv)
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{
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(void)argc;
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(void)argv;
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int preface, pulse1, breaktime, pulse2;
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int utick;
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int deadtime = -1;
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TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
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TIM_OCInitTypeDef TIM_OCInitStructure;
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TIM_BDTRInitTypeDef TIM_BDTRInitStructure;
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if (argc < 5) {
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commands_printf("Usage: double_pulse <preface> <pulse1> <break> <pulse2> [deadtime]");
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commands_printf(" preface: idle time in us");
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commands_printf(" pulse1: high time of pulse 1 in us");
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commands_printf(" break: break between pulses in us");
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commands_printf(" pulse2: high time of pulse 2 in us");
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commands_printf(" deadtime: overwrite deadtime, in ns");
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return;
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}
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sscanf(argv[1], "%d", &preface);
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sscanf(argv[2], "%d", &pulse1);
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sscanf(argv[3], "%d", &breaktime);
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sscanf(argv[4], "%d", &pulse2);
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if (argc == 6) {
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sscanf(argv[5], "%d", &deadtime);
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}
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timeout_configure_IWDT_slowest();
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utick = (int)(SYSTEM_CORE_CLOCK / 1000000);
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mcpwm_deinit();
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mcpwm_foc_deinit();
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TIM_Cmd(TIM1, DISABLE);
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TIM_Cmd(TIM4, DISABLE);
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//TIM4 als Trigger Timer
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE);
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TIM_TimeBaseStructure.TIM_Period = (SYSTEM_CORE_CLOCK / 20000);
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TIM_TimeBaseStructure.TIM_Prescaler = 0;
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TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
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TIM_SelectMasterSlaveMode(TIM4, TIM_MasterSlaveMode_Enable);
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TIM_SelectOutputTrigger(TIM4, TIM_TRGOSource_Enable);
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TIM4->CNT = 0;
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// TIM1
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// TIM1 clock enable
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
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// Time Base configuration
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TIM_TimeBaseStructure.TIM_Prescaler = 0;
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TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
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TIM_TimeBaseStructure.TIM_Period = (preface + pulse1) * utick;
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TIM_TimeBaseStructure.TIM_ClockDivision = 0;
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TIM_TimeBaseStructure.TIM_RepetitionCounter = 0;
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TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);
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// Channel 1, 2 and 3 Configuration in PWM mode
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TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM2;
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TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
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TIM_OCInitStructure.TIM_OutputNState = TIM_OutputNState_Enable;
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TIM_OCInitStructure.TIM_Pulse = preface * utick;
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TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
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TIM_OCInitStructure.TIM_OCNPolarity = TIM_OCNPolarity_High;
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TIM_OCInitStructure.TIM_OCIdleState = TIM_OCIdleState_Set;
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TIM_OCInitStructure.TIM_OCNIdleState = TIM_OCNIdleState_Set;
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TIM_OC1Init(TIM1, &TIM_OCInitStructure);
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TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
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TIM_OC2Init(TIM1, &TIM_OCInitStructure);
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TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
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TIM_OC3Init(TIM1, &TIM_OCInitStructure);
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TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);
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TIM_SelectOCxM(TIM1, TIM_Channel_1, TIM_OCMode_PWM2);
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TIM_CCxCmd(TIM1, TIM_Channel_1, TIM_CCx_Enable);
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TIM_CCxNCmd(TIM1, TIM_Channel_1, TIM_CCxN_Enable);
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TIM_SelectOCxM(TIM1, TIM_Channel_2, TIM_OCMode_Inactive);
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TIM_CCxCmd(TIM1, TIM_Channel_2, TIM_CCx_Enable);
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TIM_CCxNCmd(TIM1, TIM_Channel_2, TIM_CCxN_Enable);
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TIM_SelectOCxM(TIM1, TIM_Channel_3, TIM_OCMode_Inactive);
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TIM_CCxCmd(TIM1, TIM_Channel_3, TIM_CCx_Enable);
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TIM_CCxNCmd(TIM1, TIM_Channel_3, TIM_CCxN_Enable);
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TIM_GenerateEvent(TIM1, TIM_EventSource_COM);
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// Automatic Output enable, Break, dead time and lock configuration
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TIM_BDTRInitStructure.TIM_OSSRState = TIM_OSSRState_Enable;
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TIM_BDTRInitStructure.TIM_OSSIState = TIM_OSSIState_Enable;
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TIM_BDTRInitStructure.TIM_LOCKLevel = TIM_LOCKLevel_OFF;
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if (deadtime < 0) {
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TIM_BDTRInitStructure.TIM_DeadTime = conf_general_calculate_deadtime(HW_DEAD_TIME_NSEC, SYSTEM_CORE_CLOCK);
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} else {
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TIM_BDTRInitStructure.TIM_DeadTime = conf_general_calculate_deadtime(deadtime, SYSTEM_CORE_CLOCK);
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}
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TIM_BDTRInitStructure.TIM_Break = TIM_Break_Disable;
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TIM_BDTRInitStructure.TIM_BreakPolarity = TIM_BreakPolarity_High;
|
||||
TIM_BDTRInitStructure.TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
|
||||
TIM_BDTRConfig(TIM1, &TIM_BDTRInitStructure);
|
||||
|
||||
TIM_CCPreloadControl(TIM1, ENABLE);
|
||||
TIM_ARRPreloadConfig(TIM1, ENABLE);
|
||||
|
||||
TIM1->CNT = 0;
|
||||
TIM1->EGR = TIM_EGR_UG;
|
||||
|
||||
TIM_SelectSlaveMode(TIM1, TIM_SlaveMode_Trigger);
|
||||
TIM_SelectInputTrigger(TIM1, TIM_TS_ITR3);
|
||||
TIM_SelectOnePulseMode(TIM1, TIM_OPMode_Single);
|
||||
TIM_CtrlPWMOutputs(TIM1, ENABLE);
|
||||
|
||||
TIM_Cmd(TIM1, ENABLE);
|
||||
//Timer 4 triggert Timer 1
|
||||
TIM_Cmd(TIM4, ENABLE);
|
||||
TIM_Cmd(TIM4, DISABLE);
|
||||
TIM1->ARR = (breaktime + pulse2) * utick;
|
||||
TIM1->CCR1 = breaktime * utick;
|
||||
while (TIM1->CNT != 0);
|
||||
TIM_Cmd(TIM4, ENABLE);
|
||||
|
||||
chThdSleepMilliseconds(1);
|
||||
TIM_CtrlPWMOutputs(TIM1, DISABLE);
|
||||
mc_configuration* mcconf = mempools_alloc_mcconf();
|
||||
*mcconf = *mc_interface_get_configuration();
|
||||
|
||||
switch (mcconf->motor_type) {
|
||||
case MOTOR_TYPE_BLDC:
|
||||
case MOTOR_TYPE_DC:
|
||||
mcpwm_init(mcconf);
|
||||
break;
|
||||
|
||||
case MOTOR_TYPE_FOC:
|
||||
mcpwm_foc_init(mcconf, mcconf);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
commands_printf("Done");
|
||||
mempools_free_mcconf(mcconf);
|
||||
return;
|
||||
}
|
||||
|
|
@ -0,0 +1,238 @@
|
|||
/*
|
||||
Copyright 2018 Benjamin Vedder benjamin@vedder.se
|
||||
|
||||
This file is part of the VESC firmware.
|
||||
|
||||
The VESC firmware is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
The VESC firmware is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef HW_A100S_V4_CORE_H_
|
||||
#define HW_A100S_V4_CORE_H_
|
||||
|
||||
// HW properties
|
||||
#define HW_HAS_3_SHUNTS
|
||||
#define HW_HAS_PHASE_SHUNTS
|
||||
//#define INVERTED_SHUNT_POLARITY
|
||||
#define HW_HAS_PHASE_FILTERS
|
||||
#define HW_USE_25MHZ_EXT_CLOCK
|
||||
//#define HW_USE_ALTERNATIVE_DC_CAL
|
||||
|
||||
#define HW_ADC_CHANNELS 15
|
||||
#define HW_ADC_INJ_CHANNELS 3
|
||||
#define HW_ADC_NBR_CONV 5
|
||||
|
||||
// ADC Indexes - refer to .c for descriptions
|
||||
#define ADC_IND_CURR1 0
|
||||
#define ADC_IND_CURR2 1
|
||||
#define ADC_IND_CURR3 2
|
||||
|
||||
#define ADC_IND_VIN_SENS 8
|
||||
#define ADC_IND_SENS1 3
|
||||
#define ADC_IND_SENS2 4
|
||||
#define ADC_IND_SENS3 5
|
||||
|
||||
#define ADC_IND_EXT 6
|
||||
#define ADC_IND_EXT2 7
|
||||
//#define ADC_IND_EXT3
|
||||
|
||||
#define ADC_IND_TEMP_MOS 11
|
||||
//#define ADC_IND_TEMP_MOS_2 12
|
||||
//#define ADC_IND_TEMP_MOS_3 13
|
||||
#define ADC_IND_TEMP_MOTOR 10
|
||||
|
||||
#define ADC_IND_VREFINT 9
|
||||
|
||||
|
||||
// ADC macros and settings
|
||||
|
||||
// Component parameters (can be overridden)
|
||||
#ifndef V_REG
|
||||
#define V_REG 3.30
|
||||
#endif
|
||||
#ifndef VIN_R1
|
||||
#define VIN_R1 100000.0
|
||||
#endif
|
||||
#ifndef VIN_R2
|
||||
#define VIN_R2 3160.0
|
||||
#endif
|
||||
#ifndef CURRENT_AMP_GAIN
|
||||
#define CURRENT_AMP_GAIN 20.0
|
||||
#endif
|
||||
#ifndef CURRENT_SHUNT_RES
|
||||
#define CURRENT_SHUNT_RES 0.0002
|
||||
#endif
|
||||
|
||||
|
||||
// Input voltage
|
||||
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
||||
|
||||
// NTC Termistors
|
||||
#define NTC_RES(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Mos temp sensor on low side
|
||||
|
||||
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
|
||||
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
|
||||
|
||||
#define NTC_TEMP(adc_ind) NTC_TEMP_MOS1()
|
||||
#define NTC_TEMP_MOS1() (1.0 / ((logf(NTC_RES(ADC_Value[ADC_IND_TEMP_MOS]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||
#define NTC_TEMP_MOS2() (1.0 / ((logf(NTC_RES(ADC_Value[ADC_IND_TEMP_MOS]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||
#define NTC_TEMP_MOS3() (1.0 / ((logf(NTC_RES(ADC_Value[ADC_IND_TEMP_MOS]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||
|
||||
// Voltage on ADC channel
|
||||
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
||||
|
||||
|
||||
#define LED_GREEN_GPIO GPIOB
|
||||
#define LED_GREEN_PIN 5
|
||||
#define LED_RED_GPIO GPIOB
|
||||
#define LED_RED_PIN 7
|
||||
|
||||
#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||
#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||
#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN)
|
||||
#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN)
|
||||
|
||||
#define AUX_GPIO GPIOC
|
||||
#define AUX_PIN 15
|
||||
#define AUX_ON() palSetPad(AUX_GPIO, AUX_PIN)
|
||||
#define AUX_OFF() palClearPad(AUX_GPIO, AUX_PIN)
|
||||
|
||||
// Phase filter
|
||||
#define PHASE_FILTER_OFF() palSetPad(GPIOC, 9); palSetPad(GPIOC, 13); palSetPad(GPIOC, 14)
|
||||
#define PHASE_FILTER_ON() palClearPad(GPIOC, 9); palClearPad(GPIOC, 13); palClearPad(GPIOC, 14)
|
||||
|
||||
// Current filter
|
||||
#define CURRENT_FILTER_OFF() palSetPad(GPIOB, 2); palSetPad(GPIOB, 3); palSetPad(GPIOB, 4)
|
||||
#define CURRENT_FILTER_ON() palSetPad(GPIOB, 2); palSetPad(GPIOB, 3); palSetPad(GPIOB, 4)
|
||||
|
||||
// COMM-port ADC GPIOs
|
||||
#define HW_ADC_EXT_GPIO GPIOA
|
||||
#define HW_ADC_EXT_PIN 5
|
||||
#define HW_ADC_EXT2_GPIO GPIOA
|
||||
#define HW_ADC_EXT2_PIN 6
|
||||
|
||||
// UART Peripheral - Comm port
|
||||
#define HW_UART_DEV SD3
|
||||
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
||||
#define HW_UART_TX_PORT GPIOB
|
||||
#define HW_UART_TX_PIN 10
|
||||
#define HW_UART_RX_PORT GPIOB
|
||||
#define HW_UART_RX_PIN 11
|
||||
|
||||
// SPI pins
|
||||
#define HW_SPI_DEV SPID1
|
||||
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
||||
#define HW_SPI_PORT_NSS GPIOB
|
||||
#define HW_SPI_PIN_NSS 11
|
||||
#define HW_SPI_PORT_SCK GPIOA
|
||||
#define HW_SPI_PIN_SCK 5
|
||||
#define HW_SPI_PORT_MOSI GPIOA
|
||||
#define HW_SPI_PIN_MOSI 7
|
||||
#define HW_SPI_PORT_MISO GPIOA
|
||||
#define HW_SPI_PIN_MISO 6
|
||||
|
||||
// I2C Peripheral
|
||||
#define HW_I2C_DEV I2CD2
|
||||
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||
#define HW_I2C_SCL_PORT GPIOB
|
||||
#define HW_I2C_SCL_PIN 10
|
||||
#define HW_I2C_SDA_PORT GPIOB
|
||||
#define HW_I2C_SDA_PIN 11
|
||||
|
||||
// Hall/encoder pins
|
||||
#define HW_HALL_ENC_GPIO1 GPIOC
|
||||
#define HW_HALL_ENC_PIN1 6
|
||||
#define HW_HALL_ENC_GPIO2 GPIOC
|
||||
#define HW_HALL_ENC_PIN2 7
|
||||
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||
#define HW_HALL_ENC_PIN3 8
|
||||
#define HW_ENC_TIM TIM3
|
||||
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
||||
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
||||
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
||||
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
||||
#define HW_ENC_EXTI_LINE EXTI_Line8
|
||||
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
||||
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
||||
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
||||
|
||||
// ICU Peripheral for servo decoding
|
||||
#define HW_USE_SERVO_TIM4
|
||||
#define HW_ICU_TIMER TIM4
|
||||
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||
#define HW_ICU_DEV ICUD4
|
||||
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
||||
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
||||
#define HW_ICU_GPIO GPIOB
|
||||
#define HW_ICU_PIN 6
|
||||
|
||||
// Measurement macros
|
||||
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||
|
||||
// Macros
|
||||
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||
|
||||
// Default setting overrides
|
||||
#define MCCONF_L_MIN_VOLTAGE 14.0 // Minimum input voltage
|
||||
|
||||
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
||||
|
||||
#define MCCONF_FOC_F_ZV 30000.0
|
||||
|
||||
#define HW_LIM_FOC_CTRL_LOOP_FREQ 5000.0, 25000.0 //Limit to 50kHz max
|
||||
|
||||
#define MCCONF_L_MAX_ABS_CURRENT 200.0 // The maximum absolute current above which a fault is generated
|
||||
|
||||
#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts)
|
||||
|
||||
#define MCCONF_L_CURRENT_MAX 100.0 // Current limit in Amperes (Upper)
|
||||
|
||||
#define MCCONF_L_CURRENT_MIN -100.0 // Current limit in Amperes (Lower)
|
||||
|
||||
#define MCCONF_L_SLOW_ABS_OVERCURRENT false // Use the raw current for the overcurrent fault detection
|
||||
|
||||
#define MCCONF_L_IN_CURRENT_MAX 20.0 // Input current limit in Amperes (Upper)
|
||||
|
||||
#define MCCONF_L_IN_CURRENT_MIN -5.0 // Input current limit in Amperes (Lower)
|
||||
|
||||
#define MCCONF_M_MOTOR_TEMP_SENS_TYPE TEMP_SENSOR_DISABLED // Motor Temperature Sensor Type
|
||||
|
||||
//#define MCCONF_FOC_OFFSETS_CAL_ON_BOOT false // Don't Measure offsets every boot, it is done once at motor setup
|
||||
|
||||
// Setting limits
|
||||
#define HW_LIM_CURRENT -200.0, 200.0
|
||||
#define HW_LIM_CURRENT_IN -120.0, 120.0
|
||||
#define HW_LIM_CURRENT_ABS 0.0, 400.0
|
||||
#define HW_LIM_VIN -1.0, 90.0
|
||||
#define HW_LIM_ERPM -200e3, 200e3
|
||||
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
||||
#define HW_LIM_DUTY_MAX 0.0, 0.95
|
||||
#define HW_LIM_TEMP_FET -40.0, 110.0
|
||||
#ifndef MCCONF_L_MAX_VOLTAGE
|
||||
#define MCCONF_L_MAX_VOLTAGE 20.0 * 4.2 + 5.0 // Maximum input voltage
|
||||
#endif
|
||||
#ifndef MCCONF_FOC_DT_US
|
||||
#define MCCONF_FOC_DT_US 0.1 // Microseconds for dead time compensation
|
||||
#endif
|
||||
|
||||
#define HW_DEAD_TIME_NSEC 500.0 // FD6288q adds 200ns
|
||||
#define HW_NAME "A100S_V4"
|
||||
|
||||
|
||||
#endif /* HW_A100S_V4_CORE_H_ */
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
#ifndef HW_A50S_V23C_8S_H_
|
||||
#define HW_A50S_V23C_8S_H_
|
||||
|
||||
#define HW_A50S_8S
|
||||
|
||||
#define HW_NAME "a50s_v23c_8s"
|
||||
#define CURRENT_AMP_GAIN 50.0
|
||||
|
||||
|
||||
#include "hw_a50s_v23c_core.h"
|
||||
|
||||
#endif /* HW_A50S_V23C_8S_H_ */
|
||||
|
|
@ -70,7 +70,7 @@
|
|||
|
||||
|
||||
#ifndef V_REG
|
||||
#define V_REG 3.33
|
||||
#define V_REG 3.30
|
||||
#endif
|
||||
#ifndef VIN_R1
|
||||
#define VIN_R1 47000.0
|
||||
|
|
|
|||
|
|
@ -59,8 +59,10 @@ package_dict["A50S_12S_HG"] = [['a50s_v22_12s_hg', default_name]]
|
|||
package_dict["A50S_V23_6S"] = [['a50s_v23_6s', default_name]]
|
||||
package_dict["A50S_V23_8S"] = [['a50s_v23_8s', default_name]]
|
||||
package_dict["A50S_V23_12S"] = [['a50s_v23_12s', default_name]]
|
||||
package_dict["A50S_V23c_8S"] = [['a50s_v23c_8s', default_name]]
|
||||
package_dict["A50S_V23c_12S"] = [['a50s_v23c_12s', default_name]]
|
||||
package_dict["A50S_V23_20S"] = [['a50s_v23_20s', default_name]]
|
||||
package_dict["A100S_V4"] = [['a100s_v4', default_name]]
|
||||
package_dict["A200S_V2.1"] = [['a200s_v2.1', default_name]]
|
||||
package_dict["A200S_V2.2"] = [['a200s_v2.2', default_name]]
|
||||
package_dict["A200S_V3"] = [['a200s_v3', default_name]]
|
||||
|
|
|
|||
Loading…
Reference in New Issue