mirror of https://github.com/rusefi/bldc.git
Adding Flipsky 75100 Hardware
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parent
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554c8080f1
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/*
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Copyright 2018 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "utils.h"
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#include <math.h>
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#include "mc_interface.h"
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// Variables
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static volatile bool i2c_running = false;
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// I2C configuration
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static const I2CConfig i2cfg = {
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OPMODE_I2C,
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100000,
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STD_DUTY_CYCLE
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};
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void hw_init_gpio(void) {
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// GPIO clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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// LEDs
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palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(LED_RED_GPIO, LED_RED_PIN,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
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palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Hall sensors
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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// Phase filters (jaykup - disabled)
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//palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN,
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// PAL_MODE_OUTPUT_PUSHPULL |
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// PAL_STM32_OSPEED_HIGHEST);
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//PHASE_FILTER_OFF();
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// Current filter (jaykup - disabled)
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//palSetPadMode(GPIOD, 2,
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// PAL_MODE_OUTPUT_PUSHPULL |
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// PAL_STM32_OSPEED_HIGHEST);
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//
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//CURRENT_FILTER_OFF();
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// AUX pin (jaykup - disabled)
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//AUX_OFF();
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//palSetPadMode(AUX_GPIO, AUX_PIN,
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// PAL_MODE_OUTPUT_PUSHPULL |
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// PAL_STM32_OSPEED_HIGHEST);
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// ADC Pins
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
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}
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void hw_setup_adc_channels(void) {
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// ADC1 regular channels
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles);
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// ADC2 regular channels
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles);
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// ADC3 regular channels
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles);
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// Injected channels
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
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}
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void hw_start_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (!i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2c_running = true;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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void hw_stop_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
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i2cStop(&HW_I2C_DEV);
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i2c_running = false;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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/**
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* Try to restore the i2c bus
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*/
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void hw_try_restore_i2c(void) {
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if (i2c_running) {
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i2cAcquireBus(&HW_I2C_DEV);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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for(int i = 0;i < 16;i++) {
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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}
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// Generate start then stop condition
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palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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HW_I2C_DEV.state = I2C_STOP;
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2cReleaseBus(&HW_I2C_DEV);
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}
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}
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@ -0,0 +1,296 @@
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/*
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Copyright 2018 Benjamin Vedder benjamin@vedder.se
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This file is part of the VESC firmware.
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The VESC firmware is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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The VESC firmware is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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// (jaykup) Config for Flipsky FOC 75100 (75100V201 circuit board)
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// MDP10N027 100v MOSFETS (6 total)
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// RICHCAP 740uF 100v Caps (3 total)
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// EG3112 Gate Driver (3 total)
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// STM32F405 RGT6 78628 9R PHL 7B 12(standard)
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// LM5161 100v Buck Converter
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// m50 resistors for battery side current measuring, one per phase. 0.50mOhms (3 total)
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#ifndef HW_75_100_H_
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#define HW_75_100_H_
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#define HW_NAME "75_100"
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// (jaykup) HW properties
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#define HW_HAS_3_SHUNTS
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// Macros
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#define LED_GREEN_GPIO GPIOB
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#define LED_GREEN_PIN 5
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#define LED_RED_GPIO GPIOB
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#define LED_RED_PIN 7
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#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN)
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#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN)
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#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN)
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#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN)
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//#define PHASE_FILTER_GPIO GPIOC
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//#define PHASE_FILTER_PIN 9
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//#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
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//#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
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//#define AUX_GPIO GPIOC
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//#define AUX_PIN 12
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//#define AUX_ON() palSetPad(AUX_GPIO, AUX_PIN)
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//#define AUX_OFF() palClearPad(AUX_GPIO, AUX_PIN)
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//(jaykup) disabled as this is not on the 100_250
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//#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2)
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//#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2)
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/*
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* ADC Vector
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*
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* 0 (1): IN0 SENS1
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* 1 (2): IN1 SENS2
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* 2 (3): IN2 SENS3
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* 3 (1): IN10 CURR1
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* 4 (2): IN11 CURR2
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* 5 (3): IN12 CURR3
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* 6 (1): IN5 ADC_EXT1
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* 7 (2): IN6 ADC_EXT2
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* 8 (3): IN3 TEMP_MOS
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* 9 (1): IN14 TEMP_MOTOR
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* 10 (2): IN15 ADC_EXT3
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* 11 (3): IN13 AN_IN
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* 12 (1): Vrefint
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* 13 (2): IN0 SENS1
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* 14 (3): IN1 SENS2
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* 15 (1): IN8 TEMP_MOS_2
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* 16 (2): IN9 TEMP_MOS_3
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* 17 (3): IN3 SENS3
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*/
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#define HW_ADC_CHANNELS 18
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#define HW_ADC_INJ_CHANNELS 3
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#define HW_ADC_NBR_CONV 6
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// ADC Indexes
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#define ADC_IND_SENS1 0
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#define ADC_IND_SENS2 1
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#define ADC_IND_SENS3 2
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#define ADC_IND_CURR1 3
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#define ADC_IND_CURR2 4
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#define ADC_IND_CURR3 5
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#define ADC_IND_VIN_SENS 11
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#define ADC_IND_EXT 6
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#define ADC_IND_EXT2 7
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#define ADC_IND_EXT3 10
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#define ADC_IND_TEMP_MOS 8
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//#define ADC_IND_TEMP_MOS_2 15
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//#define ADC_IND_TEMP_MOS_3 16
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#define ADC_IND_TEMP_MOTOR 9
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#define ADC_IND_VREFINT 12
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// ADC macros and settings
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// Component parameters (can be overridden)
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#ifndef V_REG
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#define V_REG 3.3 // (jaykup) updated from measurement
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#endif
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#ifndef VIN_R1
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#define VIN_R1 39000.0 // (jaykup) updated 393 SMD code, 38,800 measured
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#endif
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#ifndef VIN_R2
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#define VIN_R2 1000.0 // (jaykup) updated 01B code, 1k measured
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#endif
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#ifndef CURRENT_AMP_GAIN
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#define CURRENT_AMP_GAIN 20.0 // (jaykup) from current sense amp datasheet
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#endif
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#ifndef CURRENT_SHUNT_RES
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#define CURRENT_SHUNT_RES 0.0005 // (jaykup) updated
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#endif
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// Input voltage
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#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
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// NTC Termistors
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#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
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// (jaykup) Measured 10k NTC at 3307 beta (11.7kOhm @ 70F, 21.4kOhm @ 43F)
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// (jaykup) Updated to 3380 based on @ypl's firmware https://github.com/1611048264/vesc/blob/main/hw_75_100.h
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// (jaykup) 273 is C to K conversion
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#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
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#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
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#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
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// Voltage on ADC channel
|
||||
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
||||
|
||||
// Double samples in beginning and end for positive current measurement.
|
||||
// Useful when the shunt sense traces have noise that causes offset.
|
||||
#ifndef CURR1_DOUBLE_SAMPLE
|
||||
#define CURR1_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
#ifndef CURR2_DOUBLE_SAMPLE
|
||||
#define CURR2_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
#ifndef CURR3_DOUBLE_SAMPLE
|
||||
#define CURR3_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
|
||||
// COMM-port ADC GPIOs
|
||||
#define HW_ADC_EXT_GPIO GPIOA
|
||||
#define HW_ADC_EXT_PIN 5
|
||||
#define HW_ADC_EXT2_GPIO GPIOA
|
||||
#define HW_ADC_EXT2_PIN 6
|
||||
|
||||
// UART Peripheral
|
||||
#define HW_UART_DEV SD3
|
||||
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
||||
#define HW_UART_TX_PORT GPIOB
|
||||
#define HW_UART_TX_PIN 10
|
||||
#define HW_UART_RX_PORT GPIOB
|
||||
#define HW_UART_RX_PIN 11
|
||||
|
||||
// Permanent UART Peripheral - (jaykup) for UART2 port
|
||||
#define HW_UART_P_BAUD 115200
|
||||
#define HW_UART_P_DEV SD4
|
||||
#define HW_UART_P_GPIO_AF GPIO_AF_UART4
|
||||
#define HW_UART_P_TX_PORT GPIOC
|
||||
#define HW_UART_P_TX_PIN 10
|
||||
#define HW_UART_P_RX_PORT GPIOC
|
||||
#define HW_UART_P_RX_PIN 11
|
||||
|
||||
// (jaykup) should be disabled as this unit has no bluetooth module to program
|
||||
// NRF SWD
|
||||
//#define NRF5x_SWDIO_GPIO GPIOA
|
||||
//#define NRF5x_SWDIO_PIN 15
|
||||
//#define NRF5x_SWCLK_GPIO GPIOB
|
||||
//#define NRF5x_SWCLK_PIN 3
|
||||
|
||||
// ICU Peripheral for servo decoding
|
||||
#define HW_USE_SERVO_TIM4
|
||||
#define HW_ICU_TIMER TIM4
|
||||
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||
#define HW_ICU_DEV ICUD4
|
||||
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
||||
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
||||
#define HW_ICU_GPIO GPIOB
|
||||
#define HW_ICU_PIN 6
|
||||
|
||||
// I2C Peripheral
|
||||
#define HW_I2C_DEV I2CD2
|
||||
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||
#define HW_I2C_SCL_PORT GPIOB
|
||||
#define HW_I2C_SCL_PIN 10
|
||||
#define HW_I2C_SDA_PORT GPIOB
|
||||
#define HW_I2C_SDA_PIN 11
|
||||
|
||||
// Hall/encoder pins
|
||||
#define HW_HALL_ENC_GPIO1 GPIOC
|
||||
#define HW_HALL_ENC_PIN1 6
|
||||
#define HW_HALL_ENC_GPIO2 GPIOC
|
||||
#define HW_HALL_ENC_PIN2 7
|
||||
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||
#define HW_HALL_ENC_PIN3 8
|
||||
#define HW_ENC_TIM TIM3
|
||||
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
||||
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
||||
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
||||
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
||||
#define HW_ENC_EXTI_LINE EXTI_Line8
|
||||
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
||||
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
||||
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
||||
|
||||
// SPI pins
|
||||
#define HW_SPI_DEV SPID1
|
||||
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
||||
#define HW_SPI_PORT_NSS GPIOA
|
||||
#define HW_SPI_PIN_NSS 4
|
||||
#define HW_SPI_PORT_SCK GPIOA
|
||||
#define HW_SPI_PIN_SCK 5
|
||||
#define HW_SPI_PORT_MOSI GPIOA
|
||||
#define HW_SPI_PIN_MOSI 7
|
||||
#define HW_SPI_PORT_MISO GPIOA
|
||||
#define HW_SPI_PIN_MISO 6
|
||||
|
||||
// Measurement macros
|
||||
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||
|
||||
// Macros
|
||||
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||
|
||||
// Override dead time. See the stm32f4 reference manual for calculating this value.
|
||||
#define HW_DEAD_TIME_NSEC 660.0
|
||||
|
||||
// Default setting overrides
|
||||
#ifndef MCCONF_L_MIN_VOLTAGE
|
||||
#define MCCONF_L_MIN_VOLTAGE 8.0 // (jaykup) (ypl firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_L_MAX_VOLTAGE
|
||||
#define MCCONF_L_MAX_VOLTAGE 90.0 // (jaykup) (ypl firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_DEFAULT_MOTOR_TYPE
|
||||
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
||||
#endif
|
||||
#ifndef MCCONF_FOC_F_ZV
|
||||
#define MCCONF_FOC_F_ZV 30000.0 // (jaykup) (flipsky firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_L_MAX_ABS_CURRENT
|
||||
#define MCCONF_L_MAX_ABS_CURRENT 150.0 // (jaykup) (flipsky firmware) The maximum absolute current above which a fault is generated
|
||||
#endif
|
||||
#ifndef MCCONF_FOC_SAMPLE_V0_V7
|
||||
#define MCCONF_FOC_SAMPLE_V0_V7 false // (jaykup) unit has 3 battery shunts so this needs to be off - Run control loop in both v0 and v7 (requires phase shunts)
|
||||
#endif
|
||||
#ifndef MCCONF_L_IN_CURRENT_MAX
|
||||
#define MCCONF_L_IN_CURRENT_MAX 100.0 // (jaykup) (flipsky firmware) Input current limit in Amperes (Upper)
|
||||
#endif
|
||||
#ifndef MCCONF_L_IN_CURRENT_MIN
|
||||
#define MCCONF_L_IN_CURRENT_MIN -100.0 // (jaykup) (flipsky firmware) Input current limit in Amperes (Lower)
|
||||
#endif
|
||||
#ifndef MCCONF_L_RPM_MAX
|
||||
#define MCCONF_L_RPM_MAX 150000.0 // (jaykup) (flipsky firmware) The motor speed limit (Upper)
|
||||
#endif
|
||||
#ifndef MCCONF_L_RPM_MIN
|
||||
#define MCCONF_L_RPM_MIN -150000.0 // (jaykup) (flipsky firmware) The motor speed limit (Lower)
|
||||
#endif
|
||||
#ifndef MCCONF_SI_BATTERY_CELLS
|
||||
#define MCCONF_SI_BATTERY_CELLS 12 // (jaykup) Battery Cells
|
||||
#endif
|
||||
#ifndef MCCONF_SI_BATTERY_AH
|
||||
#define MCCONF_SI_BATTERY_AH 10.0 // (jaykup) Battery amp hours
|
||||
#endif
|
||||
|
||||
// (jaykup) Suggested defaults
|
||||
#ifndef MCCONF_FOC_PHASE_FILTER_ENABLE
|
||||
#define MCCONF_FOC_PHASE_FILTER_ENABLE false // Use phase voltage filters when available
|
||||
#endif
|
||||
|
||||
// Setting limits
|
||||
#define HW_LIM_CURRENT -120.0, 120.0 // (jaykup) phase amps (Flipsky states 120 max phase amps.)
|
||||
#define HW_LIM_CURRENT_IN -120.0, 120.0 // (jaykup) battery amps (Flipsky states 100 max battery amps, but their firmware is at 120A)
|
||||
#define HW_LIM_CURRENT_ABS 0.0, 160.0 // (jaykup) abs phase amps (Flipsky firmware max is 160A)
|
||||
#define HW_LIM_VIN 6.0, 120.0 // (jaykup) (ypl firmware)
|
||||
#define HW_LIM_ERPM -200e3, 200e3 // (jaykup) (flipsky firmware)
|
||||
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
||||
#define HW_LIM_DUTY_MAX 0.0, 0.99
|
||||
#define HW_LIM_TEMP_FET -40.0, 110.0
|
||||
|
||||
#endif /* HW_75_100_H_ */
|
||||
|
|
@ -0,0 +1,244 @@
|
|||
/*
|
||||
Copyright 2018 Benjamin Vedder benjamin@vedder.se
|
||||
This program is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
// V2
|
||||
|
||||
#include "hw.h"
|
||||
|
||||
#include "ch.h"
|
||||
#include "hal.h"
|
||||
#include "stm32f4xx_conf.h"
|
||||
#include "utils.h"
|
||||
#include <math.h>
|
||||
#include "mc_interface.h"
|
||||
|
||||
// Variables
|
||||
static volatile bool i2c_running = false;
|
||||
|
||||
// I2C configuration
|
||||
static const I2CConfig i2cfg = {
|
||||
OPMODE_I2C,
|
||||
100000,
|
||||
STD_DUTY_CYCLE
|
||||
};
|
||||
|
||||
void hw_init_gpio(void) {
|
||||
// GPIO clock enable
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
|
||||
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
|
||||
|
||||
// LEDs
|
||||
palSetPadMode(LED_GREEN_GPIO, LED_GREEN_PIN,
|
||||
PAL_MODE_OUTPUT_PUSHPULL |
|
||||
PAL_STM32_OSPEED_HIGHEST);
|
||||
palSetPadMode(LED_RED_GPIO, LED_RED_PIN,
|
||||
PAL_MODE_OUTPUT_PUSHPULL |
|
||||
PAL_STM32_OSPEED_HIGHEST);
|
||||
|
||||
// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
|
||||
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
|
||||
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||
PAL_STM32_OSPEED_HIGHEST |
|
||||
PAL_STM32_PUDR_FLOATING);
|
||||
|
||||
// Hall sensors
|
||||
palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
|
||||
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
|
||||
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
|
||||
|
||||
// Phase filters (jaykup - disabled)
|
||||
//palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN,
|
||||
// PAL_MODE_OUTPUT_PUSHPULL |
|
||||
// PAL_STM32_OSPEED_HIGHEST);
|
||||
//PHASE_FILTER_OFF();
|
||||
|
||||
// Current filter (jaykup - disabled)
|
||||
//palSetPadMode(GPIOD, 2,
|
||||
// PAL_MODE_OUTPUT_PUSHPULL |
|
||||
// PAL_STM32_OSPEED_HIGHEST);
|
||||
//
|
||||
//CURRENT_FILTER_OFF(); (jaykup - disabled)
|
||||
|
||||
// AUX pin
|
||||
//AUX_OFF();
|
||||
//palSetPadMode(AUX_GPIO, AUX_PIN,
|
||||
// PAL_MODE_OUTPUT_PUSHPULL |
|
||||
// PAL_STM32_OSPEED_HIGHEST);
|
||||
|
||||
// ADC Pins
|
||||
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
|
||||
|
||||
palSetPadMode(GPIOB, 0, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOB, 1, PAL_MODE_INPUT_ANALOG);
|
||||
|
||||
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
|
||||
palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
|
||||
}
|
||||
|
||||
void hw_setup_adc_channels(void) {
|
||||
// ADC1 regular channels
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC1, ADC_Channel_8, 6, ADC_SampleTime_15Cycles);
|
||||
|
||||
// ADC2 regular channels
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC2, ADC_Channel_9, 6, ADC_SampleTime_15Cycles);
|
||||
|
||||
// ADC3 regular channels
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles);
|
||||
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 6, ADC_SampleTime_15Cycles);
|
||||
|
||||
// Injected channels
|
||||
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles);
|
||||
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
|
||||
}
|
||||
|
||||
void hw_start_i2c(void) {
|
||||
i2cAcquireBus(&HW_I2C_DEV);
|
||||
|
||||
if (!i2c_running) {
|
||||
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
|
||||
i2cStart(&HW_I2C_DEV, &i2cfg);
|
||||
i2c_running = true;
|
||||
}
|
||||
|
||||
i2cReleaseBus(&HW_I2C_DEV);
|
||||
}
|
||||
|
||||
void hw_stop_i2c(void) {
|
||||
i2cAcquireBus(&HW_I2C_DEV);
|
||||
|
||||
if (i2c_running) {
|
||||
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
|
||||
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
|
||||
|
||||
i2cStop(&HW_I2C_DEV);
|
||||
i2c_running = false;
|
||||
|
||||
}
|
||||
|
||||
i2cReleaseBus(&HW_I2C_DEV);
|
||||
}
|
||||
|
||||
/**
|
||||
* Try to restore the i2c bus
|
||||
*/
|
||||
void hw_try_restore_i2c(void) {
|
||||
if (i2c_running) {
|
||||
i2cAcquireBus(&HW_I2C_DEV);
|
||||
|
||||
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
|
||||
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
|
||||
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||
|
||||
chThdSleep(1);
|
||||
|
||||
for(int i = 0;i < 16;i++) {
|
||||
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||
chThdSleep(1);
|
||||
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||
chThdSleep(1);
|
||||
}
|
||||
|
||||
// Generate start then stop condition
|
||||
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||
chThdSleep(1);
|
||||
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||
chThdSleep(1);
|
||||
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||
chThdSleep(1);
|
||||
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||
|
||||
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
|
||||
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||
PAL_STM32_OTYPE_OPENDRAIN |
|
||||
PAL_STM32_OSPEED_MID1 |
|
||||
PAL_STM32_PUDR_PULLUP);
|
||||
|
||||
HW_I2C_DEV.state = I2C_STOP;
|
||||
i2cStart(&HW_I2C_DEV, &i2cfg);
|
||||
|
||||
i2cReleaseBus(&HW_I2C_DEV);
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,285 @@
|
|||
/*
|
||||
Copyright 2018 Benjamin Vedder benjamin@vedder.se
|
||||
This file is part of the VESC firmware.
|
||||
The VESC firmware is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
The VESC firmware is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef HW_75_100_H_
|
||||
#define HW_75_100_H_
|
||||
|
||||
#define HW_NAME "75_100_V2"
|
||||
|
||||
// (jaykup) HW properties
|
||||
#define HW_HAS_3_SHUNTS
|
||||
|
||||
|
||||
// Macros
|
||||
#define LED_GREEN_GPIO GPIOB
|
||||
#define LED_GREEN_PIN 5
|
||||
#define LED_RED_GPIO GPIOB
|
||||
#define LED_RED_PIN 7
|
||||
|
||||
#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||
#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||
#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN)
|
||||
#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN)
|
||||
|
||||
//#define PHASE_FILTER_GPIO GPIOC
|
||||
//#define PHASE_FILTER_PIN 9
|
||||
//#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
|
||||
//#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
|
||||
|
||||
//#define AUX_GPIO GPIOC
|
||||
//#define AUX_PIN 12
|
||||
//#define AUX_ON() palSetPad(AUX_GPIO, AUX_PIN)
|
||||
//#define AUX_OFF() palClearPad(AUX_GPIO, AUX_PIN)
|
||||
|
||||
//(jaykup) disabled as this is not on the 100_250
|
||||
//#define CURRENT_FILTER_ON() palSetPad(GPIOD, 2)
|
||||
//#define CURRENT_FILTER_OFF() palClearPad(GPIOD, 2)
|
||||
|
||||
/*
|
||||
* ADC Vector
|
||||
*
|
||||
* 0 (1): IN0 SENS1
|
||||
* 1 (2): IN1 SENS2
|
||||
* 2 (3): IN2 SENS3
|
||||
* 3 (1): IN10 CURR1
|
||||
* 4 (2): IN11 CURR2
|
||||
* 5 (3): IN12 CURR3
|
||||
* 6 (1): IN5 ADC_EXT1
|
||||
* 7 (2): IN6 ADC_EXT2
|
||||
* 8 (3): IN3 TEMP_MOS
|
||||
* 9 (1): IN14 TEMP_MOTOR
|
||||
* 10 (2): IN15 ADC_EXT3
|
||||
* 11 (3): IN13 AN_IN
|
||||
* 12 (1): Vrefint
|
||||
* 13 (2): IN0 SENS1
|
||||
* 14 (3): IN1 SENS2
|
||||
* 15 (1): IN8 TEMP_MOS_2
|
||||
* 16 (2): IN9 TEMP_MOS_3
|
||||
* 17 (3): IN3 SENS3
|
||||
*/
|
||||
|
||||
#define HW_ADC_CHANNELS 18
|
||||
#define HW_ADC_INJ_CHANNELS 3
|
||||
#define HW_ADC_NBR_CONV 6
|
||||
|
||||
// ADC Indexes
|
||||
#define ADC_IND_SENS1 0
|
||||
#define ADC_IND_SENS2 1
|
||||
#define ADC_IND_SENS3 2
|
||||
#define ADC_IND_CURR1 3
|
||||
#define ADC_IND_CURR2 4
|
||||
#define ADC_IND_CURR3 5
|
||||
#define ADC_IND_VIN_SENS 11
|
||||
#define ADC_IND_EXT 6
|
||||
#define ADC_IND_EXT2 7
|
||||
#define ADC_IND_EXT3 10
|
||||
#define ADC_IND_TEMP_MOS 8
|
||||
//#define ADC_IND_TEMP_MOS_2 15
|
||||
//#define ADC_IND_TEMP_MOS_3 16
|
||||
#define ADC_IND_TEMP_MOTOR 9
|
||||
#define ADC_IND_VREFINT 12
|
||||
|
||||
// ADC macros and settings
|
||||
|
||||
// Component parameters (can be overridden)
|
||||
#ifndef V_REG
|
||||
#define V_REG 3.413 // (jaykup) Updated from @1zuna's calculations. 75_300 was 3.44
|
||||
#endif
|
||||
#ifndef VIN_R1
|
||||
#define VIN_R1 56000.0 //
|
||||
#endif
|
||||
#ifndef VIN_R2
|
||||
#define VIN_R2 2200.0 //
|
||||
#endif
|
||||
#ifndef CURRENT_AMP_GAIN
|
||||
#define CURRENT_AMP_GAIN 20.0 //
|
||||
#endif
|
||||
#ifndef CURRENT_SHUNT_RES
|
||||
#define CURRENT_SHUNT_RES (0.0005 / 3.0) // (jaykup) updated
|
||||
#endif
|
||||
|
||||
// Input voltage
|
||||
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
||||
|
||||
// NTC Termistors
|
||||
#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
|
||||
|
||||
// (jaykup) 273 is C to K conversion
|
||||
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||
|
||||
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
|
||||
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
|
||||
|
||||
// Voltage on ADC channel
|
||||
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
||||
|
||||
// Double samples in beginning and end for positive current measurement.
|
||||
// Useful when the shunt sense traces have noise that causes offset.
|
||||
#ifndef CURR1_DOUBLE_SAMPLE
|
||||
#define CURR1_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
#ifndef CURR2_DOUBLE_SAMPLE
|
||||
#define CURR2_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
#ifndef CURR3_DOUBLE_SAMPLE
|
||||
#define CURR3_DOUBLE_SAMPLE 0
|
||||
#endif
|
||||
|
||||
// COMM-port ADC GPIOs
|
||||
#define HW_ADC_EXT_GPIO GPIOA
|
||||
#define HW_ADC_EXT_PIN 5
|
||||
#define HW_ADC_EXT2_GPIO GPIOA
|
||||
#define HW_ADC_EXT2_PIN 6
|
||||
|
||||
// UART Peripheral
|
||||
#define HW_UART_DEV SD3
|
||||
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
||||
#define HW_UART_TX_PORT GPIOB
|
||||
#define HW_UART_TX_PIN 10
|
||||
#define HW_UART_RX_PORT GPIOB
|
||||
#define HW_UART_RX_PIN 11
|
||||
|
||||
// Permanent UART Peripheral - (jaykup) for UART2 port
|
||||
#define HW_UART_P_BAUD 115200
|
||||
#define HW_UART_P_DEV SD4
|
||||
#define HW_UART_P_GPIO_AF GPIO_AF_UART4
|
||||
#define HW_UART_P_TX_PORT GPIOC
|
||||
#define HW_UART_P_TX_PIN 10
|
||||
#define HW_UART_P_RX_PORT GPIOC
|
||||
#define HW_UART_P_RX_PIN 11
|
||||
|
||||
// (jaykup) should be disabled as this unit has no bluetooth module to program
|
||||
// NRF SWD
|
||||
//#define NRF5x_SWDIO_GPIO GPIOA
|
||||
//#define NRF5x_SWDIO_PIN 15
|
||||
//#define NRF5x_SWCLK_GPIO GPIOB
|
||||
//#define NRF5x_SWCLK_PIN 3
|
||||
|
||||
// ICU Peripheral for servo decoding
|
||||
#define HW_USE_SERVO_TIM4
|
||||
#define HW_ICU_TIMER TIM4
|
||||
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||
#define HW_ICU_DEV ICUD4
|
||||
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
||||
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
||||
#define HW_ICU_GPIO GPIOB
|
||||
#define HW_ICU_PIN 6
|
||||
|
||||
// I2C Peripheral
|
||||
#define HW_I2C_DEV I2CD2
|
||||
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||
#define HW_I2C_SCL_PORT GPIOB
|
||||
#define HW_I2C_SCL_PIN 10
|
||||
#define HW_I2C_SDA_PORT GPIOB
|
||||
#define HW_I2C_SDA_PIN 11
|
||||
|
||||
// Hall/encoder pins
|
||||
#define HW_HALL_ENC_GPIO1 GPIOC
|
||||
#define HW_HALL_ENC_PIN1 6
|
||||
#define HW_HALL_ENC_GPIO2 GPIOC
|
||||
#define HW_HALL_ENC_PIN2 7
|
||||
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||
#define HW_HALL_ENC_PIN3 8
|
||||
#define HW_ENC_TIM TIM3
|
||||
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
||||
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
||||
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
||||
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
||||
#define HW_ENC_EXTI_LINE EXTI_Line8
|
||||
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
||||
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
||||
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
||||
|
||||
// SPI pins
|
||||
#define HW_SPI_DEV SPID1
|
||||
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
||||
#define HW_SPI_PORT_NSS GPIOA
|
||||
#define HW_SPI_PIN_NSS 4
|
||||
#define HW_SPI_PORT_SCK GPIOA
|
||||
#define HW_SPI_PIN_SCK 5
|
||||
#define HW_SPI_PORT_MOSI GPIOA
|
||||
#define HW_SPI_PIN_MOSI 7
|
||||
#define HW_SPI_PORT_MISO GPIOA
|
||||
#define HW_SPI_PIN_MISO 6
|
||||
|
||||
// Measurement macros
|
||||
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||
|
||||
// Macros
|
||||
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||
|
||||
// Override dead time. See the stm32f4 reference manual for calculating this value.
|
||||
#define HW_DEAD_TIME_NSEC 660.0
|
||||
|
||||
// Default setting overrides
|
||||
#ifndef MCCONF_L_MIN_VOLTAGE
|
||||
#define MCCONF_L_MIN_VOLTAGE 12.0 // (jaykup) (flipsky firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_L_MAX_VOLTAGE
|
||||
#define MCCONF_L_MAX_VOLTAGE 90.0 // (jaykup) (flipsky firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_DEFAULT_MOTOR_TYPE
|
||||
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
||||
#endif
|
||||
#ifndef MCCONF_FOC_F_ZV
|
||||
#define MCCONF_FOC_F_ZV 30000.0 // (jaykup) (flipsky firmware)
|
||||
#endif
|
||||
#ifndef MCCONF_L_MAX_ABS_CURRENT
|
||||
#define MCCONF_L_MAX_ABS_CURRENT 150.0 // (jaykup) (flipsky firmware) The maximum absolute current above which a fault is generated
|
||||
#endif
|
||||
#ifndef MCCONF_FOC_SAMPLE_V0_V7
|
||||
#define MCCONF_FOC_SAMPLE_V0_V7 false // (jaykup) unit has 3 battery shunts so this needs to be off - Run control loop in both v0 and v7 (requires phase shunts)
|
||||
#endif
|
||||
#ifndef MCCONF_L_IN_CURRENT_MAX
|
||||
#define MCCONF_L_IN_CURRENT_MAX 100.0 // (jaykup) (flipsky firmware) Input current limit in Amperes (Upper)
|
||||
#endif
|
||||
#ifndef MCCONF_L_IN_CURRENT_MIN
|
||||
#define MCCONF_L_IN_CURRENT_MIN -100.0 // (jaykup) (flipsky firmware) Input current limit in Amperes (Lower)
|
||||
#endif
|
||||
#ifndef MCCONF_L_RPM_MAX
|
||||
#define MCCONF_L_RPM_MAX 150000.0 // (jaykup) (flipsky firmware) The motor speed limit (Upper)
|
||||
#endif
|
||||
#ifndef MCCONF_L_RPM_MIN
|
||||
#define MCCONF_L_RPM_MIN -150000.0 // (jaykup) (flipsky firmware) The motor speed limit (Lower)
|
||||
#endif
|
||||
#ifndef MCCONF_SI_BATTERY_CELLS
|
||||
#define MCCONF_SI_BATTERY_CELLS 12 // (jaykup) Battery Cells
|
||||
#endif
|
||||
#ifndef MCCONF_SI_BATTERY_AH
|
||||
#define MCCONF_SI_BATTERY_AH 10.0 // (jaykup) Battery amp hours
|
||||
#endif
|
||||
|
||||
// (jaykup) Suggested defaults
|
||||
#ifndef MCCONF_FOC_PHASE_FILTER_ENABLE
|
||||
#define MCCONF_FOC_PHASE_FILTER_ENABLE false // Use phase voltage filters when available
|
||||
#endif
|
||||
|
||||
// Setting limits
|
||||
#define HW_LIM_CURRENT -120.0, 120.0 // (jaykup) phase amps
|
||||
#define HW_LIM_CURRENT_IN -120.0, 120.0 // (jaykup) battery amps
|
||||
#define HW_LIM_CURRENT_ABS 0.0, 200 // (jaykup) abs phase amps
|
||||
#define HW_LIM_VIN 6.0, 120.0 // (jaykup)
|
||||
#define HW_LIM_ERPM -200e3, 200e3 // (jaykup)
|
||||
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
||||
#define HW_LIM_DUTY_MAX 0.0, 0.99
|
||||
#define HW_LIM_TEMP_FET -40.0, 110.0
|
||||
|
||||
#endif /* HW_75_100_H_ */
|
||||
Loading…
Reference in New Issue