mirror of https://github.com/rusefi/bldc.git
Merge branch 'master' of https://github.com/JohnSpintend/vedderb_bldc
This commit is contained in:
commit
7310543530
|
@ -20,8 +20,10 @@
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||||||
#include "ch.h"
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#include "ch.h"
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#include "hal.h"
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#include "hal.h"
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||||||
#include "stm32f4xx_conf.h"
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#include "stm32f4xx_conf.h"
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||||||
#include "utils_math.h"
|
#include "utils.h"
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||||||
|
#ifdef HW_HAS_DRV8323S
|
||||||
#include "drv8323s.h"
|
#include "drv8323s.h"
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||||||
|
#endif
|
||||||
#include "terminal.h"
|
#include "terminal.h"
|
||||||
#include "commands.h"
|
#include "commands.h"
|
||||||
#include "mc_interface.h"
|
#include "mc_interface.h"
|
||||||
|
@ -91,6 +93,14 @@ void hw_init_gpio(void) {
|
||||||
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
|
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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||||||
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
|
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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|
|
||||||
|
#ifdef HW_HAS_PHASE_FILTERS
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||||||
|
// Phase filters
|
||||||
|
palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN,
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|
PAL_MODE_OUTPUT_PUSHPULL |
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|
PAL_STM32_OSPEED_HIGHEST);
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|
PHASE_FILTER_OFF();
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||||||
|
#endif
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||||||
|
|
||||||
// Fault pin
|
// Fault pin
|
||||||
palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP);
|
palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP);
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||||||
|
|
||||||
|
@ -108,7 +118,9 @@ void hw_init_gpio(void) {
|
||||||
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
|
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
|
||||||
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
|
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
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||||||
|
|
||||||
|
#ifdef HW_HAS_DRV8323S
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drv8323s_init();
|
drv8323s_init();
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||||||
|
#endif
|
||||||
}
|
}
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||||||
|
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||||||
void hw_setup_adc_channels(void) {
|
void hw_setup_adc_channels(void) {
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||||||
|
|
|
@ -20,275 +20,6 @@
|
||||||
#ifndef HW_Little_FOCer_H_
|
#ifndef HW_Little_FOCer_H_
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||||||
#define HW_Little_FOCer_H_
|
#define HW_Little_FOCer_H_
|
||||||
|
|
||||||
#include "drv8323s.h"
|
#include "hw_Little_FOCer_core.h"
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|
|
||||||
#define HW_NAME "Little_FOCer"
|
|
||||||
|
|
||||||
// HW properties
|
|
||||||
#define HW_HAS_DRV8323S
|
|
||||||
#define HW_HAS_3_SHUNTS
|
|
||||||
|
|
||||||
#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \
|
|
||||||
drv8323s_write_reg(3,0x333); \
|
|
||||||
drv8323s_write_reg(4,0x733);
|
|
||||||
|
|
||||||
// Macros
|
|
||||||
#define ENABLE_GATE() palSetPad(GPIOB, 5)
|
|
||||||
#define DISABLE_GATE() palClearPad(GPIOB, 5)
|
|
||||||
|
|
||||||
#define IS_DRV_FAULT() (!palReadPad(GPIOB, 7))
|
|
||||||
|
|
||||||
#define LED_GREEN_ON() palSetPad(GPIOB, 0)
|
|
||||||
#define LED_GREEN_OFF() palClearPad(GPIOB, 0)
|
|
||||||
#define LED_RED_ON() palSetPad(GPIOB, 1)
|
|
||||||
#define LED_RED_OFF() palClearPad(GPIOB, 1)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* ADC Vector
|
|
||||||
*
|
|
||||||
* 0: IN0 SENS1
|
|
||||||
* 1: IN1 SENS2
|
|
||||||
* 2: IN2 SENS3
|
|
||||||
* 3: IN10 CURR1
|
|
||||||
* 4: IN11 CURR2
|
|
||||||
* 5: IN12 CURR3
|
|
||||||
* 6: IN5 ADC_EXT1
|
|
||||||
* 7: IN6 ADC_EXT2
|
|
||||||
* 8: IN3 TEMP_PCB
|
|
||||||
* 9: IN14 TEMP_MOTOR
|
|
||||||
* 10: IN15 Shutdown
|
|
||||||
* 11: IN13 AN_IN
|
|
||||||
* 12: Vrefint
|
|
||||||
* 13: IN0 SENS1
|
|
||||||
* 14: IN1 SENS2
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define HW_ADC_CHANNELS 15
|
|
||||||
#define HW_ADC_INJ_CHANNELS 3
|
|
||||||
#define HW_ADC_NBR_CONV 5
|
|
||||||
|
|
||||||
// ADC Indexes
|
|
||||||
#define ADC_IND_SENS1 0
|
|
||||||
#define ADC_IND_SENS2 1
|
|
||||||
#define ADC_IND_SENS3 2
|
|
||||||
#define ADC_IND_CURR1 3
|
|
||||||
#define ADC_IND_CURR2 4
|
|
||||||
#define ADC_IND_CURR3 5
|
|
||||||
#define ADC_IND_VIN_SENS 11
|
|
||||||
#define ADC_IND_EXT 6
|
|
||||||
#define ADC_IND_EXT2 7
|
|
||||||
#define ADC_IND_TEMP_MOS 8
|
|
||||||
#define ADC_IND_TEMP_MOTOR 9
|
|
||||||
#define ADC_IND_VREFINT 12
|
|
||||||
#define ADC_IND_SHUTDOWN 10
|
|
||||||
|
|
||||||
// ADC macros and settings
|
|
||||||
|
|
||||||
// Component parameters (can be overridden)
|
|
||||||
#ifndef V_REG
|
|
||||||
#define V_REG 3.3
|
|
||||||
#endif
|
|
||||||
#ifndef VIN_R1
|
|
||||||
#define VIN_R1 68000.0
|
|
||||||
#endif
|
|
||||||
#ifndef VIN_R2
|
|
||||||
#define VIN_R2 2200.0
|
|
||||||
#endif
|
|
||||||
#ifndef CURRENT_AMP_GAIN
|
|
||||||
#define CURRENT_AMP_GAIN 20.0
|
|
||||||
#endif
|
|
||||||
#ifndef CURRENT_SHUNT_RES
|
|
||||||
#define CURRENT_SHUNT_RES 0.0005
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Input voltage
|
|
||||||
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
|
||||||
|
|
||||||
// NTC Termistors
|
|
||||||
#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
|
|
||||||
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
|
||||||
|
|
||||||
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
|
|
||||||
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
|
|
||||||
|
|
||||||
// Voltage on ADC channel
|
|
||||||
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
|
||||||
|
|
||||||
// Double samples in beginning and end for positive current measurement.
|
|
||||||
// Useful when the shunt sense traces have noise that causes offset.
|
|
||||||
#ifndef CURR1_DOUBLE_SAMPLE
|
|
||||||
#define CURR1_DOUBLE_SAMPLE 0
|
|
||||||
#endif
|
|
||||||
#ifndef CURR2_DOUBLE_SAMPLE
|
|
||||||
#define CURR2_DOUBLE_SAMPLE 0
|
|
||||||
#endif
|
|
||||||
#ifndef CURR3_DOUBLE_SAMPLE
|
|
||||||
#define CURR3_DOUBLE_SAMPLE 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// COMM-port ADC GPIOs
|
|
||||||
#define HW_ADC_EXT_GPIO GPIOA
|
|
||||||
#define HW_ADC_EXT_PIN 5
|
|
||||||
#define HW_ADC_EXT2_GPIO GPIOA
|
|
||||||
#define HW_ADC_EXT2_PIN 6
|
|
||||||
|
|
||||||
// UART Peripheral
|
|
||||||
#define HW_UART_DEV SD3
|
|
||||||
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
|
||||||
#define HW_UART_TX_PORT GPIOB
|
|
||||||
#define HW_UART_TX_PIN 10
|
|
||||||
#define HW_UART_RX_PORT GPIOB
|
|
||||||
#define HW_UART_RX_PIN 11
|
|
||||||
|
|
||||||
// Permanent UART Peripheral (for NRF51)
|
|
||||||
#define HW_UART_P_BAUD 115200
|
|
||||||
#define HW_UART_P_DEV SD4
|
|
||||||
#define HW_UART_P_GPIO_AF GPIO_AF_UART4
|
|
||||||
#define HW_UART_P_TX_PORT GPIOC
|
|
||||||
#define HW_UART_P_TX_PIN 10
|
|
||||||
#define HW_UART_P_RX_PORT GPIOC
|
|
||||||
#define HW_UART_P_RX_PIN 11
|
|
||||||
|
|
||||||
// ICU Peripheral for servo decoding
|
|
||||||
#define HW_USE_SERVO_TIM4
|
|
||||||
#define HW_ICU_TIMER TIM4
|
|
||||||
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
|
||||||
#define HW_ICU_DEV ICUD4
|
|
||||||
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
|
||||||
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
|
||||||
#define HW_ICU_GPIO GPIOB
|
|
||||||
#define HW_ICU_PIN 6
|
|
||||||
|
|
||||||
// I2C Peripheral
|
|
||||||
#define HW_I2C_DEV I2CD2
|
|
||||||
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
|
||||||
#define HW_I2C_SCL_PORT GPIOB
|
|
||||||
#define HW_I2C_SCL_PIN 10
|
|
||||||
#define HW_I2C_SDA_PORT GPIOB
|
|
||||||
#define HW_I2C_SDA_PIN 11
|
|
||||||
|
|
||||||
// Hall/encoder pins
|
|
||||||
#define HW_HALL_ENC_GPIO1 GPIOC
|
|
||||||
#define HW_HALL_ENC_PIN1 6
|
|
||||||
#define HW_HALL_ENC_GPIO2 GPIOC
|
|
||||||
#define HW_HALL_ENC_PIN2 7
|
|
||||||
#define HW_HALL_ENC_GPIO3 GPIOC
|
|
||||||
#define HW_HALL_ENC_PIN3 8
|
|
||||||
#define HW_ENC_TIM TIM3
|
|
||||||
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
|
||||||
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
|
||||||
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
|
||||||
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
|
||||||
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
|
||||||
#define HW_ENC_EXTI_LINE EXTI_Line8
|
|
||||||
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
|
||||||
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
|
||||||
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
|
||||||
|
|
||||||
// SPI pins
|
|
||||||
#define HW_SPI_DEV SPID1
|
|
||||||
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
|
||||||
#define HW_SPI_PORT_NSS GPIOA
|
|
||||||
#define HW_SPI_PIN_NSS 4
|
|
||||||
#define HW_SPI_PORT_SCK GPIOA
|
|
||||||
#define HW_SPI_PIN_SCK 5
|
|
||||||
#define HW_SPI_PORT_MOSI GPIOA
|
|
||||||
#define HW_SPI_PIN_MOSI 7
|
|
||||||
#define HW_SPI_PORT_MISO GPIOA
|
|
||||||
#define HW_SPI_PIN_MISO 6
|
|
||||||
|
|
||||||
// SPI for DRV8323S
|
|
||||||
|
|
||||||
//#define DRV8323S_MOSI_GPIO GPIOC
|
|
||||||
//#define DRV8323S_MOSI_PIN 12
|
|
||||||
//#define DRV8323S_MISO_GPIO GPIOC
|
|
||||||
//#define DRV8323S_MISO_PIN 11
|
|
||||||
//#define DRV8323S_SCK_GPIO GPIOC
|
|
||||||
//#define DRV8323S_SCK_PIN 10
|
|
||||||
//#define DRV8323S_CS_GPIO GPIOC
|
|
||||||
//#define DRV8323S_CS_PIN 9
|
|
||||||
|
|
||||||
// SPI for DRV8323S rev2
|
|
||||||
|
|
||||||
#define DRV8323S_MOSI_GPIO GPIOC
|
|
||||||
#define DRV8323S_MOSI_PIN 12
|
|
||||||
#define DRV8323S_MISO_GPIO GPIOD
|
|
||||||
#define DRV8323S_MISO_PIN 2
|
|
||||||
#define DRV8323S_SCK_GPIO GPIOC
|
|
||||||
#define DRV8323S_SCK_PIN 13
|
|
||||||
#define DRV8323S_CS_GPIO GPIOC
|
|
||||||
#define DRV8323S_CS_PIN 9
|
|
||||||
|
|
||||||
// BMI160
|
|
||||||
#define BMI160_SDA_GPIO GPIOB
|
|
||||||
#define BMI160_SDA_PIN 2
|
|
||||||
#define BMI160_SCL_GPIO GPIOA
|
|
||||||
#define BMI160_SCL_PIN 15
|
|
||||||
//#define IMU_FLIP
|
|
||||||
|
|
||||||
// NRF SWD
|
|
||||||
#define NRF5x_SWDIO_GPIO GPIOB
|
|
||||||
#define NRF5x_SWDIO_PIN 4
|
|
||||||
#define NRF5x_SWCLK_GPIO GPIOB
|
|
||||||
#define NRF5x_SWCLK_PIN 3
|
|
||||||
|
|
||||||
// Measurement macros
|
|
||||||
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
|
||||||
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
|
||||||
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
|
||||||
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
|
||||||
|
|
||||||
// Macros
|
|
||||||
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
|
||||||
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
|
||||||
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
|
||||||
|
|
||||||
// Default setting overrides
|
|
||||||
#ifndef MCCONF_L_MIN_VOLTAGE
|
|
||||||
#define MCCONF_L_MIN_VOLTAGE 18.0 // Minimum input voltage
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_MAX_VOLTAGE
|
|
||||||
#define MCCONF_L_MAX_VOLTAGE 95.0 // Maximum input voltage
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_CURRENT_MAX
|
|
||||||
#define MCCONF_L_CURRENT_MAX 70.0 // Current limit in Amperes (Upper)
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_CURRENT_MIN
|
|
||||||
#define MCCONF_L_CURRENT_MIN -50.0 // Current limit in Amperes (Lower)
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_IN_CURRENT_MAX
|
|
||||||
#define MCCONF_L_IN_CURRENT_MAX 60.0 // Input current limit in Amperes (Upper)
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_IN_CURRENT_MIN
|
|
||||||
#define MCCONF_L_IN_CURRENT_MIN -60.0 // Input current limit in Amperes (Lower)
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_MAX_ABS_CURRENT
|
|
||||||
#define MCCONF_L_MAX_ABS_CURRENT 130.0 // The maximum absolute current above which a fault is generated
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_M_DRV8301_OC_ADJ
|
|
||||||
#define MCCONF_M_DRV8301_OC_ADJ 25 // DRV8301 over current protection threshold
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_LIM_TEMP_FET_START
|
|
||||||
#define MCCONF_L_LIM_TEMP_FET_START 70.0 // MOSFET temperature where current limiting should begin
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_L_LIM_TEMP_FET_END
|
|
||||||
#define MCCONF_L_LIM_TEMP_FET_END 80.0 // MOSFET temperature where everything should be shut off
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_DEFAULT_MOTOR_TYPE
|
|
||||||
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
|
||||||
#endif
|
|
||||||
#ifndef MCCONF_FOC_F_ZV
|
|
||||||
#define MCCONF_FOC_F_ZV 20000.0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// Setting limits
|
|
||||||
#define HW_LIM_CURRENT -150.0, 150.0
|
|
||||||
#define HW_LIM_CURRENT_IN -150.0, 150.0
|
|
||||||
#define HW_LIM_CURRENT_ABS 0.0, 175.0
|
|
||||||
#define HW_LIM_VIN 18.0, 95.0
|
|
||||||
#define HW_LIM_ERPM -200e3, 200e3
|
|
||||||
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
|
||||||
#define HW_LIM_DUTY_MAX 0.0, 0.99
|
|
||||||
#define HW_LIM_TEMP_FET -40.0, 110.0
|
|
||||||
|
|
||||||
#endif /* HW_Little_FOCer_H_ */
|
#endif /* HW_Little_FOCer_H_ */
|
||||||
|
|
|
@ -17,12 +17,11 @@
|
||||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef HW_LITTLE_FOCER_NO_LIMITS_H_
|
#ifndef HW_LITTLE_FOCER_V3_H_
|
||||||
#define HW_LITTLE_FOCER_NO_LIMITS_H_
|
#define HW_LITTLE_FOCER_V3_H_
|
||||||
|
|
||||||
#define DISABLE_HW_LIMITS
|
#define LFOC_IS_V3
|
||||||
|
|
||||||
#include "hw_Little_FOCer.h"
|
#include "hw_Little_FOCer_core.h"
|
||||||
|
|
||||||
|
#endif /* HW_LITTLE_FOCER_V3_H_ */
|
||||||
#endif /* HW_LITTLE_FOCER_NO_LIMITS_H_ */
|
|
|
@ -0,0 +1,27 @@
|
||||||
|
/*
|
||||||
|
Copyright 2016 Benjamin Vedder benjamin@vedder.se
|
||||||
|
|
||||||
|
This file is part of the VESC firmware.
|
||||||
|
|
||||||
|
The VESC firmware is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
The VESC firmware is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HW_LITTLE_FOCER_V3_1_H_
|
||||||
|
#define HW_LITTLE_FOCER_V3_1_H_
|
||||||
|
|
||||||
|
#define LFOC_IS_V3_1
|
||||||
|
|
||||||
|
#include "hw_Little_FOCer_core.h"
|
||||||
|
|
||||||
|
#endif /* HW_LITTLE_FOCER_V3_1_H_ */
|
|
@ -0,0 +1,252 @@
|
||||||
|
/*
|
||||||
|
Copyright 2012-2016 Benjamin Vedder benjamin@vedder.se
|
||||||
|
|
||||||
|
This program is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hw.h"
|
||||||
|
|
||||||
|
#include "ch.h"
|
||||||
|
#include "hal.h"
|
||||||
|
#include "stm32f4xx_conf.h"
|
||||||
|
#include "utils.h"
|
||||||
|
#ifdef HW_HAS_DRV8323S
|
||||||
|
#include "drv8323s.h"
|
||||||
|
#endif
|
||||||
|
#include "terminal.h"
|
||||||
|
#include "commands.h"
|
||||||
|
#include "mc_interface.h"
|
||||||
|
|
||||||
|
// Variables
|
||||||
|
static volatile bool i2c_running = false;
|
||||||
|
|
||||||
|
// I2C configuration
|
||||||
|
static const I2CConfig i2cfg = {
|
||||||
|
OPMODE_I2C,
|
||||||
|
100000,
|
||||||
|
STD_DUTY_CYCLE
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
void hw_init_gpio(void) {
|
||||||
|
// GPIO clock enable
|
||||||
|
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
|
||||||
|
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
|
||||||
|
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
|
||||||
|
RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
|
||||||
|
|
||||||
|
// LEDs
|
||||||
|
palSetPadMode(GPIOB, 0,
|
||||||
|
PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST);
|
||||||
|
palSetPadMode(GPIOB, 1,
|
||||||
|
PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST);
|
||||||
|
|
||||||
|
// ENABLE_GATE
|
||||||
|
palSetPadMode(GPIOB, 5,
|
||||||
|
PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST);
|
||||||
|
|
||||||
|
// Disable DCCAL
|
||||||
|
palSetPadMode(GPIOD, 2,
|
||||||
|
PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST);
|
||||||
|
palClearPad(GPIOD, 2);
|
||||||
|
|
||||||
|
ENABLE_GATE();
|
||||||
|
|
||||||
|
// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
|
||||||
|
palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
|
||||||
|
palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST |
|
||||||
|
PAL_STM32_PUDR_FLOATING);
|
||||||
|
|
||||||
|
// Hall sensors
|
||||||
|
palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
|
||||||
|
palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
|
||||||
|
palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
|
||||||
|
|
||||||
|
#ifdef HW_HAS_PHASE_FILTERS
|
||||||
|
// Phase filters
|
||||||
|
palSetPadMode(PHASE_FILTER_GPIO, PHASE_FILTER_PIN,
|
||||||
|
PAL_MODE_OUTPUT_PUSHPULL |
|
||||||
|
PAL_STM32_OSPEED_HIGHEST);
|
||||||
|
PHASE_FILTER_OFF();
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Fault pin
|
||||||
|
palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP);
|
||||||
|
|
||||||
|
// ADC Pins
|
||||||
|
palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
|
||||||
|
|
||||||
|
palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
|
||||||
|
|
||||||
|
#ifdef HW_HAS_DRV8323S
|
||||||
|
drv8323s_init();
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void hw_setup_adc_channels(void) {
|
||||||
|
// ADC1 regular channels
|
||||||
|
ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles);
|
||||||
|
|
||||||
|
// ADC2 regular channels
|
||||||
|
ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles);
|
||||||
|
|
||||||
|
// ADC3 regular channels
|
||||||
|
ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles);
|
||||||
|
|
||||||
|
// Injected channels
|
||||||
|
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles);
|
||||||
|
ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
|
||||||
|
}
|
||||||
|
|
||||||
|
void hw_start_i2c(void) {
|
||||||
|
i2cAcquireBus(&HW_I2C_DEV);
|
||||||
|
|
||||||
|
if (!i2c_running) {
|
||||||
|
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
i2cStart(&HW_I2C_DEV, &i2cfg);
|
||||||
|
i2c_running = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
i2cReleaseBus(&HW_I2C_DEV);
|
||||||
|
}
|
||||||
|
|
||||||
|
void hw_stop_i2c(void) {
|
||||||
|
i2cAcquireBus(&HW_I2C_DEV);
|
||||||
|
|
||||||
|
if (i2c_running) {
|
||||||
|
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
|
||||||
|
|
||||||
|
i2cStop(&HW_I2C_DEV);
|
||||||
|
i2c_running = false;
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
i2cReleaseBus(&HW_I2C_DEV);
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* Try to restore the i2c bus
|
||||||
|
*/
|
||||||
|
void hw_try_restore_i2c(void) {
|
||||||
|
if (i2c_running) {
|
||||||
|
i2cAcquireBus(&HW_I2C_DEV);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
|
||||||
|
chThdSleep(1);
|
||||||
|
|
||||||
|
for(int i = 0;i < 16;i++) {
|
||||||
|
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Generate start then stop condition
|
||||||
|
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
HW_I2C_DEV.state = I2C_STOP;
|
||||||
|
i2cStart(&HW_I2C_DEV, &i2cfg);
|
||||||
|
|
||||||
|
i2cReleaseBus(&HW_I2C_DEV);
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,330 @@
|
||||||
|
/*
|
||||||
|
Copyright 2016 Benjamin Vedder benjamin@vedder.se
|
||||||
|
|
||||||
|
This file is part of the VESC firmware.
|
||||||
|
|
||||||
|
The VESC firmware is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
The VESC firmware is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HW_LITTLE_FOCER_CORE_H_
|
||||||
|
#define HW_LITTLE_FOCER_CORE_H_
|
||||||
|
|
||||||
|
#ifdef LFOC_IS_V3_1
|
||||||
|
#define HW_NAME "Little_FOCer_V3_1"
|
||||||
|
#define LFOC_IS_V3
|
||||||
|
#else
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define HW_NAME "Little_FOCer_V3"
|
||||||
|
#else
|
||||||
|
#define HW_NAME "Little_FOCer"
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// HW properties
|
||||||
|
#if !defined(LFOC_IS_V3)
|
||||||
|
#define HW_HAS_DRV8323S
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define HW_HAS_3_SHUNTS
|
||||||
|
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define HW_HAS_PHASE_FILTERS
|
||||||
|
#define PHASE_FILTER_GPIO GPIOC
|
||||||
|
#define PHASE_FILTER_PIN 13
|
||||||
|
#define PHASE_FILTER_ON() palSetPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
|
||||||
|
#define PHASE_FILTER_OFF() palClearPad(PHASE_FILTER_GPIO, PHASE_FILTER_PIN)
|
||||||
|
#define HW_DEAD_TIME_NSEC 660.0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef HW_HAS_DRV8323S
|
||||||
|
#define DRV8323S_CUSTOM_SETTINGS(); drv8323s_set_current_amp_gain(CURRENT_AMP_GAIN); \
|
||||||
|
drv8323s_write_reg(3,0x344); \
|
||||||
|
drv8323s_write_reg(4,0x744);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Macros
|
||||||
|
#if !defined(LFOC_IS_V3)
|
||||||
|
#define ENABLE_GATE() palSetPad(GPIOB, 5)
|
||||||
|
#define DISABLE_GATE() palClearPad(GPIOB, 5)
|
||||||
|
|
||||||
|
#define IS_DRV_FAULT() (!palReadPad(GPIOB, 7))
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#define LED_GREEN_ON() palSetPad(GPIOB, 0)
|
||||||
|
#define LED_GREEN_OFF() palClearPad(GPIOB, 0)
|
||||||
|
#define LED_RED_ON() palSetPad(GPIOB, 1)
|
||||||
|
#define LED_RED_OFF() palClearPad(GPIOB, 1)
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ADC Vector
|
||||||
|
*
|
||||||
|
* 0: IN0 SENS1
|
||||||
|
* 1: IN1 SENS2
|
||||||
|
* 2: IN2 SENS3
|
||||||
|
* 3: IN10 CURR1
|
||||||
|
* 4: IN11 CURR2
|
||||||
|
* 5: IN12 CURR3
|
||||||
|
* 6: IN5 ADC_EXT1
|
||||||
|
* 7: IN6 ADC_EXT2
|
||||||
|
* 8: IN3 TEMP_PCB
|
||||||
|
* 9: IN14 TEMP_MOTOR
|
||||||
|
* 10: IN15 Shutdown
|
||||||
|
* 11: IN13 AN_IN
|
||||||
|
* 12: Vrefint
|
||||||
|
* 13: IN0 SENS1
|
||||||
|
* 14: IN1 SENS2
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define HW_ADC_CHANNELS 15
|
||||||
|
#define HW_ADC_INJ_CHANNELS 3
|
||||||
|
#define HW_ADC_NBR_CONV 5
|
||||||
|
|
||||||
|
// ADC Indexes
|
||||||
|
#define ADC_IND_SENS1 0
|
||||||
|
#define ADC_IND_SENS2 1
|
||||||
|
#define ADC_IND_SENS3 2
|
||||||
|
#define ADC_IND_CURR1 3
|
||||||
|
#define ADC_IND_CURR2 4
|
||||||
|
#define ADC_IND_CURR3 5
|
||||||
|
#define ADC_IND_VIN_SENS 11
|
||||||
|
#define ADC_IND_EXT 6
|
||||||
|
#define ADC_IND_EXT2 7
|
||||||
|
#define ADC_IND_TEMP_MOS 8
|
||||||
|
#define ADC_IND_TEMP_MOTOR 9
|
||||||
|
#define ADC_IND_VREFINT 12
|
||||||
|
#define ADC_IND_SHUTDOWN 10
|
||||||
|
|
||||||
|
// ADC macros and settings
|
||||||
|
|
||||||
|
// Component parameters (can be overridden)
|
||||||
|
#ifndef V_REG
|
||||||
|
#define V_REG 3.3
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R1
|
||||||
|
#define VIN_R1 68000.0
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R2
|
||||||
|
#define VIN_R2 2200.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_AMP_GAIN
|
||||||
|
#define CURRENT_AMP_GAIN 20.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_SHUNT_RES
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define CURRENT_SHUNT_RES 0.0002
|
||||||
|
#else
|
||||||
|
#define CURRENT_SHUNT_RES 0.0005
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Input voltage
|
||||||
|
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
||||||
|
|
||||||
|
// NTC Termistors
|
||||||
|
#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
|
||||||
|
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||||
|
|
||||||
|
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
|
||||||
|
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
|
||||||
|
|
||||||
|
// Voltage on ADC channel
|
||||||
|
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
||||||
|
|
||||||
|
// Double samples in beginning and end for positive current measurement.
|
||||||
|
// Useful when the shunt sense traces have noise that causes offset.
|
||||||
|
#ifndef CURR1_DOUBLE_SAMPLE
|
||||||
|
#define CURR1_DOUBLE_SAMPLE 0
|
||||||
|
#endif
|
||||||
|
#ifndef CURR2_DOUBLE_SAMPLE
|
||||||
|
#define CURR2_DOUBLE_SAMPLE 0
|
||||||
|
#endif
|
||||||
|
#ifndef CURR3_DOUBLE_SAMPLE
|
||||||
|
#define CURR3_DOUBLE_SAMPLE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// COMM-port ADC GPIOs
|
||||||
|
#define HW_ADC_EXT_GPIO GPIOA
|
||||||
|
#define HW_ADC_EXT_PIN 5
|
||||||
|
#define HW_ADC_EXT2_GPIO GPIOA
|
||||||
|
#define HW_ADC_EXT2_PIN 6
|
||||||
|
|
||||||
|
// UART Peripheral
|
||||||
|
#define HW_UART_DEV SD3
|
||||||
|
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
||||||
|
#define HW_UART_TX_PORT GPIOB
|
||||||
|
#define HW_UART_TX_PIN 10
|
||||||
|
#define HW_UART_RX_PORT GPIOB
|
||||||
|
#define HW_UART_RX_PIN 11
|
||||||
|
|
||||||
|
// Permanent UART Peripheral (for NRF51)
|
||||||
|
#define HW_UART_P_BAUD 115200
|
||||||
|
#define HW_UART_P_DEV SD4
|
||||||
|
#define HW_UART_P_GPIO_AF GPIO_AF_UART4
|
||||||
|
#define HW_UART_P_TX_PORT GPIOC
|
||||||
|
#define HW_UART_P_TX_PIN 10
|
||||||
|
#define HW_UART_P_RX_PORT GPIOC
|
||||||
|
#define HW_UART_P_RX_PIN 11
|
||||||
|
|
||||||
|
// ICU Peripheral for servo decoding
|
||||||
|
#define HW_USE_SERVO_TIM4
|
||||||
|
#define HW_ICU_TIMER TIM4
|
||||||
|
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||||
|
#define HW_ICU_DEV ICUD4
|
||||||
|
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
||||||
|
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
||||||
|
#define HW_ICU_GPIO GPIOB
|
||||||
|
#define HW_ICU_PIN 6
|
||||||
|
|
||||||
|
// I2C Peripheral
|
||||||
|
#define HW_I2C_DEV I2CD2
|
||||||
|
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||||
|
#define HW_I2C_SCL_PORT GPIOB
|
||||||
|
#define HW_I2C_SCL_PIN 10
|
||||||
|
#define HW_I2C_SDA_PORT GPIOB
|
||||||
|
#define HW_I2C_SDA_PIN 11
|
||||||
|
|
||||||
|
// Hall/encoder pins
|
||||||
|
#define HW_HALL_ENC_GPIO1 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN1 6
|
||||||
|
#define HW_HALL_ENC_GPIO2 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN2 7
|
||||||
|
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN3 8
|
||||||
|
#define HW_ENC_TIM TIM3
|
||||||
|
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
||||||
|
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
||||||
|
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||||
|
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
||||||
|
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
||||||
|
#define HW_ENC_EXTI_LINE EXTI_Line8
|
||||||
|
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
||||||
|
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
||||||
|
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
||||||
|
|
||||||
|
// SPI pins
|
||||||
|
#define HW_SPI_DEV SPID1
|
||||||
|
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
||||||
|
#define HW_SPI_PORT_NSS GPIOA
|
||||||
|
#define HW_SPI_PIN_NSS 4
|
||||||
|
#define HW_SPI_PORT_SCK GPIOA
|
||||||
|
#define HW_SPI_PIN_SCK 5
|
||||||
|
#define HW_SPI_PORT_MOSI GPIOA
|
||||||
|
#define HW_SPI_PIN_MOSI 7
|
||||||
|
#define HW_SPI_PORT_MISO GPIOA
|
||||||
|
#define HW_SPI_PIN_MISO 6
|
||||||
|
|
||||||
|
#ifdef HW_HAS_DRV8323S
|
||||||
|
// SPI for DRV8323S rev2
|
||||||
|
#define DRV8323S_MOSI_GPIO GPIOC
|
||||||
|
#define DRV8323S_MOSI_PIN 12
|
||||||
|
#define DRV8323S_MISO_GPIO GPIOD
|
||||||
|
#define DRV8323S_MISO_PIN 2
|
||||||
|
#define DRV8323S_SCK_GPIO GPIOC
|
||||||
|
#define DRV8323S_SCK_PIN 13
|
||||||
|
#define DRV8323S_CS_GPIO GPIOC
|
||||||
|
#define DRV8323S_CS_PIN 9
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// IMU:
|
||||||
|
#ifdef LFOC_IS_V3_1
|
||||||
|
// LSM6DS3
|
||||||
|
#define LSM6DS3_SDA_GPIO GPIOB
|
||||||
|
#define LSM6DS3_SDA_PIN 2
|
||||||
|
#define LSM6DS3_SCL_GPIO GPIOA
|
||||||
|
#define LSM6DS3_SCL_PIN 15
|
||||||
|
#else
|
||||||
|
// BMI160
|
||||||
|
#define BMI160_SDA_GPIO GPIOB
|
||||||
|
#define BMI160_SDA_PIN 2
|
||||||
|
#define BMI160_SCL_GPIO GPIOA
|
||||||
|
#define BMI160_SCL_PIN 15
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// NRF SWD
|
||||||
|
#define NRF5x_SWDIO_GPIO GPIOB
|
||||||
|
#define NRF5x_SWDIO_PIN 4
|
||||||
|
#define NRF5x_SWCLK_GPIO GPIOB
|
||||||
|
#define NRF5x_SWCLK_PIN 3
|
||||||
|
|
||||||
|
// Measurement macros
|
||||||
|
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||||
|
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||||
|
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||||
|
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||||
|
|
||||||
|
// Macros
|
||||||
|
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||||
|
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||||
|
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||||
|
|
||||||
|
// Default setting overrides
|
||||||
|
#ifndef MCCONF_L_MIN_VOLTAGE
|
||||||
|
#define MCCONF_L_MIN_VOLTAGE 18.0 // Minimum input voltage
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_MAX_VOLTAGE
|
||||||
|
#define MCCONF_L_MAX_VOLTAGE 95.0 // Maximum input voltage
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_CURRENT_MAX
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define MCCONF_L_CURRENT_MAX 100.0 // Current limit in Amperes (Upper)
|
||||||
|
#else
|
||||||
|
#define MCCONF_L_CURRENT_MAX 70.0 // Current limit in Amperes (Upper)
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_CURRENT_MIN
|
||||||
|
#define MCCONF_L_CURRENT_MIN -50.0 // Current limit in Amperes (Lower)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_IN_CURRENT_MAX
|
||||||
|
#define MCCONF_L_IN_CURRENT_MAX 60.0 // Input current limit in Amperes (Upper)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_IN_CURRENT_MIN
|
||||||
|
#define MCCONF_L_IN_CURRENT_MIN -60.0 // Input current limit in Amperes (Lower)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_MAX_ABS_CURRENT
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define MCCONF_L_MAX_ABS_CURRENT 300.0 // The maximum absolute current above which a fault is generated
|
||||||
|
#else
|
||||||
|
#define MCCONF_L_MAX_ABS_CURRENT 130.0 // The maximum absolute current above which a fault is generated
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_LIM_TEMP_FET_START
|
||||||
|
#define MCCONF_L_LIM_TEMP_FET_START 70.0 // MOSFET temperature where current limiting should begin
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_LIM_TEMP_FET_END
|
||||||
|
#define MCCONF_L_LIM_TEMP_FET_END 80.0 // MOSFET temperature where everything should be shut off
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_DEFAULT_MOTOR_TYPE
|
||||||
|
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_FOC_F_ZV
|
||||||
|
#define MCCONF_FOC_F_ZV 20000.0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Setting limits
|
||||||
|
#ifdef LFOC_IS_V3
|
||||||
|
#define HW_LIM_CURRENT -250.0, 250.0
|
||||||
|
#define HW_LIM_CURRENT_IN -100.0, 100.0
|
||||||
|
#define HW_LIM_CURRENT_ABS 0.0, 350.0
|
||||||
|
#else
|
||||||
|
#define HW_LIM_CURRENT -150.0, 150.0
|
||||||
|
#define HW_LIM_CURRENT_IN -100.0, 100.0
|
||||||
|
#define HW_LIM_CURRENT_ABS 0.0, 175.0
|
||||||
|
#endif
|
||||||
|
#define HW_LIM_VIN 18.0, 95.0
|
||||||
|
#define HW_LIM_ERPM -200e3, 200e3
|
||||||
|
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
||||||
|
#define HW_LIM_DUTY_MAX 0.0, 0.99
|
||||||
|
#define HW_LIM_TEMP_FET -40.0, 110.0
|
||||||
|
|
||||||
|
#endif /* HW_LITTLE_FOCER_H_ */
|
|
@ -74,8 +74,9 @@ package_dict["STORMCORE_100DX"] = [['stormcore_100dx', default_name],
|
||||||
['stormcore_100dx_no_limits', no_limits_name]]
|
['stormcore_100dx_no_limits', no_limits_name]]
|
||||||
package_dict["STORMCORE_100S"] = [['stormcore_100s', default_name],
|
package_dict["STORMCORE_100S"] = [['stormcore_100s', default_name],
|
||||||
['stormcore_100s_no_limits', no_limits_name]]
|
['stormcore_100s_no_limits', no_limits_name]]
|
||||||
package_dict["Little_FOCer"] = [['Little_FOCer', default_name],
|
package_dict["Little_FOCer"] = [['Little_FOCer', default_name]]
|
||||||
['Little_FOCer_no_limits', no_limits_name]]
|
package_dict["Little_FOCer_V3"] = [['Little_FOCer_V3', default_name]]
|
||||||
|
package_dict["Little_FOCer_V3_1"] = [['Little_FOCer_V3_1', default_name]]
|
||||||
package_dict["UXV_SR"] = [['uxv_sr', default_name]]
|
package_dict["UXV_SR"] = [['uxv_sr', default_name]]
|
||||||
package_dict["GESC"] = [['gesc', default_name]]
|
package_dict["GESC"] = [['gesc', default_name]]
|
||||||
package_dict["Warrior6"] = [['warrior6', default_name]]
|
package_dict["Warrior6"] = [['warrior6', default_name]]
|
||||||
|
|
Loading…
Reference in New Issue