Merge pull request #294 from RadinnAB/blackmagic

Blackmagic - Routed nRF reset & halt  to cortexm functions
This commit is contained in:
Benjamin Vedder 2021-04-24 12:30:24 +02:00 committed by GitHub
commit b36a6116e4
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7 changed files with 31 additions and 9 deletions

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@ -577,6 +577,16 @@ int bm_reboot(void) {
return ret;
}
/**
* Halt target execution.
*/
void bm_halt_req(void) {
if (cur_target) {
target_print_en = false;
target_halt_request(cur_target);
}
}
/**
* Leave debug mode of NRF5x device. Will reduce the sleep power consumption
* significantly.

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@ -31,6 +31,7 @@ int bm_erase_flash_all(void);
int bm_write_flash(uint32_t addr, const void *data, uint32_t len);
int bm_mem_read(uint32_t addr, void *data, uint32_t len);
int bm_reboot(void);
void bm_halt_req(void);
void bm_leave_nrf_debug_mode(void);
void bm_disconnect(void);
void bm_change_swd_pins(stm32_gpio_t *swdio_port, int swdio_pin,

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@ -52,9 +52,7 @@ static void cortexm_regs_read(target *t, void *data);
static void cortexm_regs_write(target *t, const void *data);
static uint32_t cortexm_pc_read(target *t);
static void cortexm_reset(target *t);
static enum target_halt_reason cortexm_halt_poll(target *t, target_addr *watch);
static void cortexm_halt_request(target *t);
static int cortexm_fault_unwind(target *t);
static int cortexm_breakwatch_set(target *t, struct breakwatch *);
@ -500,7 +498,7 @@ static void cortexm_pc_write(target *t, const uint32_t val)
/* The following three routines implement target halt/resume
* using the core debug registers in the NVIC. */
static void cortexm_reset(target *t)
void cortexm_reset(target *t)
{
if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) {
platform_srst_set_val(true);
@ -534,7 +532,7 @@ static void cortexm_reset(target *t)
platform_delay(1);
}
static void cortexm_halt_request(target *t)
void cortexm_halt_request(target *t)
{
volatile struct exception e;
TRY_CATCH (e, EXCEPTION_TIMEOUT) {

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@ -173,6 +173,8 @@ ADIv5_AP_t *cortexm_ap(target *t);
bool cortexm_attach(target *t);
void cortexm_detach(target *t);
void cortexm_reset(target *t);
void cortexm_halt_request(target *t);
void cortexm_halt_resume(target *t, bool step);
int cortexm_run_stub(target *t, uint32_t loadaddr,
uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3);

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@ -403,10 +403,10 @@ void nrf51_mdm_probe(ADIv5_AP_t *ap)
t->regs_size = 4;
t->regs_read = (void*)nop_function;
t->regs_write = (void*)nop_function;
t->reset = (void*)nop_function;
t->halt_request = (void*)nop_function;
t->reset = cortexm_reset;
t->halt_request = cortexm_halt_request;
//t->halt_poll = mdm_halt_poll;
t->halt_resume = (void*)nop_function;
t->halt_resume = cortexm_halt_resume;
target_add_commands(t, nrf51_mdm_cmd_list, t->driver);
}

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@ -462,7 +462,7 @@ void commands_process_packet(unsigned char *data, unsigned int len,
} break;
case COMM_SET_MCCONF: {
#ifndef HW_MCCONF_READ_ONLY
#ifndef HW_MCCONF_READ_ONLY
mc_configuration *mcconf = mempools_alloc_mcconf();
*mcconf = *mc_interface_get_configuration();
@ -525,7 +525,7 @@ void commands_process_packet(unsigned char *data, unsigned int len,
} break;
case COMM_SET_APPCONF: {
#ifndef HW_APPCONF_READ_ONLY
#ifndef HW_APPCONF_READ_ONLY
app_configuration *appconf = mempools_alloc_appconf();
*appconf = *app_get_configuration();
@ -1904,6 +1904,16 @@ static THD_FUNCTION(blocking_thread, arg) {
}
} break;
case COMM_BM_HALT_REQ: {
bm_halt_req();
int32_t ind = 0;
send_buffer[ind++] = packet_id;
if (send_func_blocking) {
send_func_blocking(send_buffer, ind);
}
} break;
case COMM_BM_DISCONNECT: {
bm_disconnect();
bm_leave_nrf_debug_mode();

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@ -968,6 +968,7 @@ typedef enum {
COMM_BMS_FWD_CAN_RX,
COMM_BMS_HW_DATA,
COMM_GET_BATTERY_CUT,
COMM_BM_HALT_REQ,
} COMM_PACKET_ID;
// CAN commands