mirror of https://github.com/rusefi/bldc.git
Merge pull request #294 from RadinnAB/blackmagic
Blackmagic - Routed nRF reset & halt to cortexm functions
This commit is contained in:
commit
b36a6116e4
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@ -577,6 +577,16 @@ int bm_reboot(void) {
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return ret;
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return ret;
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}
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}
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/**
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* Halt target execution.
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*/
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void bm_halt_req(void) {
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if (cur_target) {
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target_print_en = false;
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target_halt_request(cur_target);
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}
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}
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/**
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/**
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* Leave debug mode of NRF5x device. Will reduce the sleep power consumption
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* Leave debug mode of NRF5x device. Will reduce the sleep power consumption
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* significantly.
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* significantly.
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@ -31,6 +31,7 @@ int bm_erase_flash_all(void);
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int bm_write_flash(uint32_t addr, const void *data, uint32_t len);
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int bm_write_flash(uint32_t addr, const void *data, uint32_t len);
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int bm_mem_read(uint32_t addr, void *data, uint32_t len);
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int bm_mem_read(uint32_t addr, void *data, uint32_t len);
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int bm_reboot(void);
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int bm_reboot(void);
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void bm_halt_req(void);
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void bm_leave_nrf_debug_mode(void);
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void bm_leave_nrf_debug_mode(void);
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void bm_disconnect(void);
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void bm_disconnect(void);
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void bm_change_swd_pins(stm32_gpio_t *swdio_port, int swdio_pin,
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void bm_change_swd_pins(stm32_gpio_t *swdio_port, int swdio_pin,
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@ -52,9 +52,7 @@ static void cortexm_regs_read(target *t, void *data);
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static void cortexm_regs_write(target *t, const void *data);
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static void cortexm_regs_write(target *t, const void *data);
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static uint32_t cortexm_pc_read(target *t);
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static uint32_t cortexm_pc_read(target *t);
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static void cortexm_reset(target *t);
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static enum target_halt_reason cortexm_halt_poll(target *t, target_addr *watch);
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static enum target_halt_reason cortexm_halt_poll(target *t, target_addr *watch);
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static void cortexm_halt_request(target *t);
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static int cortexm_fault_unwind(target *t);
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static int cortexm_fault_unwind(target *t);
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static int cortexm_breakwatch_set(target *t, struct breakwatch *);
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static int cortexm_breakwatch_set(target *t, struct breakwatch *);
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@ -500,7 +498,7 @@ static void cortexm_pc_write(target *t, const uint32_t val)
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/* The following three routines implement target halt/resume
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/* The following three routines implement target halt/resume
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* using the core debug registers in the NVIC. */
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* using the core debug registers in the NVIC. */
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static void cortexm_reset(target *t)
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void cortexm_reset(target *t)
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{
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{
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if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) {
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if ((t->target_options & CORTEXM_TOPT_INHIBIT_SRST) == 0) {
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platform_srst_set_val(true);
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platform_srst_set_val(true);
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@ -534,7 +532,7 @@ static void cortexm_reset(target *t)
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platform_delay(1);
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platform_delay(1);
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}
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}
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static void cortexm_halt_request(target *t)
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void cortexm_halt_request(target *t)
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{
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{
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volatile struct exception e;
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volatile struct exception e;
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TRY_CATCH (e, EXCEPTION_TIMEOUT) {
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TRY_CATCH (e, EXCEPTION_TIMEOUT) {
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@ -173,6 +173,8 @@ ADIv5_AP_t *cortexm_ap(target *t);
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bool cortexm_attach(target *t);
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bool cortexm_attach(target *t);
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void cortexm_detach(target *t);
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void cortexm_detach(target *t);
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void cortexm_reset(target *t);
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void cortexm_halt_request(target *t);
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void cortexm_halt_resume(target *t, bool step);
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void cortexm_halt_resume(target *t, bool step);
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int cortexm_run_stub(target *t, uint32_t loadaddr,
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int cortexm_run_stub(target *t, uint32_t loadaddr,
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uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3);
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uint32_t r0, uint32_t r1, uint32_t r2, uint32_t r3);
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@ -403,10 +403,10 @@ void nrf51_mdm_probe(ADIv5_AP_t *ap)
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t->regs_size = 4;
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t->regs_size = 4;
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t->regs_read = (void*)nop_function;
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t->regs_read = (void*)nop_function;
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t->regs_write = (void*)nop_function;
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t->regs_write = (void*)nop_function;
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t->reset = (void*)nop_function;
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t->reset = cortexm_reset;
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t->halt_request = (void*)nop_function;
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t->halt_request = cortexm_halt_request;
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//t->halt_poll = mdm_halt_poll;
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//t->halt_poll = mdm_halt_poll;
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t->halt_resume = (void*)nop_function;
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t->halt_resume = cortexm_halt_resume;
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target_add_commands(t, nrf51_mdm_cmd_list, t->driver);
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target_add_commands(t, nrf51_mdm_cmd_list, t->driver);
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}
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}
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10
commands.c
10
commands.c
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@ -1904,6 +1904,16 @@ static THD_FUNCTION(blocking_thread, arg) {
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}
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}
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} break;
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} break;
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case COMM_BM_HALT_REQ: {
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bm_halt_req();
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int32_t ind = 0;
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send_buffer[ind++] = packet_id;
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if (send_func_blocking) {
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send_func_blocking(send_buffer, ind);
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}
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} break;
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case COMM_BM_DISCONNECT: {
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case COMM_BM_DISCONNECT: {
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bm_disconnect();
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bm_disconnect();
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bm_leave_nrf_debug_mode();
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bm_leave_nrf_debug_mode();
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@ -968,6 +968,7 @@ typedef enum {
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COMM_BMS_FWD_CAN_RX,
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COMM_BMS_FWD_CAN_RX,
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COMM_BMS_HW_DATA,
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COMM_BMS_HW_DATA,
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COMM_GET_BATTERY_CUT,
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COMM_GET_BATTERY_CUT,
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COMM_BM_HALT_REQ,
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} COMM_PACKET_ID;
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} COMM_PACKET_ID;
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// CAN commands
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// CAN commands
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