mirror of https://github.com/rusefi/bldc.git
Merge pull request #603 from TechAUmNu/add-new-a50s-hardware
Clean up a50s hardware naming, add v2.3 support
This commit is contained in:
Benjamin Vedder
GitHub
commit
c6cf5cd374
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@ -351,6 +351,7 @@
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#ifdef ADC_IND_CURR3
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#ifdef ADC_IND_CURR3
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#define GET_CURRENT3() ((float)ADC_Value[ADC_IND_CURR3])
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#define GET_CURRENT3() ((float)ADC_Value[ADC_IND_CURR3])
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#else
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#else
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#define ADC_IND_CURR3 0
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#define GET_CURRENT3() 0
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#define GET_CURRENT3() 0
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#endif
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#endif
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#endif
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#endif
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@ -1,11 +0,0 @@
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#ifndef HW_A50S_12S_H_
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#define HW_A50S_12S_H_
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#define HW_A50S_12S
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#define HW_NAME "a50s_12s"
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#define CURRENT_AMP_GAIN 20.0
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#include "hw_a50s_core.h"
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#endif /* HW_A50S_12S_H_ */
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@ -1,11 +0,0 @@
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#ifndef HW_A50S_12S_H_
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#define HW_A50S_12S_H_
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#define HW_A50S_12S
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#define HW_NAME "a50s_12s_hg"
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#define CURRENT_AMP_GAIN 50.0
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#include "hw_a50s_core.h"
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#endif /* HW_A50S_12S_HG_H_ */
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@ -1,11 +0,0 @@
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#ifndef HW_A50S_6S_H_
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#define HW_A50S_6S_H_
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#define HW_A50S_6S
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#define HW_NAME "a50s_6s"
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#define CURRENT_AMP_GAIN 20.0
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#include "hw_a50s_core.h"
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#endif /* HW_A50S_6S_H_ */
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@ -1,11 +0,0 @@
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#ifndef HW_A50S_6S_H_
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#define HW_A50S_6S_H_
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#define HW_A50S_6S
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#define HW_NAME "a50s_6s_hg"
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#define CURRENT_AMP_GAIN 50.0
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#include "hw_a50s_core.h"
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#endif /* HW_A50S_6S_HG_H_ */
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@ -0,0 +1,11 @@
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#ifndef HW_A50S_V22_12S_H_
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#define HW_A50S_V22_12S_H_
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#define HW_A50S_12S
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#define HW_NAME "a50s_12s"
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#define CURRENT_AMP_GAIN 20.0
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#include "hw_a50s_v22_core.h"
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#endif /* HW_A50S_V22_12S_H_ */
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@ -0,0 +1,11 @@
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#ifndef HW_A50S_V22_12S_H_
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#define HW_A50S_V22_12S_H_
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#define HW_A50S_12S
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#define HW_NAME "a50s_12s_hg"
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#define CURRENT_AMP_GAIN 50.0
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#include "hw_a50s_v22_core.h"
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#endif /* HW_A50S_V22_12S_HG_H_ */
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@ -0,0 +1,11 @@
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#ifndef HW_A50S_V22_6S_H_
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#define HW_A50S_V22_6S_H_
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#define HW_A50S_6S
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#define HW_NAME "a50s_6s"
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#define CURRENT_AMP_GAIN 20.0
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#include "hw_a50s_v22_core.h"
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#endif /* HW_A50S_V22_6S_H_ */
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@ -0,0 +1,11 @@
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#ifndef HW_A50S_V22_6S_H_
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#define HW_A50S_V22_6S_H_
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#define HW_A50S_6S
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#define HW_NAME "a50s_6s_hg"
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#define CURRENT_AMP_GAIN 50.0
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#include "hw_a50s_v22_core.h"
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#endif /* HW_A50S_V22_6S_HG_H_ */
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@ -17,8 +17,8 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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*/
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#ifndef HW_A50S_CORE_H_
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#ifndef HW_A50S_V22_CORE_H_
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#define HW_A50S_CORE_H_
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#define HW_A50S_V22_CORE_H_
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// HW properties
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// HW properties
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#define HW_USE_INTERNAL_RC
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#define HW_USE_INTERNAL_RC
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@ -269,4 +269,4 @@
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// HW-specific functions
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// HW-specific functions
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void hw_a50s_trim_hsi(void);
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void hw_a50s_trim_hsi(void);
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#endif /* HW_A50S_CORE_H_ */
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#endif /* HW_A50S_V22_CORE_H_ */
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@ -0,0 +1,12 @@
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#ifndef HW_A50S_V23_12S_H_
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#define HW_A50S_V23_12S_H_
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#define HW_A50S_12S
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#define HW_NAME "a50s_v23_12s"
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#include "hw_a50s_v23_core.h"
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#endif /* HW_A50S_V23_12S_H_ */
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@ -0,0 +1,12 @@
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#ifndef HW_A50S_V23_20S_H_
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#define HW_A50S_V23_20S_H_
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#define HW_A50S_20S
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#define HW_NAME "a50s_v23_20s"
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#include "hw_a50s_v23_core.h"
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#endif /* HW_A50S_V23_20S_H_ */
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@ -0,0 +1,10 @@
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#ifndef HW_A50S_V23_6S_H_
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#define HW_A50S_V23_6S_H_
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#define HW_A50S_6S
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#define HW_NAME "a50s_v23_6s"
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#include "hw_a50s_v23_core.h"
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#endif /* HW_A50S_V23_6S_H_ */
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@ -0,0 +1,218 @@
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/*
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Copyright 2018 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "utils_math.h"
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#include <math.h>
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#include "mc_interface.h"
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#include "stm32f4xx_rcc.h"
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// Variables
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static volatile bool i2c_running = false;
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// I2C configuration
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static const I2CConfig i2cfg = {
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OPMODE_I2C,
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100000,
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STD_DUTY_CYCLE
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};
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void hw_init_gpio(void) {
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// GPIO clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOH, ENABLE);
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// LEDs
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palSetPadMode(GPIOB, 0, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOB, 1, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
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palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Hall sensors
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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// Phase filters
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palSetPadMode(GPIOC, 2, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOC, 14, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOC, 15, PAL_MODE_OUTPUT_OPENDRAIN | PAL_STM32_OSPEED_HIGHEST);
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PHASE_FILTER_OFF();
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// ADC Pins
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
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}
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void hw_setup_adc_channels(void) {
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// ADC1 regular channels
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ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); // 0 - ADC_IND_CURR1
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 2, ADC_SampleTime_15Cycles); // 3 - ADC_IND_SENS3
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles); // 6 - ADC_IND_EXT
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ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles); // 9 - ADC_IND_TEMP_MOTOR
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// ADC2 regular channels
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ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); // 1 - ADC_IND_CURR3
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 2, ADC_SampleTime_15Cycles); // 4 - ADC_IND_SENS2
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ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles); // 7 - ADC_IND_EXT2
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ADC_RegularChannelConfig(ADC2, ADC_Channel_Vrefint, 4, ADC_SampleTime_15Cycles); // 10 - ADC_IND_VREFINT
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// ADC3 regular channels
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ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 1, ADC_SampleTime_15Cycles); // 2 - ADC_IND_VIN_SENS
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 2, ADC_SampleTime_15Cycles); // 5 - ADC_IND_SENS1
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ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles); // 8 - ADC_IND_TEMP_MOS
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ADC_RegularChannelConfig(ADC3, ADC_Channel_15, 4, ADC_SampleTime_15Cycles); // 11 - UNUSED
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// Injected channels
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles); // ADC_IND_CURR1
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles); // ADC_IND_CURR2
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}
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void hw_start_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (!i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2c_running = true;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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void hw_stop_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
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i2cStop(&HW_I2C_DEV);
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i2c_running = false;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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/**
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* Try to restore the i2c bus
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*/
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void hw_try_restore_i2c(void) {
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if (i2c_running) {
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i2cAcquireBus(&HW_I2C_DEV);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
|
||||||
|
chThdSleep(1);
|
||||||
|
|
||||||
|
for(int i = 0;i < 16;i++) {
|
||||||
|
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
}
|
||||||
|
|
||||||
|
// Generate start then stop condition
|
||||||
|
palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
|
||||||
|
chThdSleep(1);
|
||||||
|
palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
|
||||||
|
PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
|
||||||
|
PAL_STM32_OTYPE_OPENDRAIN |
|
||||||
|
PAL_STM32_OSPEED_MID1 |
|
||||||
|
PAL_STM32_PUDR_PULLUP);
|
||||||
|
|
||||||
|
HW_I2C_DEV.state = I2C_STOP;
|
||||||
|
i2cStart(&HW_I2C_DEV, &i2cfg);
|
||||||
|
|
||||||
|
i2cReleaseBus(&HW_I2C_DEV);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,239 @@
|
||||||
|
/*
|
||||||
|
Copyright 2018 Benjamin Vedder benjamin@vedder.se
|
||||||
|
|
||||||
|
This file is part of the VESC firmware.
|
||||||
|
|
||||||
|
The VESC firmware is free software: you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation, either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
The VESC firmware is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HW_A50S_V23_CORE_H_
|
||||||
|
#define HW_A50S_V23_CORE_H_
|
||||||
|
|
||||||
|
// HW properties
|
||||||
|
#define HW_HAS_PHASE_FILTERS
|
||||||
|
#define HW_USE_25MHZ_EXT_CLOCK
|
||||||
|
|
||||||
|
|
||||||
|
// Macros
|
||||||
|
/*
|
||||||
|
* ADC Vector
|
||||||
|
*
|
||||||
|
* 0 (1): IN10 CURR3
|
||||||
|
* 1 (2): IN11 CURR1
|
||||||
|
* 2 (3): IN13 AN_IN
|
||||||
|
* 3 (1): IN0 SENS1
|
||||||
|
* 4 (2): IN1 SENS2
|
||||||
|
* 5 (3): IN2 SENS3
|
||||||
|
* 6 (1): IN5 ADC_EXT1
|
||||||
|
* 7 (2): IN6 ADC_EXT2
|
||||||
|
* 8 (3): IN3 TEMP_MOS
|
||||||
|
* 9 (1): IN14 TEMP_MOTOR
|
||||||
|
* 10 (2): Vrefint
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define HW_ADC_CHANNELS 12
|
||||||
|
#define HW_ADC_INJ_CHANNELS 2
|
||||||
|
#define HW_ADC_NBR_CONV 4
|
||||||
|
|
||||||
|
// ADC Indexes
|
||||||
|
#define ADC_IND_SENS1 3
|
||||||
|
#define ADC_IND_SENS2 4
|
||||||
|
#define ADC_IND_SENS3 5
|
||||||
|
#define ADC_IND_CURR1 1
|
||||||
|
#define ADC_IND_CURR2 0
|
||||||
|
#define ADC_IND_VIN_SENS 2
|
||||||
|
#define ADC_IND_EXT 6
|
||||||
|
#define ADC_IND_EXT2 7
|
||||||
|
#define ADC_IND_TEMP_MOS 8
|
||||||
|
#define ADC_IND_TEMP_MOTOR 9
|
||||||
|
#define ADC_IND_VREFINT 11
|
||||||
|
|
||||||
|
// ADC macros and settings
|
||||||
|
|
||||||
|
// Component parameters (can be overridden)
|
||||||
|
#ifndef V_REG
|
||||||
|
#define V_REG 3.30
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R1
|
||||||
|
#define VIN_R1 68000.0
|
||||||
|
#endif
|
||||||
|
#ifndef VIN_R2
|
||||||
|
#define VIN_R2 2200.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_AMP_GAIN
|
||||||
|
#define CURRENT_AMP_GAIN 20.0
|
||||||
|
#endif
|
||||||
|
#ifndef CURRENT_SHUNT_RES
|
||||||
|
#define CURRENT_SHUNT_RES 0.0005
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Input voltage
|
||||||
|
#define GET_INPUT_VOLTAGE() ((V_REG / 4095.0) * (float)ADC_Value[ADC_IND_VIN_SENS] * ((VIN_R1 + VIN_R2) / VIN_R2))
|
||||||
|
|
||||||
|
// NTC Termistors
|
||||||
|
#define NTC_RES(adc_val) ((4095.0 * 10000.0) / adc_val - 10000.0)
|
||||||
|
#define NTC_TEMP(adc_ind) (1.0 / ((logf(NTC_RES(ADC_Value[adc_ind]) / 10000.0) / 3380.0) + (1.0 / 298.15)) - 273.15)
|
||||||
|
|
||||||
|
#define NTC_RES_MOTOR(adc_val) (10000.0 / ((4095.0 / (float)adc_val) - 1.0)) // Motor temp sensor on low side
|
||||||
|
#define NTC_TEMP_MOTOR(beta) (1.0 / ((logf(NTC_RES_MOTOR(ADC_Value[ADC_IND_TEMP_MOTOR]) / 10000.0) / beta) + (1.0 / 298.15)) - 273.15)
|
||||||
|
|
||||||
|
// Voltage on ADC channel
|
||||||
|
#define ADC_VOLTS(ch) ((float)ADC_Value[ch] / 4096.0 * V_REG)
|
||||||
|
|
||||||
|
// LEDs
|
||||||
|
#define LED_GREEN_GPIO GPIOB
|
||||||
|
#define LED_GREEN_PIN 0
|
||||||
|
#define LED_RED_GPIO GPIOB
|
||||||
|
#define LED_RED_PIN 1
|
||||||
|
|
||||||
|
#define LED_GREEN_ON() palSetPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||||
|
#define LED_GREEN_OFF() palClearPad(LED_GREEN_GPIO, LED_GREEN_PIN)
|
||||||
|
#define LED_RED_ON() palSetPad(LED_RED_GPIO, LED_RED_PIN)
|
||||||
|
#define LED_RED_OFF() palClearPad(LED_RED_GPIO, LED_RED_PIN)
|
||||||
|
|
||||||
|
// Phase filter
|
||||||
|
#define PHASE_FILTER_OFF() palSetPad(GPIOC, 2); palSetPad(GPIOC, 14); palSetPad(GPIOC, 15)
|
||||||
|
#define PHASE_FILTER_ON() palClearPad(GPIOC, 2); palClearPad(GPIOC, 14); palClearPad(GPIOC, 15)
|
||||||
|
|
||||||
|
// COMM-port ADC GPIOs
|
||||||
|
#define HW_ADC_EXT_GPIO GPIOA
|
||||||
|
#define HW_ADC_EXT_PIN 5
|
||||||
|
#define HW_ADC_EXT2_GPIO GPIOA
|
||||||
|
#define HW_ADC_EXT2_PIN 6
|
||||||
|
|
||||||
|
// UART Peripheral
|
||||||
|
#define HW_UART_DEV SD3
|
||||||
|
#define HW_UART_GPIO_AF GPIO_AF_USART3
|
||||||
|
#define HW_UART_TX_PORT GPIOB
|
||||||
|
#define HW_UART_TX_PIN 10
|
||||||
|
#define HW_UART_RX_PORT GPIOB
|
||||||
|
#define HW_UART_RX_PIN 11
|
||||||
|
|
||||||
|
// SPI pins
|
||||||
|
#define HW_SPI_DEV SPID1
|
||||||
|
#define HW_SPI_GPIO_AF GPIO_AF_SPI1
|
||||||
|
#define HW_SPI_PORT_NSS GPIOB
|
||||||
|
#define HW_SPI_PIN_NSS 11
|
||||||
|
#define HW_SPI_PORT_SCK GPIOA
|
||||||
|
#define HW_SPI_PIN_SCK 5
|
||||||
|
#define HW_SPI_PORT_MOSI GPIOA
|
||||||
|
#define HW_SPI_PIN_MOSI 7
|
||||||
|
#define HW_SPI_PORT_MISO GPIOA
|
||||||
|
#define HW_SPI_PIN_MISO 6
|
||||||
|
|
||||||
|
// I2C Peripheral
|
||||||
|
#define HW_I2C_DEV I2CD2
|
||||||
|
#define HW_I2C_GPIO_AF GPIO_AF_I2C2
|
||||||
|
#define HW_I2C_SCL_PORT GPIOB
|
||||||
|
#define HW_I2C_SCL_PIN 10
|
||||||
|
#define HW_I2C_SDA_PORT GPIOB
|
||||||
|
#define HW_I2C_SDA_PIN 11
|
||||||
|
|
||||||
|
// Hall/encoder pins
|
||||||
|
#define HW_HALL_ENC_GPIO1 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN1 6
|
||||||
|
#define HW_HALL_ENC_GPIO2 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN2 7
|
||||||
|
#define HW_HALL_ENC_GPIO3 GPIOC
|
||||||
|
#define HW_HALL_ENC_PIN3 8
|
||||||
|
#define HW_ENC_TIM TIM3
|
||||||
|
#define HW_ENC_TIM_AF GPIO_AF_TIM3
|
||||||
|
#define HW_ENC_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE)
|
||||||
|
#define HW_ENC_EXTI_PORTSRC EXTI_PortSourceGPIOC
|
||||||
|
#define HW_ENC_EXTI_PINSRC EXTI_PinSource8
|
||||||
|
#define HW_ENC_EXTI_CH EXTI9_5_IRQn
|
||||||
|
#define HW_ENC_EXTI_LINE EXTI_Line8
|
||||||
|
#define HW_ENC_EXTI_ISR_VEC EXTI9_5_IRQHandler
|
||||||
|
#define HW_ENC_TIM_ISR_CH TIM3_IRQn
|
||||||
|
#define HW_ENC_TIM_ISR_VEC TIM3_IRQHandler
|
||||||
|
|
||||||
|
// ICU Peripheral for servo decoding
|
||||||
|
#define HW_USE_SERVO_TIM4
|
||||||
|
#define HW_ICU_TIMER TIM4
|
||||||
|
#define HW_ICU_TIM_CLK_EN() RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE)
|
||||||
|
#define HW_ICU_DEV ICUD4
|
||||||
|
#define HW_ICU_CHANNEL ICU_CHANNEL_1
|
||||||
|
#define HW_ICU_GPIO_AF GPIO_AF_TIM4
|
||||||
|
#define HW_ICU_GPIO GPIOB
|
||||||
|
#define HW_ICU_PIN 6
|
||||||
|
|
||||||
|
// Measurement macros
|
||||||
|
#define ADC_V_L1 ADC_Value[ADC_IND_SENS1]
|
||||||
|
#define ADC_V_L2 ADC_Value[ADC_IND_SENS2]
|
||||||
|
#define ADC_V_L3 ADC_Value[ADC_IND_SENS3]
|
||||||
|
#define ADC_V_ZERO (ADC_Value[ADC_IND_VIN_SENS] / 2)
|
||||||
|
|
||||||
|
// Macros
|
||||||
|
#define READ_HALL1() palReadPad(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1)
|
||||||
|
#define READ_HALL2() palReadPad(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2)
|
||||||
|
#define READ_HALL3() palReadPad(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3)
|
||||||
|
|
||||||
|
// Override dead time. See the stm32f4 reference manual for calculating this value.
|
||||||
|
#define HW_DEAD_TIME_NSEC 0.0 // FD6288Q has 200ns built in deadtime
|
||||||
|
|
||||||
|
// Default setting overrides
|
||||||
|
#ifndef MCCONF_L_MIN_VOLTAGE
|
||||||
|
#define MCCONF_L_MIN_VOLTAGE 8.0 // Minimum input voltage
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_DEFAULT_MOTOR_TYPE
|
||||||
|
#define MCCONF_DEFAULT_MOTOR_TYPE MOTOR_TYPE_FOC
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_FOC_F_ZV
|
||||||
|
#define MCCONF_FOC_F_ZV 25000.0 // Switching frequency reduced to allow rise time of low side shunts
|
||||||
|
#endif
|
||||||
|
#define HW_LIM_FOC_CTRL_LOOP_FREQ 5000.0, 25000.0 //Limit to 50kHz max
|
||||||
|
#ifndef MCCONF_L_MAX_ABS_CURRENT
|
||||||
|
#define MCCONF_L_MAX_ABS_CURRENT 50.0 // The maximum absolute current above which a fault is generated
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_FOC_SAMPLE_V0_V7
|
||||||
|
#define MCCONF_FOC_SAMPLE_V0_V7 false // Run control loop in both v0 and v7 (requires phase shunts)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_CURRENT_MAX
|
||||||
|
#define MCCONF_L_CURRENT_MAX 20.0 // Current limit in Amperes (Upper)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_CURRENT_MIN
|
||||||
|
#define MCCONF_L_CURRENT_MIN -20.0 // Current limit in Amperes (Lower)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_IN_CURRENT_MAX
|
||||||
|
#define MCCONF_L_IN_CURRENT_MAX 20.0 // Input current limit in Amperes (Upper)
|
||||||
|
#endif
|
||||||
|
#ifndef MCCONF_L_IN_CURRENT_MIN
|
||||||
|
#define MCCONF_L_IN_CURRENT_MIN -10.0 // Input current limit in Amperes (Lower)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// Setting limits
|
||||||
|
#define HW_LIM_CURRENT -85.0, 85.0
|
||||||
|
#define HW_LIM_CURRENT_IN -40.0, 40.0
|
||||||
|
#define HW_LIM_CURRENT_ABS 0.0, 150.0
|
||||||
|
#define HW_LIM_ERPM -200e3, 200e3
|
||||||
|
#define HW_LIM_DUTY_MIN 0.0, 0.1
|
||||||
|
#define HW_LIM_DUTY_MAX 0.0, 0.98
|
||||||
|
#define HW_LIM_TEMP_FET -40.0, 100.0
|
||||||
|
|
||||||
|
|
||||||
|
#ifdef HW_A50S_20S
|
||||||
|
#define HW_LIM_VIN 4.0, 90.0
|
||||||
|
#define MCCONF_L_MAX_VOLTAGE 86 // Maximum input voltage
|
||||||
|
#elif defined (HW_A50S_12S)
|
||||||
|
#define HW_LIM_VIN 4.0, 56.0
|
||||||
|
#define MCCONF_L_MAX_VOLTAGE 55 // Maximum input voltage
|
||||||
|
#elif defined (HW_A50S_6S)
|
||||||
|
#define HW_LIM_VIN 4.0, 28.0
|
||||||
|
#define MCCONF_L_MAX_VOLTAGE 26 // Maximum input voltage
|
||||||
|
#else
|
||||||
|
#error "Must define a hardware type"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
#endif /* HW_A50S_V23_CORE_H_ */
|
||||||
|
|
@ -52,10 +52,13 @@ package_dict["HD60"] = [['hd60', default_name],
|
||||||
['hd60_no_limits', no_limits_name]]
|
['hd60_no_limits', no_limits_name]]
|
||||||
package_dict["HD75"] = [['hd75', default_name],
|
package_dict["HD75"] = [['hd75', default_name],
|
||||||
['hd75_no_limits', no_limits_name]]
|
['hd75_no_limits', no_limits_name]]
|
||||||
package_dict["A50S_6S"] = [['a50s_6s', default_name]]
|
package_dict["A50S_6S"] = [['a50s_v22_6s', default_name]]
|
||||||
package_dict["A50S_6S_HG"] = [['a50s_6s_hg', default_name]]
|
package_dict["A50S_6S_HG"] = [['a50s_v22_6s_hg', default_name]]
|
||||||
package_dict["A50S_12S"] = [['a50s_12s', default_name]]
|
package_dict["A50S_12S"] = [['a50s_v22_12s', default_name]]
|
||||||
package_dict["A50S_12S_HG"] = [['a50s_12s_hg', default_name]]
|
package_dict["A50S_12S_HG"] = [['a50s_v22_12s_hg', default_name]]
|
||||||
|
package_dict["A50S_V23_6S"] = [['a50s_v23_6s', default_name]]
|
||||||
|
package_dict["A50S_V23_12S"] = [['a50s_v23_12s', default_name]]
|
||||||
|
package_dict["A50S_V23_20S"] = [['a50s_v23_20s', default_name]]
|
||||||
package_dict["A200S_V2.1"] = [['a200s_v2.1', default_name]]
|
package_dict["A200S_V2.1"] = [['a200s_v2.1', default_name]]
|
||||||
package_dict["A200S_V2.2"] = [['a200s_v2.2', default_name]]
|
package_dict["A200S_V2.2"] = [['a200s_v2.2', default_name]]
|
||||||
package_dict["A200S_V3"] = [['a200s_v3', default_name]]
|
package_dict["A200S_V3"] = [['a200s_v3', default_name]]
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue