mirror of https://github.com/rusefi/bldc.git
Some fixes after the merge
This commit is contained in:
parent
a546cc4dd5
commit
c76942009b
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@ -11,7 +11,7 @@
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An open source motor controller firmware.
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This is the source code for the VESC DC/BLDC/FOC controller. Read more at
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[http://vesc-project.com/](http://vesc-project.com/)
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[https://vesc-project.com/](https://vesc-project.com/)
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## Supported boards
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@ -7,7 +7,7 @@ DIR=$( cd "$( dirname "${BASH_SOURCE[0]}" )" && pwd )
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################## HW 46 & 47 #######################
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COPYDIR=46_o_47
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -54,7 +54,7 @@ cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_servoout.bin
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#################### HW 48 ########################
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COPYDIR=48
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -87,7 +87,7 @@ cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_servoout.bin
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#################### HW 410 & 411 & 412 ########################
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COPYDIR=410_o_411_o_412
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -127,7 +127,7 @@ cp $FWPATH/build/BLDC_4_ChibiOS.bin $COPYDIR/VESC_servoout.bin
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#################### HW 60 ########################
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COPYDIR=60
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -165,7 +165,7 @@ cd $DIR
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#################### HW DAS_RS ########################
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COPYDIR=DAS_RS
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -182,7 +182,7 @@ cd $DIR
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#################### HW 75_300 ########################
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COPYDIR=75_300
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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@ -220,7 +220,7 @@ cd $DIR
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#################### HW PALTA ########################
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COPYDIR=PALTA
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rm $COPYDIR/*
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rm -f $COPYDIR/*
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# default
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cd $FWPATH
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20
commands.c
20
commands.c
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@ -51,7 +51,7 @@ static THD_WORKING_AREA(detect_thread_wa, 2048);
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static thread_t *detect_tp;
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// Private variables
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static uint8_t send_buffer[PACKET_MAX_PL_LEN];
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static uint8_t send_buffer_global[PACKET_MAX_PL_LEN];
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static uint8_t detect_thread_cmd_buffer[50];
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static volatile bool is_detecting = false;
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static void(* volatile send_func)(unsigned char *data, unsigned int len) = 0;
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@ -129,6 +129,7 @@ void commands_process_packet(unsigned char *data, unsigned int len) {
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int32_t ind = 0;
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static mc_configuration mcconf; // Static to save some stack space
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static app_configuration appconf;
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uint8_t *send_buffer = send_buffer_global;
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packet_id = data[0];
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data++;
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@ -472,6 +473,7 @@ void commands_process_packet(unsigned char *data, unsigned int len) {
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mcconf.m_dc_f_sw = buffer_get_float32_auto(data, &ind);
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mcconf.m_ntc_motor_beta = buffer_get_float32_auto(data, &ind);
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mcconf.m_out_aux_mode = data[ind++];
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mcconf.si_motor_poles = data[ind++];
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mcconf.si_gear_ratio = buffer_get_float32_auto(data, &ind);
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mcconf.si_wheel_diameter = buffer_get_float32_auto(data, &ind);
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@ -1083,21 +1085,23 @@ void commands_set_app_data_handler(void(*func)(unsigned char *data, unsigned int
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void commands_send_app_data(unsigned char *data, unsigned int len) {
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int32_t index = 0;
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send_buffer[index++] = COMM_CUSTOM_APP_DATA;
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memcpy(send_buffer + index, data, len);
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send_buffer_global[index++] = COMM_CUSTOM_APP_DATA;
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memcpy(send_buffer_global + index, data, len);
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index += len;
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commands_send_packet(send_buffer, index);
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commands_send_packet(send_buffer_global, index);
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}
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void commands_send_gpd_buffer_notify(void) {
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int32_t index = 0;
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send_buffer[index++] = COMM_GPD_BUFFER_NOTIFY;
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commands_send_packet(send_buffer, index);
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send_buffer_global[index++] = COMM_GPD_BUFFER_NOTIFY;
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commands_send_packet(send_buffer_global, index);
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}
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void commands_send_mcconf(COMM_PACKET_ID packet_id, mc_configuration *mcconf) {
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int32_t ind = 0;
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uint8_t *send_buffer = send_buffer_global;
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send_buffer[ind++] = packet_id;
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send_buffer[ind++] = mcconf->pwm_mode;
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@ -1226,6 +1230,8 @@ void commands_send_mcconf(COMM_PACKET_ID packet_id, mc_configuration *mcconf) {
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void commands_send_appconf(COMM_PACKET_ID packet_id, app_configuration *appconf) {
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int32_t ind = 0;
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uint8_t *send_buffer = send_buffer_global;
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send_buffer[ind++] = packet_id;
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send_buffer[ind++] = appconf->controller_id;
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buffer_append_uint32(send_buffer, appconf->timeout_msec, &ind);
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detect_coupling_k = 0.0;
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}
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int32_t ind = 0;
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ind = 0;
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send_buffer[ind++] = COMM_DETECT_MOTOR_PARAM;
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buffer_append_int32(send_buffer, (int32_t)(detect_cycle_int_limit * 1000.0), &ind);
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buffer_append_int32(send_buffer, (int32_t)(detect_coupling_k * 1000.0), &ind);
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@ -806,34 +806,32 @@ bool conf_general_measure_flux_linkage(float current, float duty,
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/* Calculate DTG register */
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uint8_t conf_general_calculate_deadtime(float deadtime_ns, float core_clock_freq) {
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uint8_t DTG = 0;
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float timebase = 1/(core_clock_freq/1000000.0)*1000.0;
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float timebase = 1.0 / (core_clock_freq / 1000000.0) * 1000.0;
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if (deadtime_ns <= (timebase * 127.0) )
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DTG = deadtime_ns / timebase;
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else {
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if (deadtime_ns <= ((63.0 + 64.0)*2.0*timebase) ) {
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DTG = deadtime_ns / (2.0*timebase) - 64.0;
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DTG |= 0x80;
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}
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else {
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if (deadtime_ns <= ((31.0 + 32.0)*8.0*timebase) ) {
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DTG = deadtime_ns / (8.0*timebase) - 32.0;
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DTG |= 0xC0;
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}
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else {
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if (deadtime_ns <= ((31.0 + 32)*16*timebase) ) {
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DTG = deadtime_ns / (16.0*timebase) - 32.0;
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DTG |= 0xE0;
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}
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else {
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// Deadtime requested is longer than max achievable. Set deadtime at
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// longest possible value
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DTG = 0xFF;
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assert_param(1); //catch this
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}
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}
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}
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if (deadtime_ns <= (timebase * 127.0)) {
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DTG = deadtime_ns / timebase;
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} else {
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if (deadtime_ns <= ((63.0 + 64.0) * 2.0 * timebase)) {
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DTG = deadtime_ns / (2.0 * timebase) - 64.0;
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DTG |= 0x80;
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} else {
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if (deadtime_ns <= ((31.0 + 32.0) * 8.0 * timebase)) {
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DTG = deadtime_ns / (8.0 * timebase) - 32.0;
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DTG |= 0xC0;
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} else {
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if (deadtime_ns <= ((31.0 + 32) * 16 * timebase)) {
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DTG = deadtime_ns / (16.0 * timebase) - 32.0;
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DTG |= 0xE0;
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} else {
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// Deadtime requested is longer than max achievable. Set deadtime at
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// longest possible value
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DTG = 0xFF;
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assert_param(1); //catch this
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}
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}
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}
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}
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return DTG;
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}
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float vd_avg = 0.0;
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float iq_avg = 0.0;
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float id_avg = 0.0;
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float samples = 0.0;
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float samples2 = 0.0;
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for (int i = 0;i < 1000;i++) {
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vq_avg += mcpwm_foc_get_vq();
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vd_avg += mcpwm_foc_get_vd();
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iq_avg += mcpwm_foc_get_iq();
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id_avg += mcpwm_foc_get_id();
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samples += 1.0;
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samples2 += 1.0;
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chThdSleepMilliseconds(1);
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}
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vq_avg /= samples;
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vd_avg /= samples;
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iq_avg /= samples;
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id_avg /= samples;
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vq_avg /= samples2;
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vd_avg /= samples2;
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iq_avg /= samples2;
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id_avg /= samples2;
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*linkage = (sqrtf(SQ(vq_avg) + SQ(vd_avg)) - res *
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sqrtf(SQ(iq_avg) + SQ(id_avg))) / (rpm_now * ((2.0 * M_PI) / 60.0));
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@ -70,8 +70,8 @@
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//#define HW_SOURCE "hw_410.c" // Also for 4.11 and 4.12
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//#define HW_HEADER "hw_410.h" // Also for 4.11 and 4.12
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//#define HW_SOURCE "hw_60.c"
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//#define HW_HEADER "hw_60.h"
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#define HW_SOURCE "hw_60.c"
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#define HW_HEADER "hw_60.h"
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//#define HW_SOURCE "hw_r2.c"
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//#define HW_HEADER "hw_r2.h"
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//#define HW_SOURCE "hw_das_rs.c"
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//#define HW_HEADER "hw_das_rs.h"
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#define HW_SOURCE "hw_palta.c"
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#define HW_HEADER "hw_palta.h"
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//#define HW_SOURCE "hw_palta.c"
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//#define HW_HEADER "hw_palta.h"
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//#define HW_SOURCE "hw_rh.c"
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//#define HW_HEADER "hw_rh.h"
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@ -71,4 +71,3 @@ CH_IRQ_HANDLER(PVD_IRQHandler) {
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EXTI_ClearFlag(EXTI_Line16);
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}
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}
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23
mcpwm_foc.c
23
mcpwm_foc.c
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@ -450,8 +450,9 @@ void mcpwm_foc_init(volatile mc_configuration *configuration) {
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chThdCreateStatic(timer_thread_wa, sizeof(timer_thread_wa), NORMALPRIO, timer_thread, NULL);
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// Check if the system has resumed from IWDG reset
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if (timeout_had_IWDG_reset())
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if (timeout_had_IWDG_reset()) {
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mc_interface_fault_stop(FAULT_CODE_BOOTING_FROM_WATCHDOG_RESET);
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}
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m_init_done = true;
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}
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}
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}
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i_last = (m_conf->l_current_max / 2.0);
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if (i_last < 0.01) {
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i_last = (m_conf->l_current_max / 2.0);
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}
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*res = mcpwm_foc_measure_resistance(i_last, 200);
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*ind = mcpwm_foc_measure_inductance_current(i_last, 200, 0);
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@ -1565,10 +1568,11 @@ void mcpwm_foc_adc_int_handler(void *p, uint32_t flags) {
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(void)flags;
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static int skip = 0;
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if (++skip == FOC_CONTROL_LOOP_FREQ_DIVIDER)
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if (++skip == FOC_CONTROL_LOOP_FREQ_DIVIDER) {
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skip = 0;
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else
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} else {
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return;
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}
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TIM12->CNT = 0;
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@ -1734,9 +1738,14 @@ void mcpwm_foc_adc_int_handler(void *p, uint32_t flags) {
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dt = 1.0 / (m_conf->foc_f_sw / 2.0);
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}
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#else
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const float dt = 1.0 / (m_conf->foc_f_sw / 2.0);
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float dt = 1.0 / (m_conf->foc_f_sw / 2.0);
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#endif
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// This has to be done for the skip function to have any chance at working with the
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// observer and control loops.
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// TODO: Test this.
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dt /= (float)FOC_CONTROL_LOOP_FREQ_DIVIDER;
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UTILS_LP_FAST(m_motor_state.v_bus, GET_INPUT_VOLTAGE(), 0.1);
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float enc_ang = 0;
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@ -1957,8 +1966,8 @@ void mcpwm_foc_adc_int_handler(void *p, uint32_t flags) {
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float x_tmp = m_motor_state.v_alpha;
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float y_tmp = m_motor_state.v_beta;
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m_motor_state.v_alpha = x_tmp*COS_MINUS_30_DEG - y_tmp*SIN_MINUS_30_DEG;
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m_motor_state.v_beta = x_tmp*SIN_MINUS_30_DEG + y_tmp*COS_MINUS_30_DEG;
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m_motor_state.v_alpha = x_tmp * COS_MINUS_30_DEG - y_tmp * SIN_MINUS_30_DEG;
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m_motor_state.v_beta = x_tmp * SIN_MINUS_30_DEG + y_tmp * COS_MINUS_30_DEG;
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// compensate voltage amplitude
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m_motor_state.v_alpha *= ONE_BY_SQRT3;
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104
timeout.c
104
timeout.c
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@ -117,61 +117,61 @@ void timeout_init_IWDT(void) {
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}
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void timeout_configure_IWDT_slowest(void) {
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0))
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{
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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// Unlock register
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
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// Update configuration
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IWDG_SetReload(1400);
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IWDG_SetPrescaler(IWDG_Prescaler_256);
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// Wait for the new configuration to be taken into account
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0))
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{
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0)) {
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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// Unlock register
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
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// Update configuration
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IWDG_SetReload(1400);
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IWDG_SetPrescaler(IWDG_Prescaler_256);
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// Wait for the new configuration to be taken into account
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0)) {
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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}
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void timeout_configure_IWDT(void) {
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0))
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{
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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// Unlock register
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
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// Update configuration
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IWDG_SetReload(140);
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IWDG_SetPrescaler(IWDG_Prescaler_4);
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// Wait for the new configuration to be taken into account
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0))
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{
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0)) {
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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// Unlock register
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IWDG_WriteAccessCmd(IWDG_WriteAccess_Enable);
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// Update configuration
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IWDG_SetReload(140);
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IWDG_SetPrescaler(IWDG_Prescaler_4);
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// Wait for the new configuration to be taken into account
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while(((IWDG->SR & IWDG_SR_RVU) != 0) || ((IWDG->SR & IWDG_SR_PVU) != 0)) {
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// Continue to kick the dog
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IWDG_ReloadCounter();
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}
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}
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bool timeout_had_IWDG_reset(void) {
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// Check if the system has resumed from IWDG reset
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if (RCC_GetFlagStatus(RCC_FLAG_IWDGRST) != RESET) {
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/* IWDGRST flag set */
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if (RCC_GetFlagStatus(RCC_FLAG_IWDGRST) != RESET) {
|
||||
/* IWDGRST flag set */
|
||||
/* Clear reset flags */
|
||||
RCC_ClearFlag();
|
||||
RCC_ClearFlag();
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
// Check if the system has resumed from WWDG reset
|
||||
if (RCC_GetFlagStatus(RCC_FLAG_WWDGRST) != RESET) {
|
||||
/* IWDGRST flag set */
|
||||
/* Clear reset flags */
|
||||
RCC_ClearFlag();
|
||||
return true;
|
||||
}
|
||||
// Check if the system has resumed from WWDG reset
|
||||
if (RCC_GetFlagStatus(RCC_FLAG_WWDGRST) != RESET) {
|
||||
/* IWDGRST flag set */
|
||||
/* Clear reset flags */
|
||||
RCC_ClearFlag();
|
||||
return true;
|
||||
}
|
||||
|
||||
return false;
|
||||
return false;
|
||||
}
|
||||
|
||||
static THD_FUNCTION(timeout_thread, arg) {
|
||||
|
@ -193,25 +193,27 @@ static THD_FUNCTION(timeout_thread, arg) {
|
|||
// Monitored threads (foc, can, timer) must report at least one iteration,
|
||||
// otherwise the watchdog won't be feed and MCU will reset. All threads should
|
||||
// be monitored
|
||||
if(feed_counter[THREAD_MCPWM] < MIN_THREAD_ITERATIONS)
|
||||
if(feed_counter[THREAD_MCPWM] < MIN_THREAD_ITERATIONS) {
|
||||
threads_ok = false;
|
||||
}
|
||||
#if CAN_ENABLE
|
||||
if(feed_counter[THREAD_CANBUS] < MIN_THREAD_ITERATIONS)
|
||||
if(feed_counter[THREAD_CANBUS] < MIN_THREAD_ITERATIONS) {
|
||||
threads_ok = false;
|
||||
}
|
||||
#endif
|
||||
if(feed_counter[THREAD_TIMER] < MIN_THREAD_ITERATIONS)
|
||||
if(feed_counter[THREAD_TIMER] < MIN_THREAD_ITERATIONS) {
|
||||
threads_ok = false;
|
||||
}
|
||||
|
||||
for( int i = 0; i < MAX_THREADS_MONITOR; i++)
|
||||
for( int i = 0; i < MAX_THREADS_MONITOR; i++) {
|
||||
feed_counter[i] = 0;
|
||||
}
|
||||
|
||||
if (threads_ok == true) {
|
||||
// Feed WDT's
|
||||
WWDG_SetCounter(127); // must reload in >6.24ms and <12.48ms
|
||||
IWDG_ReloadCounter(); // must reload in <12ms
|
||||
}
|
||||
else
|
||||
{
|
||||
} else {
|
||||
// not reloading the watchdog will produce a reset.
|
||||
// This can be checked from the GUI logs as
|
||||
// "FAULT_CODE_BOOTING_FROM_WATCHDOG_RESET"
|
||||
|
|
Loading…
Reference in New Issue