mirror of https://github.com/rusefi/bldc.git
289 lines
8.8 KiB
C
289 lines
8.8 KiB
C
/*
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Copyright 2019 Benjamin Vedder benjamin@vedder.se
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This program is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "utils.h"
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#include "drv8323s.h"
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#include "comm_can.h"
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#include "mc_interface.h"
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#include "commands.h"
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// Threads
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THD_FUNCTION(dac_thread, arg);
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static THD_WORKING_AREA(dac_thread_wa, 256);
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static bool dac_thread_running = false;
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// Variables
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static volatile bool i2c_running = false;
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// I2C configuration
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static const I2CConfig i2cfg = {
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OPMODE_I2C,
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100000,
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STD_DUTY_CYCLE
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};
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void hw_init_gpio(void) {
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// GPIO clock enable
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOB, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOC, ENABLE);
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOD, ENABLE);
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// LEDs
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palSetPadMode(GPIOB, 0,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(GPIOB, 1,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// ENABLE_GATE
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palSetPadMode(GPIOB, 5,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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// Disable BMI160
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palSetPadMode(GPIOA, 15,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palSetPad(GPIOA, 15);
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// Disable DCCAL
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palSetPadMode(GPIOD, 2,
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PAL_MODE_OUTPUT_PUSHPULL |
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PAL_STM32_OSPEED_HIGHEST);
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palClearPad(GPIOD, 2);
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ENABLE_GATE();
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// GPIOA Configuration: Channel 1 to 3 as alternate function push-pull
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palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 13, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 14, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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palSetPadMode(GPIOB, 15, PAL_MODE_ALTERNATE(GPIO_AF_TIM1) |
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PAL_STM32_OSPEED_HIGHEST |
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PAL_STM32_PUDR_FLOATING);
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// Hall sensors
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palSetPadMode(HW_HALL_ENC_GPIO1, HW_HALL_ENC_PIN1, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO2, HW_HALL_ENC_PIN2, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(HW_HALL_ENC_GPIO3, HW_HALL_ENC_PIN3, PAL_MODE_INPUT_PULLUP);
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// Fault pin
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palSetPadMode(GPIOB, 7, PAL_MODE_INPUT_PULLUP);
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// ADC Pins
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palSetPadMode(GPIOA, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 5, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOA, 6, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 0, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 1, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 2, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 3, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 4, PAL_MODE_INPUT_ANALOG);
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palSetPadMode(GPIOC, 5, PAL_MODE_INPUT_ANALOG);
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drv8323s_init();
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}
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void hw_setup_adc_channels(void) {
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// ADC1 regular channels
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ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_14, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC1, ADC_Channel_Vrefint, 5, ADC_SampleTime_15Cycles);
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// ADC2 regular channels
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ADC_RegularChannelConfig(ADC2, ADC_Channel_1, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_6, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_15, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC2, ADC_Channel_0, 5, ADC_SampleTime_15Cycles);
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// ADC3 regular channels
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ADC_RegularChannelConfig(ADC3, ADC_Channel_2, 1, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_3, 3, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_13, 4, ADC_SampleTime_15Cycles);
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ADC_RegularChannelConfig(ADC3, ADC_Channel_1, 5, ADC_SampleTime_15Cycles);
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// Injected channels
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 1, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 2, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC1, ADC_Channel_10, 3, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC2, ADC_Channel_11, 3, ADC_SampleTime_15Cycles);
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ADC_InjectedChannelConfig(ADC3, ADC_Channel_12, 3, ADC_SampleTime_15Cycles);
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if (!dac_thread_running) {
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chThdCreateStatic(dac_thread_wa, sizeof(dac_thread_wa), NORMALPRIO, dac_thread, NULL);
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dac_thread_running = true;
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}
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}
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void hw_start_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (!i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2c_running = true;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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void hw_stop_i2c(void) {
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i2cAcquireBus(&HW_I2C_DEV);
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if (i2c_running) {
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN, PAL_MODE_INPUT);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN, PAL_MODE_INPUT);
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i2cStop(&HW_I2C_DEV);
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i2c_running = false;
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}
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i2cReleaseBus(&HW_I2C_DEV);
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}
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/**
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* Try to restore the i2c bus
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*/
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void hw_try_restore_i2c(void) {
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if (i2c_running) {
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i2cAcquireBus(&HW_I2C_DEV);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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for(int i = 0;i < 16;i++) {
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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}
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// Generate start then stop condition
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palClearPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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chThdSleep(1);
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palClearPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN);
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chThdSleep(1);
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palSetPad(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN);
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palSetPadMode(HW_I2C_SCL_PORT, HW_I2C_SCL_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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palSetPadMode(HW_I2C_SDA_PORT, HW_I2C_SDA_PIN,
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PAL_MODE_ALTERNATE(HW_I2C_GPIO_AF) |
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PAL_STM32_OTYPE_OPENDRAIN |
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PAL_STM32_OSPEED_MID1 |
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PAL_STM32_PUDR_PULLUP);
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HW_I2C_DEV.state = I2C_STOP;
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i2cStart(&HW_I2C_DEV, &i2cfg);
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i2cReleaseBus(&HW_I2C_DEV);
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}
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}
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THD_FUNCTION(dac_thread, arg) {
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(void)arg;
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chRegSetThreadName("DAC");
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chThdSleepMilliseconds(3000);
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RCC_APB1PeriphClockCmd(RCC_APB1Periph_DAC, ENABLE);
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DAC->CR |= DAC_CR_EN2;
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//DAC->CR |= DAC_CR_BOFF2;
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const float current_scaling_factor = MAX_CURRENT_SUM / 4095.0;
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float current_sum = 0;
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for(;;) {
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current_sum = mc_interface_get_tot_current_in_filtered();
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current_sum += ADC_Value[ADC_IND_CURR_AUX]*FAC_CURRENT_AUX;
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for (int i = 0;i < CAN_STATUS_MSGS_TO_STORE;i++) {
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can_status_msg_4 *msg4 = comm_can_get_status_msg_4_index(i);
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if (msg4->id >= 0 && UTILS_AGE_S(msg4->rx_time) < 0.1) {
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current_sum += msg4->current_in;
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}
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}
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int scaled_current = (int)(round(current_sum/current_scaling_factor));
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//commands_printf("scaled current: %u, raw value: %f", scaled_current,ADC_Value[ADC_IND_CURR_AUX]*FAC_CURRENT_AUX);
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DAC->DHR12R2 = scaled_current;
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chThdSleepMilliseconds(100);
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}
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}
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