mirror of https://github.com/rusefi/bldc.git
430 lines
10 KiB
C
430 lines
10 KiB
C
/*
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Copyright 2016 Benjamin Vedder benjamin@vedder.se
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This file is part of the VESC firmware.
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The VESC firmware is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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The VESC firmware is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hw.h"
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#ifdef HW_HAS_DRV8320S
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#include "drv8320s.h"
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#include "ch.h"
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#include "hal.h"
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#include "stm32f4xx_conf.h"
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#include "utils.h"
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#include "terminal.h"
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#include "commands.h"
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#include <string.h>
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#include <stdio.h>
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// Private functions
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static uint16_t spi_exchange(uint16_t x);
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static void spi_transfer(uint16_t *in_buf, const uint16_t *out_buf, int length);
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static void spi_begin(void);
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static void spi_end(void);
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static void spi_delay(void);
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static void terminal_read_reg(int argc, const char **argv);
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static void terminal_write_reg(int argc, const char **argv);
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static void terminal_set_oc_adj(int argc, const char **argv);
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static void terminal_print_faults(int argc, const char **argv);
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static void terminal_reset_faults(int argc, const char **argv);
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// Private variables
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static char m_fault_print_buffer[120];
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void drv8320s_init(void) {
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// DRV8320S SPI
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palSetPadMode(DRV8320S_MISO_GPIO, DRV8320S_MISO_PIN, PAL_MODE_INPUT_PULLUP);
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palSetPadMode(DRV8320S_SCK_GPIO, DRV8320S_SCK_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(DRV8320S_CS_GPIO, DRV8320S_CS_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPadMode(DRV8320S_MOSI_GPIO, DRV8320S_MOSI_PIN, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
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palSetPad(DRV8320S_MOSI_GPIO, DRV8320S_MOSI_PIN);
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chThdSleepMilliseconds(100);
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// Disable OC
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drv8320s_write_reg(5, 0x04C0);
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drv8320s_write_reg(5, 0x04C0);
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terminal_register_command_callback(
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"drv8320s_read_reg",
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"Read a register from the DRV8320S and print it.",
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"[reg]",
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terminal_read_reg);
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terminal_register_command_callback(
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"drv8320s_write_reg",
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"Write to a DRV8320S register.",
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"[reg] [hexvalue]",
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terminal_write_reg);
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terminal_register_command_callback(
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"drv8320s_set_oc_adj",
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"Set the DRV8320S OC ADJ register.",
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"[value]",
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terminal_set_oc_adj);
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terminal_register_command_callback(
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"drv8320s_print_faults",
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"Print all current DRV8320S faults.",
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0,
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terminal_print_faults);
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terminal_register_command_callback(
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"drv8320s_reset_faults",
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"Reset all latched DRV8320S faults.",
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0,
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terminal_reset_faults);
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}
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/**
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* Set the threshold of the over current protection of the DRV8320S. It works by measuring
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* the voltage drop across drain-source of the MOSFETs and activates when it is higher than
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* a set value. Notice that this current limit is not very accurate.
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*
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* @param val
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* The value to use. Range [0 15]. A lower value corresponds to a lower current limit. See
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* the drv8320 datasheet for how to convert these values to currents.
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*/
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void drv8320s_set_oc_adj(int val) {
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// Match with the drv8301 levels
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val >>= 1;
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int reg = drv8320s_read_reg(5);
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reg &= 0xFFF0;
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reg |= (val & 0xF);
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drv8320s_write_reg(5, reg);
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}
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/**
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* Set the over current protection mode of the DRV8320S.
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*
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* @param mode
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* The over current protection mode.
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*/
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void drv8320s_set_oc_mode(drv8301_oc_mode mode) {
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// Match with the drv8301 modes
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if (mode == DRV8301_OC_LATCH_SHUTDOWN) {
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mode = DRV8301_OC_LIMIT;
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} else if (mode == DRV8301_OC_LIMIT) {
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mode = DRV8301_OC_LATCH_SHUTDOWN;
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}
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int reg = drv8320s_read_reg(5);
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reg &= 0xFF3F;
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reg |= (mode & 0x03) << 6;
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drv8320s_write_reg(5, reg);
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}
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/**
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* Read the fault codes of the DRV8320S.
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*
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* @return
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* The fault codes, where the bits represent the following:
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* b0: FETLC_OC
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* b1: FETHC_OC
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* b2: FETLB_OC
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* b3: FETHB_OC
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* b4: FETLA_OC
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* b5: FETHA_OC
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* b6: OTW
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* b7: OTSD
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* b8: PVDD_UV
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* b9: GVDD_UV
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* b10: FAULT
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* b11: GVDD_OV
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*
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*/
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unsigned long drv8320s_read_faults(void) {
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unsigned long r0 = drv8320s_read_reg(0);
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int r1 = drv8320s_read_reg(1);
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return r0 | (r1 << 16);
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}
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/**
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* Reset all latched faults.
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*/
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void drv8320s_reset_faults(void) {
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int reg = drv8320s_read_reg(2);
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reg |= 1;
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drv8320s_write_reg(2, reg);
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}
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char* drv8320s_faults_to_string(unsigned long faults) {
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if (faults == 0) {
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strcpy(m_fault_print_buffer, "No DRV8320S faults");
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} else {
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strcpy(m_fault_print_buffer, "|");
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if (faults & DRV8320S_FAULT_FET_LC_OC) {
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strcat(m_fault_print_buffer, " FETLC_OC |");
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}
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if (faults & DRV8320S_FAULT_FET_HC_OC) {
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strcat(m_fault_print_buffer, " FETHC_OC |");
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}
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if (faults & DRV8320S_FAULT_FET_LB_OC) {
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strcat(m_fault_print_buffer, " FETLB_OC |");
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}
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if (faults & DRV8320S_FAULT_FET_HB_OC) {
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strcat(m_fault_print_buffer, " FETHB_OC |");
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}
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if (faults & DRV8320S_FAULT_FET_LA_OC) {
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strcat(m_fault_print_buffer, " FETLA_OC |");
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}
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if (faults & DRV8320S_FAULT_FET_HA_OC) {
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strcat(m_fault_print_buffer, " FETHA_OC |");
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}
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if (faults & DRV8320S_FAULT_OTSD) {
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strcat(m_fault_print_buffer, " OTSD |");
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}
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if (faults & DRV8320S_FAULT_UVLO) {
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strcat(m_fault_print_buffer, " UVLO |");
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}
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if (faults & DRV8320S_FAULT_GDF) {
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strcat(m_fault_print_buffer, " GDF |");
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}
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if (faults & DRV8320S_FAULT_VDS_OCP) {
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strcat(m_fault_print_buffer, " VDS OCP |");
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}
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if (faults & DRV8320S_FAULT_FAULT) {
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strcat(m_fault_print_buffer, " FAULT |");
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}
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if (faults & DRV8320S_FAULT_VGS_LC) {
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strcat(m_fault_print_buffer, " FETLC VGS |");
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}
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if (faults & DRV8320S_FAULT_VGS_HC) {
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strcat(m_fault_print_buffer, " FETHC VGS |");
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}
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if (faults & DRV8320S_FAULT_VGS_LB) {
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strcat(m_fault_print_buffer, " FETLB VGS |");
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}
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if (faults & DRV8320S_FAULT_VGS_HB) {
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strcat(m_fault_print_buffer, " FETHB VGS |");
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}
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if (faults & DRV8320S_FAULT_VGS_LA) {
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strcat(m_fault_print_buffer, " FETLA VGS |");
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}
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if (faults & DRV8320S_FAULT_VGS_HA) {
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strcat(m_fault_print_buffer, " FETHA VGS |");
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}
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if (faults & DRV8320S_FAULT_CPUV) {
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strcat(m_fault_print_buffer, " CPU V |");
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}
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if (faults & DRV8320S_FAULT_OTW) {
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strcat(m_fault_print_buffer, " OTW |");
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}
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if (faults & DRV8320S_FAULT_SC_OC) {
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strcat(m_fault_print_buffer, " AMP C OC |");
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}
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if (faults & DRV8320S_FAULT_SB_OC) {
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strcat(m_fault_print_buffer, " AMP B OC |");
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}
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if (faults & DRV8320S_FAULT_SA_OC) {
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strcat(m_fault_print_buffer, " AMP A OC |");
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}
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}
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return m_fault_print_buffer;
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}
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unsigned int drv8320s_read_reg(int reg) {
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uint16_t out = 0;
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out |= (1 << 15);
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out |= (reg & 0x0F) << 11;
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out |= 0x807F;
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if (reg != 0) {
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spi_begin();
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spi_exchange(out);
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spi_end();
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}
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spi_begin();
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uint16_t res = spi_exchange(out);
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spi_end();
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return res;
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}
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void drv8320s_write_reg(int reg, int data) {
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uint16_t out = 0;
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out |= (reg & 0x0F) << 11;
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out |= data & 0x7FF;
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spi_begin();
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spi_exchange(out);
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spi_end();
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}
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// Software SPI
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static uint16_t spi_exchange(uint16_t x) {
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uint16_t rx;
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spi_transfer(&rx, &x, 1);
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return rx;
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}
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static void spi_transfer(uint16_t *in_buf, const uint16_t *out_buf, int length) {
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for (int i = 0;i < length;i++) {
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uint16_t send = out_buf ? out_buf[i] : 0xFFFF;
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uint16_t receive = 0;
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for (int bit = 0;bit < 16;bit++) {
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palWritePad(DRV8320S_MOSI_GPIO, DRV8320S_MOSI_PIN, send >> 15);
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send <<= 1;
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palSetPad(DRV8320S_SCK_GPIO, DRV8320S_SCK_PIN);
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spi_delay();
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palClearPad(DRV8320S_SCK_GPIO, DRV8320S_SCK_PIN);
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int r1, r2, r3;
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r1 = palReadPad(DRV8320S_MISO_GPIO, DRV8320S_MISO_PIN);
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__NOP();
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r2 = palReadPad(DRV8320S_MISO_GPIO, DRV8320S_MISO_PIN);
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__NOP();
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r3 = palReadPad(DRV8320S_MISO_GPIO, DRV8320S_MISO_PIN);
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receive <<= 1;
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if (utils_middle_of_3_int(r1, r2, r3)) {
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receive |= 1;
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}
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spi_delay();
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}
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if (in_buf) {
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in_buf[i] = receive;
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}
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}
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}
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static void spi_begin(void) {
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palClearPad(DRV8320S_CS_GPIO, DRV8320S_CS_PIN);
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}
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static void spi_end(void) {
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palSetPad(DRV8320S_CS_GPIO, DRV8320S_CS_PIN);
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}
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static void spi_delay(void) {
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for (volatile int i = 0;i < 10;i++) {
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__NOP();
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}
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}
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static void terminal_read_reg(int argc, const char **argv) {
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if (argc == 2) {
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int reg = -1;
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sscanf(argv[1], "%d", ®);
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if (reg >= 0) {
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unsigned int res = drv8320s_read_reg(reg);
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char bl[9];
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char bh[9];
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utils_byte_to_binary((res >> 8) & 0xFF, bh);
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utils_byte_to_binary(res & 0xFF, bl);
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commands_printf("Reg 0x%02x: %s %s (0x%04x)\n", reg, bh, bl, res);
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} else {
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commands_printf("Invalid argument(s).\n");
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}
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} else {
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commands_printf("This command requires one argument.\n");
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}
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}
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static void terminal_write_reg(int argc, const char **argv) {
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if (argc == 3) {
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int reg = -1;
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int val = -1;
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sscanf(argv[1], "%d", ®);
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sscanf(argv[2], "%x", &val);
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if (reg >= 0 && val >= 0) {
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drv8320s_write_reg(reg, val);
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unsigned int res = drv8320s_read_reg(reg);
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char bl[9];
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char bh[9];
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utils_byte_to_binary((res >> 8) & 0xFF, bh);
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utils_byte_to_binary(res & 0xFF, bl);
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commands_printf("New reg value 0x%02x: %s %s (0x%04x)\n", reg, bh, bl, res);
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} else {
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commands_printf("Invalid argument(s).\n");
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}
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} else {
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commands_printf("This command requires two arguments.\n");
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}
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}
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static void terminal_set_oc_adj(int argc, const char **argv) {
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if (argc == 2) {
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int val = -1;
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sscanf(argv[1], "%d", &val);
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if (val >= 0 && val < 32) {
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drv8320s_set_oc_adj(val);
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unsigned int res = drv8320s_read_reg(5);
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char bl[9];
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char bh[9];
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utils_byte_to_binary((res >> 8) & 0xFF, bh);
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utils_byte_to_binary(res & 0xFF, bl);
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commands_printf("New reg value 0x%02x: %s %s (0x%04x)\n", 2, bh, bl, res);
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} else {
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commands_printf("Invalid argument(s).\n");
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}
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} else {
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commands_printf("This command requires one argument.\n");
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}
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}
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static void terminal_print_faults(int argc, const char **argv) {
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(void)argc;
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(void)argv;
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commands_printf(drv8320s_faults_to_string(drv8320s_read_faults()));
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}
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static void terminal_reset_faults(int argc, const char **argv) {
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(void)argc;
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(void)argv;
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drv8320s_reset_faults();
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}
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#endif
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