From 12253edfb7e8985023eb857ae3e9b0f8ff73863f Mon Sep 17 00:00:00 2001 From: rusefillc Date: Thu, 22 Apr 2021 00:38:27 -0400 Subject: [PATCH] progress --- Makefile | 10 +- halconf.h | 287 +++++++++++++++++++++++++++++++++++++++++++++--------- main.c | 100 +------------------ mcuconf.h | 103 ++++++++++++++------ 4 files changed, 321 insertions(+), 179 deletions(-) diff --git a/Makefile b/Makefile index 39ce3e1..6e6c9f4 100644 --- a/Makefile +++ b/Makefile @@ -97,8 +97,8 @@ include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk # RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk -# Other files (optional). -include $(CHIBIOS)/test/rt/rt_test.mk +include $(CHIBIOS)/os/hal/lib/streams/streams.mk +include $(CHIBIOS)/os/various/shell/shell.mk # Define linker script file here LDSCRIPT= STM32F407xG.ld @@ -112,9 +112,7 @@ CSRC = $(PORTSRC) \ $(OSALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ - $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ - $(CHIBIOS)/os/hal/lib/streams/chprintf.c \ + $(SHELLSRC) \ usbcfg.c main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -228,7 +226,7 @@ DLIBS = -lm # # List all user C define here, like -D_DEBUG=1 -UDEFS = +UDEFS = -DSHELL_CMD_TEST_ENABLED=0 # Define ASM defines here UADEFS = diff --git a/halconf.h b/halconf.h index 54e3f75..9a54550 100644 --- a/halconf.h +++ b/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -25,8 +25,11 @@ * @{ */ -#ifndef _HALCONF_H_ -#define _HALCONF_H_ +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ #include "mcuconf.h" @@ -34,126 +37,188 @@ * @brief Enables the PAL subsystem. */ #if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) -#define HAL_USE_PAL TRUE +#define HAL_USE_PAL TRUE #endif /** * @brief Enables the ADC subsystem. */ #if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) -#define HAL_USE_ADC FALSE +#define HAL_USE_ADC FALSE #endif /** * @brief Enables the CAN subsystem. */ #if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) -#define HAL_USE_CAN FALSE +#define HAL_USE_CAN FALSE #endif /** - * @brief Enables the EXT subsystem. + * @brief Enables the cryptographic subsystem. */ -#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__) -#define HAL_USE_EXT FALSE +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE #endif /** * @brief Enables the GPT subsystem. */ #if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) -#define HAL_USE_GPT FALSE +#define HAL_USE_GPT FALSE #endif /** * @brief Enables the I2C subsystem. */ #if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) -#define HAL_USE_I2C FALSE +#define HAL_USE_I2C FALSE #endif /** * @brief Enables the I2S subsystem. */ #if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) -#define HAL_USE_I2S FALSE +#define HAL_USE_I2S FALSE #endif /** * @brief Enables the ICU subsystem. */ #if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) -#define HAL_USE_ICU FALSE +#define HAL_USE_ICU FALSE #endif /** * @brief Enables the MAC subsystem. */ #if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) -#define HAL_USE_MAC FALSE +#define HAL_USE_MAC FALSE #endif /** * @brief Enables the MMC_SPI subsystem. */ #if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) -#define HAL_USE_MMC_SPI FALSE +#define HAL_USE_MMC_SPI FALSE #endif /** * @brief Enables the PWM subsystem. */ #if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) -#define HAL_USE_PWM TRUE +#define HAL_USE_PWM FALSE #endif /** * @brief Enables the RTC subsystem. */ #if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) -#define HAL_USE_RTC FALSE +#define HAL_USE_RTC FALSE #endif /** * @brief Enables the SDC subsystem. */ #if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) -#define HAL_USE_SDC FALSE +#define HAL_USE_SDC FALSE #endif /** * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE +#define HAL_USE_SERIAL TRUE #endif /** * @brief Enables the SERIAL over USB subsystem. */ #if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL_USB TRUE +#define HAL_USE_SERIAL_USB TRUE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE #endif /** * @brief Enables the SPI subsystem. */ #if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) -#define HAL_USE_SPI TRUE +#define HAL_USE_SPI FALSE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE #endif /** * @brief Enables the UART subsystem. */ #if !defined(HAL_USE_UART) || defined(__DOXYGEN__) -#define HAL_USE_UART FALSE +#define HAL_USE_UART FALSE #endif /** * @brief Enables the USB subsystem. */ #if !defined(HAL_USE_USB) || defined(__DOXYGEN__) -#define HAL_USE_USB TRUE +#define HAL_USE_USB TRUE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE #endif /*===========================================================================*/ @@ -165,7 +230,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) -#define ADC_USE_WAIT TRUE +#define ADC_USE_WAIT TRUE #endif /** @@ -173,7 +238,7 @@ * @note Disabling this option saves both code and data space. */ #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define ADC_USE_MUTUAL_EXCLUSION TRUE +#define ADC_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -184,7 +249,56 @@ * @brief Sleep mode related APIs inclusion switch. */ #if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) -#define CAN_USE_SLEEP_MODE TRUE +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -195,7 +309,7 @@ * @brief Enables the mutual exclusion APIs on the I2C bus. */ #if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define I2C_USE_MUTUAL_EXCLUSION TRUE +#define I2C_USE_MUTUAL_EXCLUSION TRUE #endif /*===========================================================================*/ @@ -203,17 +317,17 @@ /*===========================================================================*/ /** - * @brief Enables an event sources for incoming packets. + * @brief Enables the zero-copy API. */ #if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) -#define MAC_USE_ZERO_COPY FALSE +#define MAC_USE_ZERO_COPY FALSE #endif /** * @brief Enables an event sources for incoming packets. */ #if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) -#define MAC_USE_EVENTS TRUE +#define MAC_USE_EVENTS TRUE #endif /*===========================================================================*/ @@ -229,7 +343,7 @@ * use a DMA channel and heavily loads the CPU. */ #if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) -#define MMC_NICE_WAITING TRUE +#define MMC_NICE_WAITING TRUE #endif /*===========================================================================*/ @@ -241,7 +355,7 @@ * @note Attempts are performed at 10mS intervals. */ #if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) -#define SDC_INIT_RETRY 100 +#define SDC_INIT_RETRY 100 #endif /** @@ -250,7 +364,7 @@ * at @p FALSE. */ #if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) -#define SDC_MMC_SUPPORT FALSE +#define SDC_MMC_SUPPORT FALSE #endif /** @@ -260,7 +374,21 @@ * lower priority, this may slow down the driver a bit however. */ #if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) -#define SDC_NICE_WAITING TRUE +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U #endif /*===========================================================================*/ @@ -273,18 +401,18 @@ * default configuration. */ #if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SERIAL_DEFAULT_BITRATE 38400 +#define SERIAL_DEFAULT_BITRATE 38400 #endif /** * @brief Serial buffers size. * @details Configuration parameter, you can change the depth of the queue * buffers depending on the requirements of your application. - * @note The default is 64 bytes for both the transmission and receive + * @note The default is 16 bytes for both the transmission and receive * buffers. */ #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_BUFFERS_SIZE 16 +#define SERIAL_BUFFERS_SIZE 16 #endif /*===========================================================================*/ @@ -295,11 +423,19 @@ * @brief Serial over USB buffers size. * @details Configuration parameter, the buffer size must be a multiple of * the USB data endpoint maximum packet size. - * @note The default is 64 bytes for both the transmission and receive + * @note The default is 256 bytes for both the transmission and receive * buffers. */ #if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) -#define SERIAL_USB_BUFFERS_SIZE 256 +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 #endif /*===========================================================================*/ @@ -311,7 +447,15 @@ * @note Disabling this option saves both code and data space. */ #if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) -#define SPI_USE_WAIT TRUE +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE #endif /** @@ -319,16 +463,69 @@ * @note Disabling this option saves both code and data space. */ #if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) -#define SPI_USE_MUTUAL_EXCLUSION TRUE +#define SPI_USE_MUTUAL_EXCLUSION TRUE #endif /** - * elua + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. */ -//~ #define CHIBILUA_SERIAL 1 -#define CHIBILUA_USBSERIAL 1 +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ -#endif /* _HALCONF_H_ */ +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ /** @} */ diff --git a/main.c b/main.c index 171f3be..0e99473 100644 --- a/main.c +++ b/main.c @@ -16,11 +16,9 @@ #include "ch.h" #include "hal.h" -#include "test.h" #include "chprintf.h" -#include "various/shell.h" -#include "lis302dl.h" +#include "shell.h" #include "usbcfg.h" @@ -43,9 +41,7 @@ static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { chprintf(chp, "Usage: mem\r\n"); return; } - n = chHeapStatus(NULL, &size); chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX()); - chprintf(chp, "heap fragments : %u\r\n", n); chprintf(chp, "heap free total : %u bytes\r\n", size); } @@ -61,35 +57,13 @@ static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { chprintf(chp, " addr stack prio refs state\r\n"); tp = chRegFirstThread(); do { - chprintf(chp, "%08lx %08lx %4lu %4lu %9s\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state]); tp = chRegNextThread(tp); } while (tp != NULL); } -static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { - thread_t *tp; - - (void)argv; - if (argc > 0) { - chprintf(chp, "Usage: test\r\n"); - return; - } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(), - TestThread, chp); - if (tp == NULL) { - chprintf(chp, "out of memory\r\n"); - return; - } - chThdWait(tp); -} - static const ShellCommand commands[] = { {"mem", cmd_mem}, {"threads", cmd_threads}, - {"test", cmd_test}, {NULL, NULL} }; @@ -102,55 +76,9 @@ static const ShellConfig shell_cfg1 = { /* Accelerometer related. */ /*===========================================================================*/ -/* - * PWM configuration structure. - * Cyclic callback enabled, channels 1 and 4 enabled without callbacks, - * the active state is a logic one. - */ -static const PWMConfig pwmcfg = { - 100000, /* 100kHz PWM clock frequency. */ - 128, /* PWM period is 128 cycles. */ - NULL, - { - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL}, - {PWM_OUTPUT_ACTIVE_HIGH, NULL} - }, - /* HW dependent part.*/ - 0, - 0 -}; /* - * SPI1 configuration structure. - * Speed 5.25MHz, CPHA=1, CPOL=1, 8bits frames, MSb transmitted first. - * The slave select line is the pin GPIOE_CS_SPI on the port GPIOE. - */ -static const SPIConfig spi1cfg = { - NULL, - /* HW dependent part.*/ - GPIOE, - GPIOE_CS_SPI, - SPI_CR1_BR_0 | SPI_CR1_BR_1 | SPI_CR1_CPOL | SPI_CR1_CPHA -}; - -/* - * SPI2 configuration structure. - * Speed 21MHz, CPHA=0, CPOL=0, 8bits frames, MSb transmitted first. - * The slave select line is the pin 12 on the port GPIOA. - */ -static const SPIConfig spi2cfg = { - NULL, - /* HW dependent part.*/ - GPIOB, - 12, - 0 -}; - -/* - * This is a periodic thread that reads accelerometer and outputs - * result to SPI2 and PWM. + * This is a periodic thread that reads accelerometer and outputs. */ static THD_WORKING_AREA(waThread1, 128); static THD_FUNCTION(Thread1, arg) { @@ -160,10 +88,6 @@ static THD_FUNCTION(Thread1, arg) { (void)arg; chRegSetThreadName("reader"); - /* LIS302DL initialization.*/ - lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG1, 0x43); - lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG2, 0x00); - lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG3, 0x00); /* Reader thread loop.*/ time = chVTGetSystemTime(); @@ -177,15 +101,6 @@ static THD_FUNCTION(Thread1, arg) { ybuf[i] = ybuf[i - 1]; } - /* Reading MEMS accelerometer X and Y registers.*/ - xbuf[0] = (int8_t)lis302dlReadRegister(&SPID1, LIS302DL_OUTX); - ybuf[0] = (int8_t)lis302dlReadRegister(&SPID1, LIS302DL_OUTY); - - /* Transmitting accelerometer the data over SPI2.*/ - spiSelect(&SPID2); - spiSend(&SPID2, 4, xbuf); - spiSend(&SPID2, 4, ybuf); - spiUnselect(&SPID2); /* Calculating average of the latest four accelerometer readings.*/ x = ((int32_t)xbuf[0] + (int32_t)xbuf[1] + @@ -195,20 +110,12 @@ static THD_FUNCTION(Thread1, arg) { /* Reprogramming the four PWM channels using the accelerometer data.*/ if (y < 0) { - pwmEnableChannel(&PWMD4, 0, (pwmcnt_t)-y); - pwmEnableChannel(&PWMD4, 2, (pwmcnt_t)0); } else { - pwmEnableChannel(&PWMD4, 2, (pwmcnt_t)y); - pwmEnableChannel(&PWMD4, 0, (pwmcnt_t)0); } if (x < 0) { - pwmEnableChannel(&PWMD4, 1, (pwmcnt_t)-x); - pwmEnableChannel(&PWMD4, 3, (pwmcnt_t)0); } else { - pwmEnableChannel(&PWMD4, 3, (pwmcnt_t)x); - pwmEnableChannel(&PWMD4, 1, (pwmcnt_t)0); } /* Waiting until the next 250 milliseconds time interval.*/ @@ -296,7 +203,6 @@ int main(void) { * Initializes the SPI driver 1 in order to access the MEMS. The signals * are already initialized in the board file. */ - spiStart(&SPID1, &spi1cfg); /* * Initializes the SPI driver 2. The SPI2 signals are routed as follow: @@ -305,7 +211,6 @@ int main(void) { * PB14 - MISO. * PB15 - MOSI. */ - spiStart(&SPID2, &spi2cfg); palSetPad(GPIOB, 12); palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST); /* NSS. */ @@ -318,7 +223,6 @@ int main(void) { /* * Initializes the PWM driver 4, routes the TIM4 outputs to the board LEDs. */ - pwmStart(&PWMD4, &pwmcfg); palSetPadMode(GPIOD, GPIOD_LED4, PAL_MODE_ALTERNATE(2)); /* Green. */ palSetPadMode(GPIOD, GPIOD_LED3, PAL_MODE_ALTERNATE(2)); /* Orange. */ palSetPadMode(GPIOD, GPIOD_LED5, PAL_MODE_ALTERNATE(2)); /* Red. */ diff --git a/mcuconf.h b/mcuconf.h index adbb05c..093a25f 100644 --- a/mcuconf.h +++ b/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,8 +14,8 @@ limitations under the License. */ -#ifndef _MCUCONF_H_ -#define _MCUCONF_H_ +#ifndef MCUCONF_H +#define MCUCONF_H /* * STM32F4xx drivers configuration. @@ -32,11 +32,18 @@ */ #define STM32F4xx_MCUCONF +#define STM32F405_MCUCONF +#define STM32F415_MCUCONF +#define STM32F407_MCUCONF +#define STM32F417_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -60,9 +67,24 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 15 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_PRIORITY 6 +#define STM32_IRQ_EXTI21_PRIORITY 15 +#define STM32_IRQ_EXTI22_PRIORITY 15 /* * ADC driver system settings. @@ -91,22 +113,17 @@ #define STM32_CAN_CAN2_IRQ_PRIORITY 11 /* - * EXT driver system settings. + * DAC driver system settings. */ -#define STM32_EXT_EXTI0_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI1_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI2_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI3_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI4_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI16_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI17_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI18_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI19_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI20_IRQ_PRIORITY 6 -#define STM32_EXT_EXTI21_IRQ_PRIORITY 15 -#define STM32_EXT_EXTI22_IRQ_PRIORITY 15 +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) /* * GPT driver system settings. @@ -157,6 +174,21 @@ #define STM32_I2C_I2C3_DMA_PRIORITY 3 #define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") +/* + * I2S driver system settings. + */ +#define STM32_I2S_USE_SPI2 FALSE +#define STM32_I2S_USE_SPI3 FALSE +#define STM32_I2S_SPI2_IRQ_PRIORITY 10 +#define STM32_I2S_SPI3_IRQ_PRIORITY 10 +#define STM32_I2S_SPI2_DMA_PRIORITY 1 +#define STM32_I2S_SPI3_DMA_PRIORITY 1 +#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) +#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) +#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) +#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) +#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure") + /* * ICU driver system settings. */ @@ -193,7 +225,7 @@ #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE -#define STM32_PWM_USE_TIM4 TRUE +#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE @@ -205,13 +237,21 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM9_IRQ_PRIORITY 7 +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + /* * SDC driver system settings. */ #define STM32_SDC_SDIO_DMA_PRIORITY 3 #define STM32_SDC_SDIO_IRQ_PRIORITY 9 -#define STM32_SDC_WRITE_TIMEOUT_MS 250 -#define STM32_SDC_READ_TIMEOUT_MS 25 +#define STM32_SDC_WRITE_TIMEOUT_MS 1000 +#define STM32_SDC_READ_TIMEOUT_MS 1000 #define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 #define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE #define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) @@ -235,8 +275,8 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 TRUE -#define STM32_SPI_USE_SPI2 TRUE +#define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) @@ -302,8 +342,11 @@ #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 -#endif /* _MCUCONF_H_ */ +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +#endif /* MCUCONF_H */