From 5274ecbdc0907e37aef622e79372b02ebbe547e9 Mon Sep 17 00:00:00 2001 From: denis Date: Thu, 12 Mar 2015 18:38:47 +0300 Subject: [PATCH] port to cibios 3.0 --- Makefile | 43 +- board/ST_STM32F4_DISCOVERY/board.c | 108 -- board/ST_STM32F4_DISCOVERY/board.h | 1296 -------------------- board/ST_STM32F4_DISCOVERY/board.mk | 5 - board/ST_STM32F4_DISCOVERY/cfg/board.chcfg | 1192 ------------------ chconf.h | 299 ++--- ext/ext.mk | 7 +- ext/platform_chibios/build_config.lua | 2 +- ext/platform_chibios/platform.c | 16 +- halconf.h | 31 +- main.c | 48 +- mcuconf.h | 33 +- rules.mk | 54 +- usbcfg.c | 6 +- usbcfg.h | 2 +- 15 files changed, 300 insertions(+), 2842 deletions(-) delete mode 100644 board/ST_STM32F4_DISCOVERY/board.c delete mode 100644 board/ST_STM32F4_DISCOVERY/board.h delete mode 100644 board/ST_STM32F4_DISCOVERY/board.mk delete mode 100644 board/ST_STM32F4_DISCOVERY/cfg/board.chcfg diff --git a/Makefile b/Makefile index 85b9802..63f1473 100644 --- a/Makefile +++ b/Makefile @@ -32,7 +32,7 @@ endif # Enable this if you want link time optimizations (LTO) ifeq ($(USE_LTO),) - USE_LTO = no + USE_LTO = yes endif # If enabled, this option allows to compile the application in THUMB mode. @@ -54,6 +54,18 @@ USE_VERBOSE_COMPILE = yes # Architecture or project specific options # +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + # Enables the use of FPU on Cortex-M4 (no, softfp, hard). ifeq ($(USE_FPU),) #requred for elua @@ -73,17 +85,16 @@ PROJECT = ch CHIBIOSLUA ?= $(shell pwd) # Imported source files and paths CHIBIOS = $(CHIBIOSLUA)/../ChibiOS -include $(CHIBIOS)/boards/ST_STM32F4_DISCOVERY/board.mk -include $(CHIBIOS)/os/hal/platforms/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/hal.mk -include $(CHIBIOS)/os/ports/GCC/ARMCMx/STM32F4xx/port.mk -include $(CHIBIOS)/os/kernel/kernel.mk -include $(CHIBIOS)/test/test.mk +include $(CHIBIOS)/os/hal/boards/ST_STM32F4_DISCOVERY/board.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk +include $(CHIBIOS)/os/hal/osal/rt/osal.mk +include $(CHIBIOS)/os/rt/rt.mk +include $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_stm32f4xx.mk +include $(CHIBIOS)/test/rt/test.mk # Define linker script file here -#LDSCRIPT= $(PORTLD)/STM32F407xG.ld LDSCRIPT= STM32F407xG.ld -#LDSCRIPT= $(PORTLD)/STM32F407xG_CCM.ld # C sources that can be compiled in ARM or THUMB mode depending on the global # setting. @@ -91,11 +102,13 @@ CSRC = $(PORTSRC) \ $(KERNSRC) \ $(TESTSRC) \ $(HALSRC) \ + $(OSALSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ $(CHIBIOS)/os/various/devices_lib/accel/lis302dl.c \ $(CHIBIOS)/os/various/shell.c \ - $(CHIBIOS)/os/various/chprintf.c \ + $(CHIBIOS)/os/hal/lib/streams/memstreams.c \ + $(CHIBIOS)/os/hal/lib/streams/chprintf.c \ usbcfg.c main.c # C++ sources that can be compiled in ARM or THUMB mode depending on the global @@ -126,11 +139,11 @@ TCPPSRC = ASMSRC = $(PORTASM) $(EXT_ASMSRC) INCDIR = $(PORTINC) $(KERNINC) $(TESTINC) \ - $(HALINC) $(PLATFORMINC) $(BOARDINC) \ + $(HALINC) $(OSALINC) $(PLATFORMINC) $(BOARDINC) \ $(CHIBIOSLUA) \ $(EXT_INC) \ $(CHIBIOS)/os/various/devices_lib/accel \ - $(CHIBIOS)/os/various + $(CHIBIOS)/os/hal/lib/streams $(CHIBIOS)/os/various $(CHIBIOS)/os # # Project, sources and paths @@ -153,6 +166,7 @@ LD = $(TRGT)gcc #LD = $(TRGT)g++ CP = $(TRGT)objcopy AS = $(TRGT)gcc -x assembler-with-cpp +AR = $(TRGT)ar OD = $(TRGT)objdump SZ = $(TRGT)size HEX = $(CP) -O ihex @@ -179,7 +193,7 @@ CPPWARN = -Wall -Wextra # # List all default C defines here, like -D_DEBUG=1 -DDEFS = -DELUA_CPU_HEADER="\"cpu_chibios_cpu.h\"" -DELUA_BOARD_HEADER="\"board_stm32f4chibios.h\"" -DUSE_GIT_REVISION -DELUA_CPU=CHIBIOS_CPU -DELUA_BOARD=STM32F4CHIBIOS -DELUA_PLATFORM=CHIBIOS -D__BUFSIZ__=128 -DELUA_CPU_CHIBIOS_CPU -DELUA_BOARD_STM32F4CHIBIOS -DELUA_PLATFORM_CHIBIOS -DLUA_PACK_VALUE -DELUA_ENDIAN_LITTLE -DLUA_OPTIMIZE_MEMORY=2 -DFORCHIBIOS_CPU +DDEFS += -DELUA_CPU_HEADER="\"cpu_chibios_cpu.h\"" -DELUA_BOARD_HEADER="\"board_stm32f4chibios.h\"" -DUSE_GIT_REVISION -DELUA_CPU=CHIBIOS_CPU -DELUA_BOARD=STM32F4CHIBIOS -DELUA_PLATFORM=CHIBIOS -D__BUFSIZ__=128 -DELUA_CPU_CHIBIOS_CPU -DELUA_BOARD_STM32F4CHIBIOS -DELUA_PLATFORM_CHIBIOS -DLUA_PACK_VALUE -DELUA_ENDIAN_LITTLE -DLUA_OPTIMIZE_MEMORY=2 -DFORCHIBIOS_CPU DDEFS += -DUSE_MULTIPLE_ALLOCATOR -DCHPRINTF_USE_FLOAT=TRUE #~ DDEFS += -DUSE_SIMPLE_ALLOCATOR @@ -222,11 +236,8 @@ ULIBS = # End of user defines ############################################################################## -#RULESPATH = $(CHIBIOS)/os/ports/GCC/ARMCMx +#RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC #include $(RULESPATH)/rules.mk include $(CHIBIOSLUA)/ext/ext.mk - include ./rules.mk - -######## resource usage show ################ diff --git a/board/ST_STM32F4_DISCOVERY/board.c b/board/ST_STM32F4_DISCOVERY/board.c deleted file mode 100644 index 99569f6..0000000 --- a/board/ST_STM32F4_DISCOVERY/board.c +++ /dev/null @@ -1,108 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#include "ch.h" -#include "hal.h" - -#if HAL_USE_PAL || defined(__DOXYGEN__) -/** - * @brief PAL setup. - * @details Digital I/O ports static configuration as defined in @p board.h. - * This variable is used by the HAL when initializing the PAL driver. - */ -const PALConfig pal_default_config = -{ - {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, - VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH}, - {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, - VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH}, - {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, - VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH}, - {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, - VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH}, - {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, - VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH}, - {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, - VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}, - {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, - VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH}, - {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, - VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}, - {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, - VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH} -}; -#endif - -/** - * @brief Early initialization code. - * @details This initialization must be performed just after stack setup - * and before any other initialization. - */ -void __early_init(void) { - - stm32_clock_init(); -} - -#if HAL_USE_SDC || defined(__DOXYGEN__) -/** - * @brief SDC card detection. - */ -bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return TRUE; -} - -/** - * @brief SDC card write protection detection. - */ -bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { - - (void)sdcp; - /* TODO: Fill the implementation.*/ - return FALSE; -} -#endif /* HAL_USE_SDC */ - -#if HAL_USE_MMC_SPI || defined(__DOXYGEN__) -/** - * @brief MMC_SPI card detection. - */ -bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return TRUE; -} - -/** - * @brief MMC_SPI card write protection detection. - */ -bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) { - - (void)mmcp; - /* TODO: Fill the implementation.*/ - return FALSE; -} -#endif - -/** - * @brief Board-specific initialization code. - * @todo Add your board-specific code, if any. - */ -void boardInit(void) { -} diff --git a/board/ST_STM32F4_DISCOVERY/board.h b/board/ST_STM32F4_DISCOVERY/board.h deleted file mode 100644 index 9004163..0000000 --- a/board/ST_STM32F4_DISCOVERY/board.h +++ /dev/null @@ -1,1296 +0,0 @@ -/* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio - - Licensed under the Apache License, Version 2.0 (the "License"); - you may not use this file except in compliance with the License. - You may obtain a copy of the License at - - http://www.apache.org/licenses/LICENSE-2.0 - - Unless required by applicable law or agreed to in writing, software - distributed under the License is distributed on an "AS IS" BASIS, - WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - See the License for the specific language governing permissions and - limitations under the License. -*/ - -#ifndef _BOARD_H_ -#define _BOARD_H_ - -/* - * Setup for STMicroelectronics STM32F4-Discovery board. - */ - -/* - * Board identifier. - */ -#define BOARD_ST_STM32F4_DISCOVERY -#define BOARD_NAME "STMicroelectronics STM32F4-Discovery" - - -/* - * Board oscillators-related settings. - * NOTE: LSE not fitted. - */ -#if !defined(STM32_LSECLK) -#define STM32_LSECLK 0 -#endif - -#if !defined(STM32_HSECLK) -#define STM32_HSECLK 8000000 -#endif - -/* - * Board voltages. - * Required for performance limits calculation. - */ -#define STM32_VDD 300 - -/* - * MCU type as defined in the ST header. - */ -#define STM32F40_41xxx - -/* - * IO pins assignments. - */ -#define GPIOA_BUTTON 0 -#define GPIOA_PIN1 1 -#define GPIOA_PIN2 2 -#define GPIOA_PIN3 3 -#define GPIOA_LRCK 4 -#define GPIOA_SPC 5 -#define GPIOA_SDO 6 -#define GPIOA_SDI 7 -#define GPIOA_PIN8 8 -#define GPIOA_VBUS_FS 9 -#define GPIOA_OTG_FS_ID 10 -#define GPIOA_OTG_FS_DM 11 -#define GPIOA_OTG_FS_DP 12 -#define GPIOA_SWDIO 13 -#define GPIOA_SWCLK 14 -#define GPIOA_PIN15 15 - -#define GPIOB_PIN0 0 -#define GPIOB_PIN1 1 -#define GPIOB_PIN2 2 -#define GPIOB_SWO 3 -#define GPIOB_PIN4 4 -#define GPIOB_PIN5 5 -#define GPIOB_SCL 6 -#define GPIOB_PIN7 7 -#define GPIOB_PIN8 8 -#define GPIOB_SDA 9 -#define GPIOB_CLK_IN 10 -#define GPIOB_PIN11 11 -#define GPIOB_PIN12 12 -#define GPIOB_PIN13 13 -#define GPIOB_PIN14 14 -#define GPIOB_PIN15 15 - -#define GPIOC_OTG_FS_POWER_ON 0 -#define GPIOC_PIN1 1 -#define GPIOC_PIN2 2 -#define GPIOC_PDM_OUT 3 -#define GPIOC_PIN4 4 -#define GPIOC_PIN5 5 -#define GPIOC_PIN6 6 -#define GPIOC_MCLK 7 -#define GPIOC_PIN8 8 -#define GPIOC_PIN9 9 -#define GPIOC_SCLK 10 -#define GPIOC_PIN11 11 -#define GPIOC_SDIN 12 -#define GPIOC_PIN13 13 -#define GPIOC_PIN14 14 -#define GPIOC_PIN15 15 - -#define GPIOD_PIN0 0 -#define GPIOD_PIN1 1 -#define GPIOD_PIN2 2 -#define GPIOD_PIN3 3 -#define GPIOD_RESET 4 -#define GPIOD_OVER_CURRENT 5 -#define GPIOD_PIN6 6 -#define GPIOD_PIN7 7 -#define GPIOD_PIN8 8 -#define GPIOD_PIN9 9 -#define GPIOD_PIN10 10 -#define GPIOD_PIN11 11 -#define GPIOD_LED4 12 -#define GPIOD_LED3 13 -#define GPIOD_LED5 14 -#define GPIOD_LED6 15 - -#define GPIOE_INT1 0 -#define GPIOE_INT2 1 -#define GPIOE_PIN2 2 -#define GPIOE_CS_SPI 3 -#define GPIOE_PIN4 4 -#define GPIOE_PIN5 5 -#define GPIOE_PIN6 6 -#define GPIOE_PIN7 7 -#define GPIOE_PIN8 8 -#define GPIOE_PIN9 9 -#define GPIOE_PIN10 10 -#define GPIOE_PIN11 11 -#define GPIOE_PIN12 12 -#define GPIOE_PIN13 13 -#define GPIOE_PIN14 14 -#define GPIOE_PIN15 15 - -#define GPIOF_PIN0 0 -#define GPIOF_PIN1 1 -#define GPIOF_PIN2 2 -#define GPIOF_PIN3 3 -#define GPIOF_PIN4 4 -#define GPIOF_PIN5 5 -#define GPIOF_PIN6 6 -#define GPIOF_PIN7 7 -#define GPIOF_PIN8 8 -#define GPIOF_PIN9 9 -#define GPIOF_PIN10 10 -#define GPIOF_PIN11 11 -#define GPIOF_PIN12 12 -#define GPIOF_PIN13 13 -#define GPIOF_PIN14 14 -#define GPIOF_PIN15 15 - -#define GPIOG_PIN0 0 -#define GPIOG_PIN1 1 -#define GPIOG_PIN2 2 -#define GPIOG_PIN3 3 -#define GPIOG_PIN4 4 -#define GPIOG_PIN5 5 -#define GPIOG_PIN6 6 -#define GPIOG_PIN7 7 -#define GPIOG_PIN8 8 -#define GPIOG_PIN9 9 -#define GPIOG_PIN10 10 -#define GPIOG_PIN11 11 -#define GPIOG_PIN12 12 -#define GPIOG_PIN13 13 -#define GPIOG_PIN14 14 -#define GPIOG_PIN15 15 - -#define GPIOH_OSC_IN 0 -#define GPIOH_OSC_OUT 1 -#define GPIOH_PIN2 2 -#define GPIOH_PIN3 3 -#define GPIOH_PIN4 4 -#define GPIOH_PIN5 5 -#define GPIOH_PIN6 6 -#define GPIOH_PIN7 7 -#define GPIOH_PIN8 8 -#define GPIOH_PIN9 9 -#define GPIOH_PIN10 10 -#define GPIOH_PIN11 11 -#define GPIOH_PIN12 12 -#define GPIOH_PIN13 13 -#define GPIOH_PIN14 14 -#define GPIOH_PIN15 15 - -#define GPIOI_PIN0 0 -#define GPIOI_PIN1 1 -#define GPIOI_PIN2 2 -#define GPIOI_PIN3 3 -#define GPIOI_PIN4 4 -#define GPIOI_PIN5 5 -#define GPIOI_PIN6 6 -#define GPIOI_PIN7 7 -#define GPIOI_PIN8 8 -#define GPIOI_PIN9 9 -#define GPIOI_PIN10 10 -#define GPIOI_PIN11 11 -#define GPIOI_PIN12 12 -#define GPIOI_PIN13 13 -#define GPIOI_PIN14 14 -#define GPIOI_PIN15 15 - -/* - * I/O ports initial setup, this configuration is established soon after reset - * in the initialization code. - * Please refer to the STM32 Reference Manual for details. - */ -#define PIN_MODE_INPUT(n) (0U << ((n) * 2)) -#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2)) -#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2)) -#define PIN_MODE_ANALOG(n) (3U << ((n) * 2)) -#define PIN_ODR_LOW(n) (0U << (n)) -#define PIN_ODR_HIGH(n) (1U << (n)) -#define PIN_OTYPE_PUSHPULL(n) (0U << (n)) -#define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) -#define PIN_OSPEED_2M(n) (0U << ((n) * 2)) -#define PIN_OSPEED_25M(n) (1U << ((n) * 2)) -#define PIN_OSPEED_50M(n) (2U << ((n) * 2)) -#define PIN_OSPEED_100M(n) (3U << ((n) * 2)) -#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2)) -#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2)) -#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2)) -#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4)) - -/* - * GPIOA setup: - * - * PA0 - BUTTON (input floating). - * PA1 - PIN1 (input pullup). - * PA2 - PIN2 (input pullup). - * PA3 - PIN3 (input pullup). - * PA4 - LRCK (alternate 6). - * PA5 - SPC (alternate 5). - * PA6 - SDO (alternate 5). - * PA7 - SDI (alternate 5). - * PA8 - PIN8 (input pullup). - * PA9 - VBUS_FS (input floating). - * PA10 - OTG_FS_ID (alternate 10). - * PA11 - OTG_FS_DM (alternate 10). - * PA12 - OTG_FS_DP (alternate 10). - * PA13 - SWDIO (alternate 0). - * PA14 - SWCLK (alternate 0). - * PA15 - PIN15 (input pullup). - */ -#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \ - PIN_MODE_INPUT(GPIOA_PIN1) | \ - PIN_MODE_INPUT(GPIOA_PIN2) | \ - PIN_MODE_INPUT(GPIOA_PIN3) | \ - PIN_MODE_ALTERNATE(GPIOA_LRCK) | \ - PIN_MODE_ALTERNATE(GPIOA_SPC) | \ - PIN_MODE_ALTERNATE(GPIOA_SDO) | \ - PIN_MODE_ALTERNATE(GPIOA_SDI) | \ - PIN_MODE_INPUT(GPIOA_PIN8) | \ - PIN_MODE_INPUT(GPIOA_VBUS_FS) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \ - PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \ - PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ - PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ - PIN_MODE_INPUT(GPIOA_PIN15)) -#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SPC) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SDO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SDI) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \ - PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ - PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) -#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_BUTTON) | \ - PIN_OSPEED_100M(GPIOA_PIN1) | \ - PIN_OSPEED_100M(GPIOA_PIN2) | \ - PIN_OSPEED_100M(GPIOA_PIN3) | \ - PIN_OSPEED_100M(GPIOA_LRCK) | \ - PIN_OSPEED_50M(GPIOA_SPC) | \ - PIN_OSPEED_50M(GPIOA_SDO) | \ - PIN_OSPEED_50M(GPIOA_SDI) | \ - PIN_OSPEED_100M(GPIOA_PIN8) | \ - PIN_OSPEED_100M(GPIOA_VBUS_FS) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \ - PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \ - PIN_OSPEED_100M(GPIOA_SWDIO) | \ - PIN_OSPEED_100M(GPIOA_SWCLK) | \ - PIN_OSPEED_100M(GPIOA_PIN15)) -#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOA_LRCK) | \ - PIN_PUPDR_FLOATING(GPIOA_SPC) | \ - PIN_PUPDR_FLOATING(GPIOA_SDO) | \ - PIN_PUPDR_FLOATING(GPIOA_SDI) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \ - PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \ - PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ - PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ - PIN_PUPDR_PULLUP(GPIOA_PIN15)) -#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \ - PIN_ODR_HIGH(GPIOA_PIN1) | \ - PIN_ODR_HIGH(GPIOA_PIN2) | \ - PIN_ODR_HIGH(GPIOA_PIN3) | \ - PIN_ODR_HIGH(GPIOA_LRCK) | \ - PIN_ODR_HIGH(GPIOA_SPC) | \ - PIN_ODR_HIGH(GPIOA_SDO) | \ - PIN_ODR_HIGH(GPIOA_SDI) | \ - PIN_ODR_HIGH(GPIOA_PIN8) | \ - PIN_ODR_HIGH(GPIOA_VBUS_FS) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \ - PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \ - PIN_ODR_HIGH(GPIOA_SWDIO) | \ - PIN_ODR_HIGH(GPIOA_SWCLK) | \ - PIN_ODR_HIGH(GPIOA_PIN15)) -#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \ - PIN_AFIO_AF(GPIOA_PIN1, 0) | \ - PIN_AFIO_AF(GPIOA_PIN2, 0) | \ - PIN_AFIO_AF(GPIOA_PIN3, 0) | \ - PIN_AFIO_AF(GPIOA_LRCK, 6) | \ - PIN_AFIO_AF(GPIOA_SPC, 5) | \ - PIN_AFIO_AF(GPIOA_SDO, 5) | \ - PIN_AFIO_AF(GPIOA_SDI, 5)) -#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ - PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \ - PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \ - PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ - PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ - PIN_AFIO_AF(GPIOA_PIN15, 0)) - -/* - * GPIOB setup: - * - * PB0 - PIN0 (input pullup). - * PB1 - PIN1 (input pullup). - * PB2 - PIN2 (input pullup). - * PB3 - SWO (alternate 0). - * PB4 - PIN4 (input pullup). - * PB5 - PIN5 (input pullup). - * PB6 - SCL (alternate 4). - * PB7 - PIN7 (input pullup). - * PB8 - PIN8 (input pullup). - * PB9 - SDA (alternate 4). - * PB10 - CLK_IN (input pullup). - * PB11 - PIN11 (input pullup). - * PB12 - PIN12 (input pullup). - * PB13 - PIN13 (input pullup). - * PB14 - PIN14 (input pullup). - * PB15 - PIN15 (input pullup). - */ -#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \ - PIN_MODE_INPUT(GPIOB_PIN1) | \ - PIN_MODE_INPUT(GPIOB_PIN2) | \ - PIN_MODE_ALTERNATE(GPIOB_SWO) | \ - PIN_MODE_INPUT(GPIOB_PIN4) | \ - PIN_MODE_INPUT(GPIOB_PIN5) | \ - PIN_MODE_ALTERNATE(GPIOB_SCL) | \ - PIN_MODE_INPUT(GPIOB_PIN7) | \ - PIN_MODE_INPUT(GPIOB_PIN8) | \ - PIN_MODE_ALTERNATE(GPIOB_SDA) | \ - PIN_MODE_INPUT(GPIOB_CLK_IN) | \ - PIN_MODE_INPUT(GPIOB_PIN11) | \ - PIN_MODE_INPUT(GPIOB_PIN12) | \ - PIN_MODE_INPUT(GPIOB_PIN13) | \ - PIN_MODE_INPUT(GPIOB_PIN14) | \ - PIN_MODE_INPUT(GPIOB_PIN15)) -#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ - PIN_OTYPE_OPENDRAIN(GPIOB_SDA) | \ - PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOB_PIN15)) -#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \ - PIN_OSPEED_100M(GPIOB_PIN1) | \ - PIN_OSPEED_100M(GPIOB_PIN2) | \ - PIN_OSPEED_100M(GPIOB_SWO) | \ - PIN_OSPEED_100M(GPIOB_PIN4) | \ - PIN_OSPEED_100M(GPIOB_PIN5) | \ - PIN_OSPEED_100M(GPIOB_SCL) | \ - PIN_OSPEED_100M(GPIOB_PIN7) | \ - PIN_OSPEED_100M(GPIOB_PIN8) | \ - PIN_OSPEED_100M(GPIOB_SDA) | \ - PIN_OSPEED_100M(GPIOB_CLK_IN) | \ - PIN_OSPEED_100M(GPIOB_PIN11) | \ - PIN_OSPEED_100M(GPIOB_PIN12) | \ - PIN_OSPEED_100M(GPIOB_PIN13) | \ - PIN_OSPEED_100M(GPIOB_PIN14) | \ - PIN_OSPEED_100M(GPIOB_PIN15)) -#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOB_SWO) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOB_SCL) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOB_SDA) | \ - PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN11) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOB_PIN15)) -#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \ - PIN_ODR_HIGH(GPIOB_PIN1) | \ - PIN_ODR_HIGH(GPIOB_PIN2) | \ - PIN_ODR_HIGH(GPIOB_SWO) | \ - PIN_ODR_HIGH(GPIOB_PIN4) | \ - PIN_ODR_HIGH(GPIOB_PIN5) | \ - PIN_ODR_HIGH(GPIOB_SCL) | \ - PIN_ODR_HIGH(GPIOB_PIN7) | \ - PIN_ODR_HIGH(GPIOB_PIN8) | \ - PIN_ODR_HIGH(GPIOB_SDA) | \ - PIN_ODR_HIGH(GPIOB_CLK_IN) | \ - PIN_ODR_HIGH(GPIOB_PIN11) | \ - PIN_ODR_HIGH(GPIOB_PIN12) | \ - PIN_ODR_HIGH(GPIOB_PIN13) | \ - PIN_ODR_HIGH(GPIOB_PIN14) | \ - PIN_ODR_HIGH(GPIOB_PIN15)) -#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \ - PIN_AFIO_AF(GPIOB_PIN1, 0) | \ - PIN_AFIO_AF(GPIOB_PIN2, 0) | \ - PIN_AFIO_AF(GPIOB_SWO, 0) | \ - PIN_AFIO_AF(GPIOB_PIN4, 0) | \ - PIN_AFIO_AF(GPIOB_PIN5, 0) | \ - PIN_AFIO_AF(GPIOB_SCL, 4) | \ - PIN_AFIO_AF(GPIOB_PIN7, 0)) -#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ - PIN_AFIO_AF(GPIOB_SDA, 4) | \ - PIN_AFIO_AF(GPIOB_CLK_IN, 0) | \ - PIN_AFIO_AF(GPIOB_PIN11, 0) | \ - PIN_AFIO_AF(GPIOB_PIN12, 0) | \ - PIN_AFIO_AF(GPIOB_PIN13, 0) | \ - PIN_AFIO_AF(GPIOB_PIN14, 0) | \ - PIN_AFIO_AF(GPIOB_PIN15, 0)) - -/* - * GPIOC setup: - * - * PC0 - OTG_FS_POWER_ON (output pushpull maximum). - * PC1 - PIN1 (input pullup). - * PC2 - PIN2 (input pullup). - * PC3 - PDM_OUT (input pullup). - * PC4 - PIN4 (input pullup). - * PC5 - PIN5 (input pullup). - * PC6 - PIN6 (input pullup). - * PC7 - MCLK (alternate 6). - * PC8 - PIN8 (input pullup). - * PC9 - PIN9 (input pullup). - * PC10 - SCLK (alternate 6). - * PC11 - PIN11 (input pullup). - * PC12 - SDIN (alternate 6). - * PC13 - PIN13 (input pullup). - * PC14 - PIN14 (input pullup). - * PC15 - PIN15 (input pullup). - */ -#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\ - PIN_MODE_INPUT(GPIOC_PIN1) | \ - PIN_MODE_INPUT(GPIOC_PIN2) | \ - PIN_MODE_INPUT(GPIOC_PDM_OUT) | \ - PIN_MODE_INPUT(GPIOC_PIN4) | \ - PIN_MODE_INPUT(GPIOC_PIN5) | \ - PIN_MODE_INPUT(GPIOC_PIN6) | \ - PIN_MODE_ALTERNATE(GPIOC_MCLK) | \ - PIN_MODE_INPUT(GPIOC_PIN8) | \ - PIN_MODE_INPUT(GPIOC_PIN9) | \ - PIN_MODE_ALTERNATE(GPIOC_SCLK) | \ - PIN_MODE_INPUT(GPIOC_PIN11) | \ - PIN_MODE_ALTERNATE(GPIOC_SDIN) | \ - PIN_MODE_INPUT(GPIOC_PIN13) | \ - PIN_MODE_INPUT(GPIOC_PIN14) | \ - PIN_MODE_INPUT(GPIOC_PIN15)) -#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\ - PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOC_SCLK) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOC_SDIN) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) -#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\ - PIN_OSPEED_100M(GPIOC_PIN1) | \ - PIN_OSPEED_100M(GPIOC_PIN2) | \ - PIN_OSPEED_100M(GPIOC_PDM_OUT) | \ - PIN_OSPEED_100M(GPIOC_PIN4) | \ - PIN_OSPEED_100M(GPIOC_PIN5) | \ - PIN_OSPEED_100M(GPIOC_PIN6) | \ - PIN_OSPEED_100M(GPIOC_MCLK) | \ - PIN_OSPEED_100M(GPIOC_PIN8) | \ - PIN_OSPEED_100M(GPIOC_PIN9) | \ - PIN_OSPEED_100M(GPIOC_SCLK) | \ - PIN_OSPEED_100M(GPIOC_PIN11) | \ - PIN_OSPEED_100M(GPIOC_SDIN) | \ - PIN_OSPEED_100M(GPIOC_PIN13) | \ - PIN_OSPEED_100M(GPIOC_PIN14) | \ - PIN_OSPEED_100M(GPIOC_PIN15)) -#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\ - PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN4) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOC_MCLK) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOC_SCLK) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOC_SDIN) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ - PIN_PUPDR_PULLUP(GPIOC_PIN15)) -#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \ - PIN_ODR_HIGH(GPIOC_PIN1) | \ - PIN_ODR_HIGH(GPIOC_PIN2) | \ - PIN_ODR_HIGH(GPIOC_PDM_OUT) | \ - PIN_ODR_HIGH(GPIOC_PIN4) | \ - PIN_ODR_HIGH(GPIOC_PIN5) | \ - PIN_ODR_HIGH(GPIOC_PIN6) | \ - PIN_ODR_HIGH(GPIOC_MCLK) | \ - PIN_ODR_HIGH(GPIOC_PIN8) | \ - PIN_ODR_HIGH(GPIOC_PIN9) | \ - PIN_ODR_HIGH(GPIOC_SCLK) | \ - PIN_ODR_HIGH(GPIOC_PIN11) | \ - PIN_ODR_HIGH(GPIOC_SDIN) | \ - PIN_ODR_HIGH(GPIOC_PIN13) | \ - PIN_ODR_HIGH(GPIOC_PIN14) | \ - PIN_ODR_HIGH(GPIOC_PIN15)) -#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\ - PIN_AFIO_AF(GPIOC_PIN1, 0) | \ - PIN_AFIO_AF(GPIOC_PIN2, 0) | \ - PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \ - PIN_AFIO_AF(GPIOC_PIN4, 0) | \ - PIN_AFIO_AF(GPIOC_PIN5, 0) | \ - PIN_AFIO_AF(GPIOC_PIN6, 0) | \ - PIN_AFIO_AF(GPIOC_MCLK, 6)) -#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \ - PIN_AFIO_AF(GPIOC_PIN9, 0) | \ - PIN_AFIO_AF(GPIOC_SCLK, 6) | \ - PIN_AFIO_AF(GPIOC_PIN11, 0) | \ - PIN_AFIO_AF(GPIOC_SDIN, 6) | \ - PIN_AFIO_AF(GPIOC_PIN13, 0) | \ - PIN_AFIO_AF(GPIOC_PIN14, 0) | \ - PIN_AFIO_AF(GPIOC_PIN15, 0)) - -/* - * GPIOD setup: - * - * PD0 - PIN0 (input pullup). - * PD1 - PIN1 (input pullup). - * PD2 - PIN2 (input pullup). - * PD3 - PIN3 (input pullup). - * PD4 - RESET (output pushpull maximum). - * PD5 - OVER_CURRENT (input floating). - * PD6 - PIN6 (input pullup). - * PD7 - PIN7 (input pullup). - * PD8 - PIN8 (input pullup). - * PD9 - PIN9 (input pullup). - * PD10 - PIN10 (input pullup). - * PD11 - PIN11 (input pullup). - * PD12 - LED4 (output pushpull maximum). - * PD13 - LED3 (output pushpull maximum). - * PD14 - LED5 (output pushpull maximum). - * PD15 - LED6 (output pushpull maximum). - */ -#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \ - PIN_MODE_INPUT(GPIOD_PIN1) | \ - PIN_MODE_INPUT(GPIOD_PIN2) | \ - PIN_MODE_INPUT(GPIOD_PIN3) | \ - PIN_MODE_OUTPUT(GPIOD_RESET) | \ - PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \ - PIN_MODE_INPUT(GPIOD_PIN6) | \ - PIN_MODE_INPUT(GPIOD_PIN7) | \ - PIN_MODE_INPUT(GPIOD_PIN8) | \ - PIN_MODE_INPUT(GPIOD_PIN9) | \ - PIN_MODE_INPUT(GPIOD_PIN10) | \ - PIN_MODE_INPUT(GPIOD_PIN11) | \ - PIN_MODE_OUTPUT(GPIOD_LED4) | \ - PIN_MODE_OUTPUT(GPIOD_LED3) | \ - PIN_MODE_OUTPUT(GPIOD_LED5) | \ - PIN_MODE_OUTPUT(GPIOD_LED6)) -#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \ - PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\ - PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOD_LED4) | \ - PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \ - PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \ - PIN_OTYPE_PUSHPULL(GPIOD_LED6)) -#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \ - PIN_OSPEED_100M(GPIOD_PIN1) | \ - PIN_OSPEED_100M(GPIOD_PIN2) | \ - PIN_OSPEED_100M(GPIOD_PIN3) | \ - PIN_OSPEED_100M(GPIOD_RESET) | \ - PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \ - PIN_OSPEED_100M(GPIOD_PIN6) | \ - PIN_OSPEED_100M(GPIOD_PIN7) | \ - PIN_OSPEED_100M(GPIOD_PIN8) | \ - PIN_OSPEED_100M(GPIOD_PIN9) | \ - PIN_OSPEED_100M(GPIOD_PIN10) | \ - PIN_OSPEED_100M(GPIOD_PIN11) | \ - PIN_OSPEED_100M(GPIOD_LED4) | \ - PIN_OSPEED_100M(GPIOD_LED3) | \ - PIN_OSPEED_100M(GPIOD_LED5) | \ - PIN_OSPEED_100M(GPIOD_LED6)) -#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN1) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN2) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOD_RESET) | \ - PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\ - PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ - PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOD_LED4) | \ - PIN_PUPDR_FLOATING(GPIOD_LED3) | \ - PIN_PUPDR_FLOATING(GPIOD_LED5) | \ - PIN_PUPDR_FLOATING(GPIOD_LED6)) -#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \ - PIN_ODR_HIGH(GPIOD_PIN1) | \ - PIN_ODR_HIGH(GPIOD_PIN2) | \ - PIN_ODR_HIGH(GPIOD_PIN3) | \ - PIN_ODR_HIGH(GPIOD_RESET) | \ - PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \ - PIN_ODR_HIGH(GPIOD_PIN6) | \ - PIN_ODR_HIGH(GPIOD_PIN7) | \ - PIN_ODR_HIGH(GPIOD_PIN8) | \ - PIN_ODR_HIGH(GPIOD_PIN9) | \ - PIN_ODR_HIGH(GPIOD_PIN10) | \ - PIN_ODR_HIGH(GPIOD_PIN11) | \ - PIN_ODR_LOW(GPIOD_LED4) | \ - PIN_ODR_LOW(GPIOD_LED3) | \ - PIN_ODR_LOW(GPIOD_LED5) | \ - PIN_ODR_LOW(GPIOD_LED6)) -#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \ - PIN_AFIO_AF(GPIOD_PIN1, 0) | \ - PIN_AFIO_AF(GPIOD_PIN2, 0) | \ - PIN_AFIO_AF(GPIOD_PIN3, 0) | \ - PIN_AFIO_AF(GPIOD_RESET, 0) | \ - PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \ - PIN_AFIO_AF(GPIOD_PIN6, 0) | \ - PIN_AFIO_AF(GPIOD_PIN7, 0)) -#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ - PIN_AFIO_AF(GPIOD_PIN9, 0) | \ - PIN_AFIO_AF(GPIOD_PIN10, 0) | \ - PIN_AFIO_AF(GPIOD_PIN11, 0) | \ - PIN_AFIO_AF(GPIOD_LED4, 0) | \ - PIN_AFIO_AF(GPIOD_LED3, 0) | \ - PIN_AFIO_AF(GPIOD_LED5, 0) | \ - PIN_AFIO_AF(GPIOD_LED6, 0)) - -/* - * GPIOE setup: - * - * PE0 - INT1 (input floating). - * PE1 - INT2 (input floating). - * PE2 - PIN2 (input floating). - * PE3 - CS_SPI (output pushpull maximum). - * PE4 - PIN4 (input floating). - * PE5 - PIN5 (input floating). - * PE6 - PIN6 (input floating). - * PE7 - PIN7 (input floating). - * PE8 - PIN8 (input floating). - * PE9 - PIN9 (input floating). - * PE10 - PIN10 (input floating). - * PE11 - PIN11 (input floating). - * PE12 - PIN12 (input floating). - * PE13 - PIN13 (input floating). - * PE14 - PIN14 (input floating). - * PE15 - PIN15 (input floating). - */ -#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \ - PIN_MODE_INPUT(GPIOE_INT2) | \ - PIN_MODE_INPUT(GPIOE_PIN2) | \ - PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \ - PIN_MODE_INPUT(GPIOE_PIN4) | \ - PIN_MODE_INPUT(GPIOE_PIN5) | \ - PIN_MODE_INPUT(GPIOE_PIN6) | \ - PIN_MODE_INPUT(GPIOE_PIN7) | \ - PIN_MODE_INPUT(GPIOE_PIN8) | \ - PIN_MODE_INPUT(GPIOE_PIN9) | \ - PIN_MODE_INPUT(GPIOE_PIN10) | \ - PIN_MODE_INPUT(GPIOE_PIN11) | \ - PIN_MODE_INPUT(GPIOE_PIN12) | \ - PIN_MODE_INPUT(GPIOE_PIN13) | \ - PIN_MODE_INPUT(GPIOE_PIN14) | \ - PIN_MODE_INPUT(GPIOE_PIN15)) -#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \ - PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) -#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \ - PIN_OSPEED_100M(GPIOE_INT2) | \ - PIN_OSPEED_100M(GPIOE_PIN2) | \ - PIN_OSPEED_100M(GPIOE_CS_SPI) | \ - PIN_OSPEED_100M(GPIOE_PIN4) | \ - PIN_OSPEED_100M(GPIOE_PIN5) | \ - PIN_OSPEED_100M(GPIOE_PIN6) | \ - PIN_OSPEED_100M(GPIOE_PIN7) | \ - PIN_OSPEED_100M(GPIOE_PIN8) | \ - PIN_OSPEED_100M(GPIOE_PIN9) | \ - PIN_OSPEED_100M(GPIOE_PIN10) | \ - PIN_OSPEED_100M(GPIOE_PIN11) | \ - PIN_OSPEED_100M(GPIOE_PIN12) | \ - PIN_OSPEED_100M(GPIOE_PIN13) | \ - PIN_OSPEED_100M(GPIOE_PIN14) | \ - PIN_OSPEED_100M(GPIOE_PIN15)) -#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \ - PIN_PUPDR_FLOATING(GPIOE_INT2) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOE_CS_SPI) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOE_PIN15)) -#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \ - PIN_ODR_HIGH(GPIOE_INT2) | \ - PIN_ODR_HIGH(GPIOE_PIN2) | \ - PIN_ODR_HIGH(GPIOE_CS_SPI) | \ - PIN_ODR_HIGH(GPIOE_PIN4) | \ - PIN_ODR_HIGH(GPIOE_PIN5) | \ - PIN_ODR_HIGH(GPIOE_PIN6) | \ - PIN_ODR_HIGH(GPIOE_PIN7) | \ - PIN_ODR_HIGH(GPIOE_PIN8) | \ - PIN_ODR_HIGH(GPIOE_PIN9) | \ - PIN_ODR_HIGH(GPIOE_PIN10) | \ - PIN_ODR_HIGH(GPIOE_PIN11) | \ - PIN_ODR_HIGH(GPIOE_PIN12) | \ - PIN_ODR_HIGH(GPIOE_PIN13) | \ - PIN_ODR_HIGH(GPIOE_PIN14) | \ - PIN_ODR_HIGH(GPIOE_PIN15)) -#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \ - PIN_AFIO_AF(GPIOE_INT2, 0) | \ - PIN_AFIO_AF(GPIOE_PIN2, 0) | \ - PIN_AFIO_AF(GPIOE_CS_SPI, 0) | \ - PIN_AFIO_AF(GPIOE_PIN4, 0) | \ - PIN_AFIO_AF(GPIOE_PIN5, 0) | \ - PIN_AFIO_AF(GPIOE_PIN6, 0) | \ - PIN_AFIO_AF(GPIOE_PIN7, 0)) -#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \ - PIN_AFIO_AF(GPIOE_PIN9, 0) | \ - PIN_AFIO_AF(GPIOE_PIN10, 0) | \ - PIN_AFIO_AF(GPIOE_PIN11, 0) | \ - PIN_AFIO_AF(GPIOE_PIN12, 0) | \ - PIN_AFIO_AF(GPIOE_PIN13, 0) | \ - PIN_AFIO_AF(GPIOE_PIN14, 0) | \ - PIN_AFIO_AF(GPIOE_PIN15, 0)) - -/* - * GPIOF setup: - * - * PF0 - PIN0 (input floating). - * PF1 - PIN1 (input floating). - * PF2 - PIN2 (input floating). - * PF3 - PIN3 (input floating). - * PF4 - PIN4 (input floating). - * PF5 - PIN5 (input floating). - * PF6 - PIN6 (input floating). - * PF7 - PIN7 (input floating). - * PF8 - PIN8 (input floating). - * PF9 - PIN9 (input floating). - * PF10 - PIN10 (input floating). - * PF11 - PIN11 (input floating). - * PF12 - PIN12 (input floating). - * PF13 - PIN13 (input floating). - * PF14 - PIN14 (input floating). - * PF15 - PIN15 (input floating). - */ -#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ - PIN_MODE_INPUT(GPIOF_PIN1) | \ - PIN_MODE_INPUT(GPIOF_PIN2) | \ - PIN_MODE_INPUT(GPIOF_PIN3) | \ - PIN_MODE_INPUT(GPIOF_PIN4) | \ - PIN_MODE_INPUT(GPIOF_PIN5) | \ - PIN_MODE_INPUT(GPIOF_PIN6) | \ - PIN_MODE_INPUT(GPIOF_PIN7) | \ - PIN_MODE_INPUT(GPIOF_PIN8) | \ - PIN_MODE_INPUT(GPIOF_PIN9) | \ - PIN_MODE_INPUT(GPIOF_PIN10) | \ - PIN_MODE_INPUT(GPIOF_PIN11) | \ - PIN_MODE_INPUT(GPIOF_PIN12) | \ - PIN_MODE_INPUT(GPIOF_PIN13) | \ - PIN_MODE_INPUT(GPIOF_PIN14) | \ - PIN_MODE_INPUT(GPIOF_PIN15)) -#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) -#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \ - PIN_OSPEED_100M(GPIOF_PIN1) | \ - PIN_OSPEED_100M(GPIOF_PIN2) | \ - PIN_OSPEED_100M(GPIOF_PIN3) | \ - PIN_OSPEED_100M(GPIOF_PIN4) | \ - PIN_OSPEED_100M(GPIOF_PIN5) | \ - PIN_OSPEED_100M(GPIOF_PIN6) | \ - PIN_OSPEED_100M(GPIOF_PIN7) | \ - PIN_OSPEED_100M(GPIOF_PIN8) | \ - PIN_OSPEED_100M(GPIOF_PIN9) | \ - PIN_OSPEED_100M(GPIOF_PIN10) | \ - PIN_OSPEED_100M(GPIOF_PIN11) | \ - PIN_OSPEED_100M(GPIOF_PIN12) | \ - PIN_OSPEED_100M(GPIOF_PIN13) | \ - PIN_OSPEED_100M(GPIOF_PIN14) | \ - PIN_OSPEED_100M(GPIOF_PIN15)) -#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOF_PIN15)) -#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ - PIN_ODR_HIGH(GPIOF_PIN1) | \ - PIN_ODR_HIGH(GPIOF_PIN2) | \ - PIN_ODR_HIGH(GPIOF_PIN3) | \ - PIN_ODR_HIGH(GPIOF_PIN4) | \ - PIN_ODR_HIGH(GPIOF_PIN5) | \ - PIN_ODR_HIGH(GPIOF_PIN6) | \ - PIN_ODR_HIGH(GPIOF_PIN7) | \ - PIN_ODR_HIGH(GPIOF_PIN8) | \ - PIN_ODR_HIGH(GPIOF_PIN9) | \ - PIN_ODR_HIGH(GPIOF_PIN10) | \ - PIN_ODR_HIGH(GPIOF_PIN11) | \ - PIN_ODR_HIGH(GPIOF_PIN12) | \ - PIN_ODR_HIGH(GPIOF_PIN13) | \ - PIN_ODR_HIGH(GPIOF_PIN14) | \ - PIN_ODR_HIGH(GPIOF_PIN15)) -#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \ - PIN_AFIO_AF(GPIOF_PIN1, 0) | \ - PIN_AFIO_AF(GPIOF_PIN2, 0) | \ - PIN_AFIO_AF(GPIOF_PIN3, 0) | \ - PIN_AFIO_AF(GPIOF_PIN4, 0) | \ - PIN_AFIO_AF(GPIOF_PIN5, 0) | \ - PIN_AFIO_AF(GPIOF_PIN6, 0) | \ - PIN_AFIO_AF(GPIOF_PIN7, 0)) -#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ - PIN_AFIO_AF(GPIOF_PIN9, 0) | \ - PIN_AFIO_AF(GPIOF_PIN10, 0) | \ - PIN_AFIO_AF(GPIOF_PIN11, 0) | \ - PIN_AFIO_AF(GPIOF_PIN12, 0) | \ - PIN_AFIO_AF(GPIOF_PIN13, 0) | \ - PIN_AFIO_AF(GPIOF_PIN14, 0) | \ - PIN_AFIO_AF(GPIOF_PIN15, 0)) - -/* - * GPIOG setup: - * - * PG0 - PIN0 (input floating). - * PG1 - PIN1 (input floating). - * PG2 - PIN2 (input floating). - * PG3 - PIN3 (input floating). - * PG4 - PIN4 (input floating). - * PG5 - PIN5 (input floating). - * PG6 - PIN6 (input floating). - * PG7 - PIN7 (input floating). - * PG8 - PIN8 (input floating). - * PG9 - PIN9 (input floating). - * PG10 - PIN10 (input floating). - * PG11 - PIN11 (input floating). - * PG12 - PIN12 (input floating). - * PG13 - PIN13 (input floating). - * PG14 - PIN14 (input floating). - * PG15 - PIN15 (input floating). - */ -#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ - PIN_MODE_INPUT(GPIOG_PIN1) | \ - PIN_MODE_INPUT(GPIOG_PIN2) | \ - PIN_MODE_INPUT(GPIOG_PIN3) | \ - PIN_MODE_INPUT(GPIOG_PIN4) | \ - PIN_MODE_INPUT(GPIOG_PIN5) | \ - PIN_MODE_INPUT(GPIOG_PIN6) | \ - PIN_MODE_INPUT(GPIOG_PIN7) | \ - PIN_MODE_INPUT(GPIOG_PIN8) | \ - PIN_MODE_INPUT(GPIOG_PIN9) | \ - PIN_MODE_INPUT(GPIOG_PIN10) | \ - PIN_MODE_INPUT(GPIOG_PIN11) | \ - PIN_MODE_INPUT(GPIOG_PIN12) | \ - PIN_MODE_INPUT(GPIOG_PIN13) | \ - PIN_MODE_INPUT(GPIOG_PIN14) | \ - PIN_MODE_INPUT(GPIOG_PIN15)) -#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) -#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \ - PIN_OSPEED_100M(GPIOG_PIN1) | \ - PIN_OSPEED_100M(GPIOG_PIN2) | \ - PIN_OSPEED_100M(GPIOG_PIN3) | \ - PIN_OSPEED_100M(GPIOG_PIN4) | \ - PIN_OSPEED_100M(GPIOG_PIN5) | \ - PIN_OSPEED_100M(GPIOG_PIN6) | \ - PIN_OSPEED_100M(GPIOG_PIN7) | \ - PIN_OSPEED_100M(GPIOG_PIN8) | \ - PIN_OSPEED_100M(GPIOG_PIN9) | \ - PIN_OSPEED_100M(GPIOG_PIN10) | \ - PIN_OSPEED_100M(GPIOG_PIN11) | \ - PIN_OSPEED_100M(GPIOG_PIN12) | \ - PIN_OSPEED_100M(GPIOG_PIN13) | \ - PIN_OSPEED_100M(GPIOG_PIN14) | \ - PIN_OSPEED_100M(GPIOG_PIN15)) -#define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOG_PIN15)) -#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ - PIN_ODR_HIGH(GPIOG_PIN1) | \ - PIN_ODR_HIGH(GPIOG_PIN2) | \ - PIN_ODR_HIGH(GPIOG_PIN3) | \ - PIN_ODR_HIGH(GPIOG_PIN4) | \ - PIN_ODR_HIGH(GPIOG_PIN5) | \ - PIN_ODR_HIGH(GPIOG_PIN6) | \ - PIN_ODR_HIGH(GPIOG_PIN7) | \ - PIN_ODR_HIGH(GPIOG_PIN8) | \ - PIN_ODR_HIGH(GPIOG_PIN9) | \ - PIN_ODR_HIGH(GPIOG_PIN10) | \ - PIN_ODR_HIGH(GPIOG_PIN11) | \ - PIN_ODR_HIGH(GPIOG_PIN12) | \ - PIN_ODR_HIGH(GPIOG_PIN13) | \ - PIN_ODR_HIGH(GPIOG_PIN14) | \ - PIN_ODR_HIGH(GPIOG_PIN15)) -#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ - PIN_AFIO_AF(GPIOG_PIN1, 0) | \ - PIN_AFIO_AF(GPIOG_PIN2, 0) | \ - PIN_AFIO_AF(GPIOG_PIN3, 0) | \ - PIN_AFIO_AF(GPIOG_PIN4, 0) | \ - PIN_AFIO_AF(GPIOG_PIN5, 0) | \ - PIN_AFIO_AF(GPIOG_PIN6, 0) | \ - PIN_AFIO_AF(GPIOG_PIN7, 0)) -#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ - PIN_AFIO_AF(GPIOG_PIN9, 0) | \ - PIN_AFIO_AF(GPIOG_PIN10, 0) | \ - PIN_AFIO_AF(GPIOG_PIN11, 0) | \ - PIN_AFIO_AF(GPIOG_PIN12, 0) | \ - PIN_AFIO_AF(GPIOG_PIN13, 0) | \ - PIN_AFIO_AF(GPIOG_PIN14, 0) | \ - PIN_AFIO_AF(GPIOG_PIN15, 0)) - -/* - * GPIOH setup: - * - * PH0 - OSC_IN (input floating). - * PH1 - OSC_OUT (input floating). - * PH2 - PIN2 (input floating). - * PH3 - PIN3 (input floating). - * PH4 - PIN4 (input floating). - * PH5 - PIN5 (input floating). - * PH6 - PIN6 (input floating). - * PH7 - PIN7 (input floating). - * PH8 - PIN8 (input floating). - * PH9 - PIN9 (input floating). - * PH10 - PIN10 (input floating). - * PH11 - PIN11 (input floating). - * PH12 - PIN12 (input floating). - * PH13 - PIN13 (input floating). - * PH14 - PIN14 (input floating). - * PH15 - PIN15 (input floating). - */ -#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ - PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ - PIN_MODE_INPUT(GPIOH_PIN2) | \ - PIN_MODE_INPUT(GPIOH_PIN3) | \ - PIN_MODE_INPUT(GPIOH_PIN4) | \ - PIN_MODE_INPUT(GPIOH_PIN5) | \ - PIN_MODE_INPUT(GPIOH_PIN6) | \ - PIN_MODE_INPUT(GPIOH_PIN7) | \ - PIN_MODE_INPUT(GPIOH_PIN8) | \ - PIN_MODE_INPUT(GPIOH_PIN9) | \ - PIN_MODE_INPUT(GPIOH_PIN10) | \ - PIN_MODE_INPUT(GPIOH_PIN11) | \ - PIN_MODE_INPUT(GPIOH_PIN12) | \ - PIN_MODE_INPUT(GPIOH_PIN13) | \ - PIN_MODE_INPUT(GPIOH_PIN14) | \ - PIN_MODE_INPUT(GPIOH_PIN15)) -#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ - PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) -#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ - PIN_OSPEED_100M(GPIOH_OSC_OUT) | \ - PIN_OSPEED_100M(GPIOH_PIN2) | \ - PIN_OSPEED_100M(GPIOH_PIN3) | \ - PIN_OSPEED_100M(GPIOH_PIN4) | \ - PIN_OSPEED_100M(GPIOH_PIN5) | \ - PIN_OSPEED_100M(GPIOH_PIN6) | \ - PIN_OSPEED_100M(GPIOH_PIN7) | \ - PIN_OSPEED_100M(GPIOH_PIN8) | \ - PIN_OSPEED_100M(GPIOH_PIN9) | \ - PIN_OSPEED_100M(GPIOH_PIN10) | \ - PIN_OSPEED_100M(GPIOH_PIN11) | \ - PIN_OSPEED_100M(GPIOH_PIN12) | \ - PIN_OSPEED_100M(GPIOH_PIN13) | \ - PIN_OSPEED_100M(GPIOH_PIN14) | \ - PIN_OSPEED_100M(GPIOH_PIN15)) -#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ - PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOH_PIN15)) -#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ - PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ - PIN_ODR_HIGH(GPIOH_PIN2) | \ - PIN_ODR_HIGH(GPIOH_PIN3) | \ - PIN_ODR_HIGH(GPIOH_PIN4) | \ - PIN_ODR_HIGH(GPIOH_PIN5) | \ - PIN_ODR_HIGH(GPIOH_PIN6) | \ - PIN_ODR_HIGH(GPIOH_PIN7) | \ - PIN_ODR_HIGH(GPIOH_PIN8) | \ - PIN_ODR_HIGH(GPIOH_PIN9) | \ - PIN_ODR_HIGH(GPIOH_PIN10) | \ - PIN_ODR_HIGH(GPIOH_PIN11) | \ - PIN_ODR_HIGH(GPIOH_PIN12) | \ - PIN_ODR_HIGH(GPIOH_PIN13) | \ - PIN_ODR_HIGH(GPIOH_PIN14) | \ - PIN_ODR_HIGH(GPIOH_PIN15)) -#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ - PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ - PIN_AFIO_AF(GPIOH_PIN2, 0) | \ - PIN_AFIO_AF(GPIOH_PIN3, 0) | \ - PIN_AFIO_AF(GPIOH_PIN4, 0) | \ - PIN_AFIO_AF(GPIOH_PIN5, 0) | \ - PIN_AFIO_AF(GPIOH_PIN6, 0) | \ - PIN_AFIO_AF(GPIOH_PIN7, 0)) -#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ - PIN_AFIO_AF(GPIOH_PIN9, 0) | \ - PIN_AFIO_AF(GPIOH_PIN10, 0) | \ - PIN_AFIO_AF(GPIOH_PIN11, 0) | \ - PIN_AFIO_AF(GPIOH_PIN12, 0) | \ - PIN_AFIO_AF(GPIOH_PIN13, 0) | \ - PIN_AFIO_AF(GPIOH_PIN14, 0) | \ - PIN_AFIO_AF(GPIOH_PIN15, 0)) - -/* - * GPIOI setup: - * - * PI0 - PIN0 (input floating). - * PI1 - PIN1 (input floating). - * PI2 - PIN2 (input floating). - * PI3 - PIN3 (input floating). - * PI4 - PIN4 (input floating). - * PI5 - PIN5 (input floating). - * PI6 - PIN6 (input floating). - * PI7 - PIN7 (input floating). - * PI8 - PIN8 (input floating). - * PI9 - PIN9 (input floating). - * PI10 - PIN10 (input floating). - * PI11 - PIN11 (input floating). - * PI12 - PIN12 (input floating). - * PI13 - PIN13 (input floating). - * PI14 - PIN14 (input floating). - * PI15 - PIN15 (input floating). - */ -#define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ - PIN_MODE_INPUT(GPIOI_PIN1) | \ - PIN_MODE_INPUT(GPIOI_PIN2) | \ - PIN_MODE_INPUT(GPIOI_PIN3) | \ - PIN_MODE_INPUT(GPIOI_PIN4) | \ - PIN_MODE_INPUT(GPIOI_PIN5) | \ - PIN_MODE_INPUT(GPIOI_PIN6) | \ - PIN_MODE_INPUT(GPIOI_PIN7) | \ - PIN_MODE_INPUT(GPIOI_PIN8) | \ - PIN_MODE_INPUT(GPIOI_PIN9) | \ - PIN_MODE_INPUT(GPIOI_PIN10) | \ - PIN_MODE_INPUT(GPIOI_PIN11) | \ - PIN_MODE_INPUT(GPIOI_PIN12) | \ - PIN_MODE_INPUT(GPIOI_PIN13) | \ - PIN_MODE_INPUT(GPIOI_PIN14) | \ - PIN_MODE_INPUT(GPIOI_PIN15)) -#define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ - PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) -#define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \ - PIN_OSPEED_100M(GPIOI_PIN1) | \ - PIN_OSPEED_100M(GPIOI_PIN2) | \ - PIN_OSPEED_100M(GPIOI_PIN3) | \ - PIN_OSPEED_100M(GPIOI_PIN4) | \ - PIN_OSPEED_100M(GPIOI_PIN5) | \ - PIN_OSPEED_100M(GPIOI_PIN6) | \ - PIN_OSPEED_100M(GPIOI_PIN7) | \ - PIN_OSPEED_100M(GPIOI_PIN8) | \ - PIN_OSPEED_100M(GPIOI_PIN9) | \ - PIN_OSPEED_100M(GPIOI_PIN10) | \ - PIN_OSPEED_100M(GPIOI_PIN11) | \ - PIN_OSPEED_100M(GPIOI_PIN12) | \ - PIN_OSPEED_100M(GPIOI_PIN13) | \ - PIN_OSPEED_100M(GPIOI_PIN14) | \ - PIN_OSPEED_100M(GPIOI_PIN15)) -#define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ - PIN_PUPDR_FLOATING(GPIOI_PIN15)) -#define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ - PIN_ODR_HIGH(GPIOI_PIN1) | \ - PIN_ODR_HIGH(GPIOI_PIN2) | \ - PIN_ODR_HIGH(GPIOI_PIN3) | \ - PIN_ODR_HIGH(GPIOI_PIN4) | \ - PIN_ODR_HIGH(GPIOI_PIN5) | \ - PIN_ODR_HIGH(GPIOI_PIN6) | \ - PIN_ODR_HIGH(GPIOI_PIN7) | \ - PIN_ODR_HIGH(GPIOI_PIN8) | \ - PIN_ODR_HIGH(GPIOI_PIN9) | \ - PIN_ODR_HIGH(GPIOI_PIN10) | \ - PIN_ODR_HIGH(GPIOI_PIN11) | \ - PIN_ODR_HIGH(GPIOI_PIN12) | \ - PIN_ODR_HIGH(GPIOI_PIN13) | \ - PIN_ODR_HIGH(GPIOI_PIN14) | \ - PIN_ODR_HIGH(GPIOI_PIN15)) -#define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ - PIN_AFIO_AF(GPIOI_PIN1, 0) | \ - PIN_AFIO_AF(GPIOI_PIN2, 0) | \ - PIN_AFIO_AF(GPIOI_PIN3, 0) | \ - PIN_AFIO_AF(GPIOI_PIN4, 0) | \ - PIN_AFIO_AF(GPIOI_PIN5, 0) | \ - PIN_AFIO_AF(GPIOI_PIN6, 0) | \ - PIN_AFIO_AF(GPIOI_PIN7, 0)) -#define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ - PIN_AFIO_AF(GPIOI_PIN9, 0) | \ - PIN_AFIO_AF(GPIOI_PIN10, 0) | \ - PIN_AFIO_AF(GPIOI_PIN11, 0) | \ - PIN_AFIO_AF(GPIOI_PIN12, 0) | \ - PIN_AFIO_AF(GPIOI_PIN13, 0) | \ - PIN_AFIO_AF(GPIOI_PIN14, 0) | \ - PIN_AFIO_AF(GPIOI_PIN15, 0)) - - -#if !defined(_FROM_ASM_) -#ifdef __cplusplus -extern "C" { -#endif - void boardInit(void); -#ifdef __cplusplus -} -#endif -#endif /* _FROM_ASM_ */ - -#endif /* _BOARD_H_ */ diff --git a/board/ST_STM32F4_DISCOVERY/board.mk b/board/ST_STM32F4_DISCOVERY/board.mk deleted file mode 100644 index eb47aa2..0000000 --- a/board/ST_STM32F4_DISCOVERY/board.mk +++ /dev/null @@ -1,5 +0,0 @@ -# List of all the board related files. -BOARDSRC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY/board.c - -# Required include directories -BOARDINC = ${CHIBIOS}/boards/ST_STM32F4_DISCOVERY diff --git a/board/ST_STM32F4_DISCOVERY/cfg/board.chcfg b/board/ST_STM32F4_DISCOVERY/cfg/board.chcfg deleted file mode 100644 index fd1a569..0000000 --- a/board/ST_STM32F4_DISCOVERY/cfg/board.chcfg +++ /dev/null @@ -1,1192 +0,0 @@ - - - - - resources/gencfg/processors/boards/stm32f4xx/templates - .. - - STMicroelectronics STM32F4-Discovery - ST_STM32F4_DISCOVERY - - STM32F40_41xxx - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/chconf.h b/chconf.h index f943ea8..0184982 100644 --- a/chconf.h +++ b/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -30,19 +30,42 @@ /*===========================================================================*/ /** - * @name Kernel parameters and options + * @name System timers settings * @{ */ /*===========================================================================*/ +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#define CH_CFG_ST_RESOLUTION 32 + /** * @brief System tick frequency. * @details Frequency of the system timer that drives the system ticks. This * setting also defines the system tick time unit. */ -#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__) -#define CH_FREQUENCY 1000 -#endif +#define CH_CFG_ST_FREQUENCY 10000 + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#define CH_CFG_ST_TIMEDELTA 2 + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ /** * @brief Round robin interval. @@ -51,13 +74,12 @@ * disables the preemption for threads with equal priority and the * round robin becomes cooperative. Note that higher priority * threads can still preempt, the kernel is always preemptive. - * * @note Disabling the round robin preemption makes the kernel more compact * and generally faster. + * @note The round robin preemption is not supported in tickless mode and + * must be set to zero in that case. */ -#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__) -#define CH_TIME_QUANTUM 20 -#endif +#define CH_CFG_TIME_QUANTUM 0 /** * @brief Managed RAM size. @@ -68,28 +90,17 @@ * * @note In order to let the OS manage the whole RAM the linker script must * provide the @p __heap_base__ and @p __heap_end__ symbols. - * @note Requires @p CH_USE_MEMCORE. + * @note Requires @p CH_CFG_USE_MEMCORE. */ -#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__) -#define CH_MEMCORE_SIZE 0 -#endif +#define CH_CFG_MEMCORE_SIZE 0 /** * @brief Idle thread automatic spawn suppression. * @details When this option is activated the function @p chSysInit() - * does not spawn the idle thread automatically. The application has - * then the responsibility to do one of the following: - * - Spawn a custom idle thread at priority @p IDLEPRIO. - * - Change the main() thread priority to @p IDLEPRIO then enter - * an endless loop. In this scenario the @p main() thread acts as - * the idle thread. - * . - * @note Unless an idle thread is spawned the @p main() thread must not - * enter a sleep state. - */ -#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__) -#define CH_NO_IDLE_THREAD FALSE -#endif + * does not spawn the idle thread. The application @p main() + * function becomes the idle thread and must implement an + * infinite loop. */ +#define CH_CFG_NO_IDLE_THREAD FALSE /** @} */ @@ -108,9 +119,7 @@ * @note This is not related to the compiler optimization options. * @note The default is @p TRUE. */ -#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__) -#define CH_OPTIMIZE_SPEED TRUE -#endif +#define CH_CFG_OPTIMIZE_SPEED TRUE /** @} */ @@ -121,15 +130,22 @@ */ /*===========================================================================*/ +/** + * @brief Time Measurement APIs. + * @details If enabled then the time measurement APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#define CH_CFG_USE_TM TRUE + /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. * * @note The default is @p TRUE. */ -#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__) -#define CH_USE_REGISTRY TRUE -#endif +#define CH_CFG_USE_REGISTRY TRUE /** * @brief Threads synchronization APIs. @@ -138,9 +154,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__) -#define CH_USE_WAITEXIT TRUE -#endif +#define CH_CFG_USE_WAITEXIT TRUE /** * @brief Semaphores APIs. @@ -148,33 +162,18 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES TRUE -#endif +#define CH_CFG_USE_SEMAPHORES TRUE /** * @brief Semaphores queuing mode. * @details If enabled then the threads are enqueued on semaphores by * priority rather than in FIFO order. * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_SEMAPHORES. + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_SEMAPHORES_PRIORITY FALSE -#endif - -/** - * @brief Atomic semaphore API. - * @details If enabled then the semaphores the @p chSemSignalWait() API - * is included in the kernel. - * - * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. - */ -#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__) -#define CH_USE_SEMSW TRUE -#endif +#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE /** * @brief Mutexes APIs. @@ -182,9 +181,17 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__) -#define CH_USE_MUTEXES TRUE -#endif +#define CH_CFG_USE_MUTEXES TRUE + +/** + * @brief Enables recursive behavior on mutexes. + * @note Recursive mutexes are heavier and have an increased + * memory footprint. + * + * @note The default is @p FALSE. + * @note Requires @p CH_CFG_USE_MUTEXES. + */ +#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE /** * @brief Conditional Variables APIs. @@ -192,11 +199,9 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_MUTEXES. + * @note Requires @p CH_CFG_USE_MUTEXES. */ -#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS TRUE -#endif +#define CH_CFG_USE_CONDVARS TRUE /** * @brief Conditional Variables APIs with timeout. @@ -204,11 +209,9 @@ * specification are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_CONDVARS. + * @note Requires @p CH_CFG_USE_CONDVARS. */ -#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_CONDVARS_TIMEOUT TRUE -#endif +#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE /** * @brief Events Flags APIs. @@ -216,9 +219,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__) -#define CH_USE_EVENTS TRUE -#endif +#define CH_CFG_USE_EVENTS TRUE /** * @brief Events Flags APIs with timeout. @@ -226,11 +227,9 @@ * are included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_EVENTS. + * @note Requires @p CH_CFG_USE_EVENTS. */ -#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__) -#define CH_USE_EVENTS_TIMEOUT TRUE -#endif +#define CH_CFG_USE_EVENTS_TIMEOUT TRUE /** * @brief Synchronous Messages APIs. @@ -239,21 +238,18 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES TRUE -#endif +#define CH_CFG_USE_MESSAGES TRUE /** * @brief Synchronous Messages queuing mode. * @details If enabled then messages are served by priority rather than in * FIFO order. * - * @note The default is @p FALSE. Enable this if you have special requirements. - * @note Requires @p CH_USE_MESSAGES. + * @note The default is @p FALSE. Enable this if you have special + * requirements. + * @note Requires @p CH_CFG_USE_MESSAGES. */ -#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__) -#define CH_USE_MESSAGES_PRIORITY FALSE -#endif +#define CH_CFG_USE_MESSAGES_PRIORITY FALSE /** * @brief Mailboxes APIs. @@ -261,11 +257,9 @@ * included in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_SEMAPHORES. + * @note Requires @p CH_CFG_USE_SEMAPHORES. */ -#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__) -#define CH_USE_MAILBOXES TRUE -#endif +#define CH_CFG_USE_MAILBOXES TRUE /** * @brief I/O Queues APIs. @@ -273,9 +267,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__) -#define CH_USE_QUEUES TRUE -#endif +#define CH_CFG_USE_QUEUES TRUE /** * @brief Core Memory Manager APIs. @@ -284,9 +276,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__) -#define CH_USE_MEMCORE TRUE -#endif +#define CH_CFG_USE_MEMCORE TRUE /** * @brief Heap Allocator APIs. @@ -294,27 +284,11 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or - * @p CH_USE_SEMAPHORES. + * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or + * @p CH_CFG_USE_SEMAPHORES. * @note Mutexes are recommended. */ -#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__) -#define CH_USE_HEAP TRUE -#endif - -/** - * @brief C-runtime allocator. - * @details If enabled the the heap allocator APIs just wrap the C-runtime - * @p malloc() and @p free() functions. - * - * @note The default is @p FALSE. - * @note Requires @p CH_USE_HEAP. - * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the - * appropriate documentation. - */ -#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__) -#define CH_USE_MALLOC_HEAP FALSE -#endif +#define CH_CFG_USE_HEAP TRUE /** * @brief Memory Pools Allocator APIs. @@ -323,9 +297,7 @@ * * @note The default is @p TRUE. */ -#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__) -#define CH_USE_MEMPOOLS TRUE -#endif +#define CH_CFG_USE_MEMPOOLS TRUE /** * @brief Dynamic Threads APIs. @@ -333,12 +305,10 @@ * in the kernel. * * @note The default is @p TRUE. - * @note Requires @p CH_USE_WAITEXIT. - * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS. + * @note Requires @p CH_CFG_USE_WAITEXIT. + * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. */ -#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__) -#define CH_USE_DYNAMIC TRUE -#endif +#define CH_CFG_USE_DYNAMIC TRUE /** @} */ @@ -349,6 +319,13 @@ */ /*===========================================================================*/ +/** + * @brief Debug option, kernel statistics. + * + * @note The default is @p FALSE. + */ +#define CH_DBG_STATISTICS FALSE + /** * @brief Debug option, system state check. * @details If enabled the correct call protocol for system APIs is checked @@ -356,9 +333,7 @@ * * @note The default is @p FALSE. */ -#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_SYSTEM_STATE_CHECK FALSE -#endif +#define CH_DBG_SYSTEM_STATE_CHECK FALSE /** * @brief Debug option, parameters checks. @@ -367,9 +342,7 @@ * * @note The default is @p FALSE. */ -#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_CHECKS FALSE -#endif +#define CH_DBG_ENABLE_CHECKS FALSE /** * @brief Debug option, consistency checks. @@ -379,9 +352,7 @@ * * @note The default is @p FALSE. */ -#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_ASSERTS FALSE -#endif +#define CH_DBG_ENABLE_ASSERTS FALSE /** * @brief Debug option, trace buffer. @@ -390,9 +361,7 @@ * * @note The default is @p FALSE. */ -#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_TRACE FALSE -#endif +#define CH_DBG_ENABLE_TRACE FALSE /** * @brief Debug option, stack checks. @@ -404,9 +373,7 @@ * @note The default failure mode is to halt the system with the global * @p panic_msg variable set to @p NULL. */ -#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) -#define CH_DBG_ENABLE_STACK_CHECK FALSE -#endif +#define CH_DBG_ENABLE_STACK_CHECK FALSE /** * @brief Debug option, stacks initialization. @@ -416,22 +383,18 @@ * * @note The default is @p FALSE. */ -#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) -#define CH_DBG_FILL_THREADS FALSE -#endif +#define CH_DBG_FILL_THREADS FALSE /** * @brief Debug option, threads profiling. - * @details If enabled then a field is added to the @p Thread structure that + * @details If enabled then a field is added to the @p thread_t structure that * counts the system ticks occurred while executing the thread. * - * @note The default is @p TRUE. - * @note This debug option is defaulted to TRUE because it is required by - * some test cases into the test suite. + * @note The default is @p FALSE. + * @note This debug option is not currently compatible with the + * tickless mode. */ -#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) -#define CH_DBG_THREADS_PROFILING TRUE -#endif +#define CH_DBG_THREADS_PROFILING FALSE /** @} */ @@ -444,12 +407,10 @@ /** * @brief Threads descriptor structure extension. - * @details User fields added to the end of the @p Thread structure. + * @details User fields added to the end of the @p thread_t structure. */ -#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__) -#define THREAD_EXT_FIELDS \ +#define CH_CFG_THREAD_EXTRA_FIELDS \ /* Add threads custom fields here.*/ -#endif /** * @brief Threads initialization hook. @@ -458,11 +419,9 @@ * @note It is invoked from within @p chThdInit() and implicitly from all * the threads creation APIs. */ -#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_INIT_HOOK(tp) { \ +#define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ } -#endif /** * @brief Threads finalization hook. @@ -472,53 +431,61 @@ * @note It is also invoked when the threads simply return in order to * terminate. */ -#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__) -#define THREAD_EXT_EXIT_HOOK(tp) { \ +#define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ } -#endif /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. */ -#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__) -#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \ - /* System halt code here.*/ \ +#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ + /* Context switch code here.*/ \ +} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ } -#endif /** * @brief Idle Loop hook. * @details This hook is continuously invoked by the idle thread loop. */ -#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__) -#define IDLE_LOOP_HOOK() { \ +#define CH_CFG_IDLE_LOOP_HOOK() { \ /* Idle loop code here.*/ \ } -#endif /** * @brief System tick event hook. * @details This hook is invoked in the system tick handler immediately * after processing the virtual timers queue. */ -#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_TICK_EVENT_HOOK() { \ +#define CH_CFG_SYSTEM_TICK_HOOK() { \ /* System tick event code here.*/ \ } -#endif /** * @brief System halt hook. * @details This hook is invoked in case to a system halting error before * the system is halted. */ -#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__) -#define SYSTEM_HALT_HOOK() { \ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ /* System halt code here.*/ \ } -#endif /** @} */ diff --git a/ext/ext.mk b/ext/ext.mk index 33b66b2..dea523f 100644 --- a/ext/ext.mk +++ b/ext/ext.mk @@ -94,8 +94,7 @@ ELUA_SHELL_CSRC = $(ELUA)/src/shell/shell.c \ $(ELUA)/src/shell/shell_mkdir.c \ $(ELUA)/src/shell/shell_recv.c \ $(ELUA)/src/shell/shell_ver.c \ - $(ELUA)/src/shell/shell_wofmt.c \ - $(ELUA)/src/shell/vi.c + $(ELUA)/src/shell/shell_wofmt.c ELUA_uIP_CSRC = $(ELUA)/src/uip/uip_arp.c \ @@ -112,7 +111,6 @@ ELUA_PLATFORM1_CSRC = $(CHIBIOSLUA)/ext/platform_chibios/platform.c ELUA_PLATFORM2_CSRC = $(ELUA)/src/platform/arm_cortex_interrupts.c ELUA_EXT_CSRC = $(CHIBIOSLUA)/ext/elua_chibios_mod.c \ - $(CHIBIOSLUA)/ext/elua_zumo.c \ $(CHIBIOSLUA)/ext/ch_lua.c # $(ELUA)/src/platform/arm_utils.s \ @@ -133,7 +131,7 @@ ELUA_SHELL_OBJS = $(addprefix $(BUILDDIR)/obj/, $(notdir $(ELUA_SHELL_CSRC:.c= ELUA_uIP_OBJS = $(addprefix $(BUILDDIR)/obj/, $(notdir $(ELUA_uIP_CSRC:.c=.o.elua_uip))) ELUA_PLATFORM_OBJS= $(addprefix $(BUILDDIR)/obj/, $(notdir $(ELUA_PLATFORM_CSRC:.c=.o.elua_platform))) ELUA_FATFS_OBJS= $(addprefix $(BUILDDIR)/obj/, $(notdir $(ELUA_FATFS_CSRC:.c=.o.elua_fatfs))) -ELUA_EXT_OBJS= $(BUILDDIR)/obj/ch_lua.o.ext $(BUILDDIR)/obj/elua_chibios_mod.o.ext $(BUILDDIR)/obj/elua_zumo.o.ext $(BUILDDIR)/obj/platform.o.PLATFORM1 $(BUILDDIR)/obj/arm_cortex_interrupts.o.PLATFORM2 +ELUA_EXT_OBJS= $(BUILDDIR)/obj/ch_lua.o.ext $(BUILDDIR)/obj/elua_chibios_mod.o.ext $(BUILDDIR)/obj/platform.o.PLATFORM1 $(BUILDDIR)/obj/arm_cortex_interrupts.o.PLATFORM2 EXT_INC = $(CHIBIOSLUA)/ext \ @@ -152,6 +150,7 @@ EXT_ASMSRC = $(ELUA)/src/platform/cortex_utils.s EXT_PREPROCESS_SHELL=$(warning EXT_PREPROCESS_SHELL) \ $(shell ln -s $(CHIBIOSLUA)/ext/stm32f4chibios.lua $(ELUA)/boards/known/stm32f4chibios.lua 2>/dev/null) \ + $(shell ls $(ELUA)/src/platform/chibios >/dev/null 2>&1 || ln -s $(CHIBIOSLUA)/ext/platform_chibios $(ELUA)/src/platform/chibios >/dev/null 2>&1) \ $(shell (cd ${ELUA} ; patch -N <$(CHIBIOSLUA)/ext/build_data.lua.diff ; ./build_elua.lua board=stm32f4chibios config_only=true; ./build_elua.lua board=stm32f4chibios) >>./build.log 2>&1) #main link with rules.mk diff --git a/ext/platform_chibios/build_config.lua b/ext/platform_chibios/build_config.lua index 3c85c13..33657fc 100644 --- a/ext/platform_chibios/build_config.lua +++ b/ext/platform_chibios/build_config.lua @@ -15,7 +15,7 @@ end function get_platform_modules( board, cpu ) return { thd = { lib = '"thd"' }, - zumo = { lib = '"zumo"' } + --~ zumo = { lib = '"zumo"' } } end diff --git a/ext/platform_chibios/platform.c b/ext/platform_chibios/platform.c index 2bedb8f..eed8b62 100644 --- a/ext/platform_chibios/platform.c +++ b/ext/platform_chibios/platform.c @@ -34,14 +34,14 @@ int platform_init() // **************************************************************************** // PIO functions -GPIO_TypeDef * const pio_port[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI }; +stm32_gpio_t * const pio_port[] = { GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOG, GPIOH, GPIOI }; uint16_t const ignore_pins[] = { 1<<2|1<<3|1<<11|1<<12, /*A2,A3,A11,A12 UART2 RX,TX,GPIOA_OTG_FS_DM,GPIOA_OTG_FS_DP */ 0,0,0,0,0,0,0,0,0}; pio_type platform_pio_op( unsigned port, pio_type pinmask, int op ) { pio_type retval = 1;//ok , 0-error - GPIO_TypeDef * target_port = pio_port[ port ]; + stm32_gpio_t * target_port = pio_port[ port ]; uint16_t new_state = 0xffff; switch( op ) @@ -169,19 +169,19 @@ timer_data_type platform_s_timer_op( unsigned id, int op, timer_data_type data ) { case PLATFORM_TIMER_OP_START: //~ TIM_SetCounter( ptimer, 0 ); - res = chTimeNow(); + res = chVTGetSystemTime(); break; case PLATFORM_TIMER_OP_READ: - res = chTimeNow();//TIM_GetCounter( ptimer ); + res = chVTGetSystemTime();//TIM_GetCounter( ptimer ); break; case PLATFORM_TIMER_OP_SET_CLOCK: - res = CH_FREQUENCY;//platform_timer_set_clock( id, data ); + res = CH_CFG_ST_FREQUENCY;//platform_timer_set_clock( id, data ); break; case PLATFORM_TIMER_OP_GET_CLOCK: - res = CH_FREQUENCY;//platform_timer_get_clock( id ); + res = CH_CFG_ST_FREQUENCY;//platform_timer_get_clock( id ); break; case PLATFORM_TIMER_OP_GET_MAX_CNT: @@ -195,7 +195,7 @@ timer_data_type platform_s_timer_op( unsigned id, int op, timer_data_type data ) u64 platform_timer_sys_raw_read() { - return MS2ST(chTimeNow()); + return MS2ST(chVTGetSystemTime()); } void platform_timer_sys_disable_int() @@ -210,5 +210,5 @@ void platform_timer_sys_enable_int() timer_data_type platform_timer_read_sys() { - return MS2ST(chTimeNow()); + return MS2ST(chVTGetSystemTime()); } diff --git a/halconf.h b/halconf.h index a4766ce..54e3f75 100644 --- a/halconf.h +++ b/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -30,13 +30,6 @@ #include "mcuconf.h" -/** - * @brief Enables the TM subsystem. - */ -#if !defined(HAL_USE_TM) || defined(__DOXYGEN__) -#define HAL_USE_TM FALSE -#endif - /** * @brief Enables the PAL subsystem. */ @@ -79,6 +72,13 @@ #define HAL_USE_I2C FALSE #endif +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + /** * @brief Enables the ICU subsystem. */ @@ -287,6 +287,21 @@ #define SERIAL_BUFFERS_SIZE 16 #endif +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 64 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + /*===========================================================================*/ /* SPI driver related settings. */ /*===========================================================================*/ diff --git a/main.c b/main.c index 000ce57..171f3be 100644 --- a/main.c +++ b/main.c @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -18,8 +18,8 @@ #include "hal.h" #include "test.h" -#include "various/chprintf.h" -#include "various/shell.h" //otherwise will comcflict with elua +#include "chprintf.h" +#include "various/shell.h" #include "lis302dl.h" #include "usbcfg.h" @@ -32,8 +32,8 @@ BaseSequentialStream *eLuaSDriver; /* Command line related. */ /*===========================================================================*/ -#define SHELL_WA_SIZE THD_WA_SIZE(2048) -#define TEST_WA_SIZE THD_WA_SIZE(256) +#define SHELL_WA_SIZE THD_WORKING_AREA_SIZE(2048) +#define TEST_WA_SIZE THD_WORKING_AREA_SIZE(256) static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { size_t n, size; @@ -44,40 +44,40 @@ static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) { return; } n = chHeapStatus(NULL, &size); - chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus()); + chprintf(chp, "core free memory : %u bytes\r\n", chCoreGetStatusX()); chprintf(chp, "heap fragments : %u\r\n", n); chprintf(chp, "heap free total : %u bytes\r\n", size); } static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) { - static const char *states[] = {THD_STATE_NAMES}; - Thread *tp; + static const char *states[] = {CH_STATE_NAMES}; + thread_t *tp; (void)argv; if (argc > 0) { chprintf(chp, "Usage: threads\r\n"); return; } - chprintf(chp, " addr stack prio refs state time\r\n"); + chprintf(chp, " addr stack prio refs state\r\n"); tp = chRegFirstThread(); do { - chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n", - (uint32_t)tp, (uint32_t)tp->p_ctx.r13, - (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), - states[tp->p_state], (uint32_t)tp->p_time); + chprintf(chp, "%08lx %08lx %4lu %4lu %9s\r\n", + (uint32_t)tp, (uint32_t)tp->p_ctx.r13, + (uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1), + states[tp->p_state]); tp = chRegNextThread(tp); } while (tp != NULL); } static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) { - Thread *tp; + thread_t *tp; (void)argv; if (argc > 0) { chprintf(chp, "Usage: test\r\n"); return; } - tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(), + tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriorityX(), TestThread, chp); if (tp == NULL) { chprintf(chp, "out of memory\r\n"); @@ -152,8 +152,8 @@ static const SPIConfig spi2cfg = { * This is a periodic thread that reads accelerometer and outputs * result to SPI2 and PWM. */ -static WORKING_AREA(waThread1, 128); -static msg_t Thread1(void *arg) { +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { static int8_t xbuf[4], ybuf[4]; /* Last accelerometer data.*/ systime_t time; /* Next deadline.*/ @@ -166,7 +166,7 @@ static msg_t Thread1(void *arg) { lis302dlWriteRegister(&SPID1, LIS302DL_CTRL_REG3, 0x00); /* Reader thread loop.*/ - time = chTimeNow(); + time = chVTGetSystemTime(); while (TRUE) { int32_t x, y; unsigned i; @@ -216,10 +216,10 @@ static msg_t Thread1(void *arg) { } } -static WORKING_AREA(waUSB_THREAD, 512); -static msg_t USB_THREAD(void *arg) { +static THD_WORKING_AREA(waUSB_THREAD, 512); +static THD_FUNCTION(USB_THREAD, arg) { (void)arg; - Thread *shelltp = NULL; + thread_t *shelltp = NULL; /* * Normal main() thread activity, in this demo it just performs @@ -234,7 +234,7 @@ static msg_t USB_THREAD(void *arg) { } else { /* If the previous shell exited.*/ - if (chThdTerminated(shelltp)) { + if (chThdTerminatedX(shelltp)) { /* Recovers memory of the previous shell.*/ chThdRelease(shelltp); shelltp = NULL; @@ -343,6 +343,10 @@ int main(void) { main_lua();//while(1) !!! but could exit + /* + * Normal main() thread activity, in this demo it just performs + * a shell respawn upon its termination. + */ while (TRUE) { chThdSleepMilliseconds(500); } diff --git a/mcuconf.h b/mcuconf.h index f753b0a..adbb05c 100644 --- a/mcuconf.h +++ b/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -14,6 +14,9 @@ limitations under the License. */ +#ifndef _MCUCONF_H_ +#define _MCUCONF_H_ + /* * STM32F4xx drivers configuration. * The following settings override the default settings present in @@ -139,6 +142,7 @@ #define STM32_I2C_USE_I2C1 FALSE #define STM32_I2C_USE_I2C2 FALSE #define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 #define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0) #define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) @@ -151,9 +155,7 @@ #define STM32_I2C_I2C1_DMA_PRIORITY 3 #define STM32_I2C_I2C2_DMA_PRIORITY 3 #define STM32_I2C_I2C3_DMA_PRIORITY 3 -#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt() -#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt() +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") /* * ICU driver system settings. @@ -203,6 +205,17 @@ #define STM32_PWM_TIM8_IRQ_PRIORITY 7 #define STM32_PWM_TIM9_IRQ_PRIORITY 7 +/* + * SDC driver system settings. + */ +#define STM32_SDC_SDIO_DMA_PRIORITY 3 +#define STM32_SDC_SDIO_IRQ_PRIORITY 9 +#define STM32_SDC_WRITE_TIMEOUT_MS 250 +#define STM32_SDC_READ_TIMEOUT_MS 25 +#define STM32_SDC_CLOCK_ACTIVATION_DELAY 10 +#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) + /* * SERIAL driver system settings. */ @@ -237,7 +250,13 @@ #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 -#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt() +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 /* * UART driver system settings. @@ -272,7 +291,7 @@ #define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_UART5_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt() +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -286,3 +305,5 @@ #define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0 + +#endif /* _MCUCONF_H_ */ diff --git a/rules.mk b/rules.mk index 52efda1..afef6e2 100644 --- a/rules.mk +++ b/rules.mk @@ -40,6 +40,20 @@ else DADEFS += -DCORTEX_USE_FPU=FALSE endif +# Process stack size +ifeq ($(USE_PROCESS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__process_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__process_stack_size__=$(USE_PROCESS_STACKSIZE) +endif + +# Exceptions stack size +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + LDOPT := $(LDOPT),--defsym=__main_stack_size__=0x400 +else + LDOPT := $(LDOPT),--defsym=__main_stack_size__=$(USE_EXCEPTIONS_STACKSIZE) +endif + # Output directory and files ifeq ($(BUILDDIR),) BUILDDIR = build @@ -47,8 +61,15 @@ endif ifeq ($(BUILDDIR),.) BUILDDIR = build endif -OUTFILES = $(BUILDDIR)/$(PROJECT).elf $(BUILDDIR)/$(PROJECT).hex \ - $(BUILDDIR)/$(PROJECT).bin $(BUILDDIR)/$(PROJECT).dmp +OUTFILES = $(BUILDDIR)/$(PROJECT).elf \ + $(BUILDDIR)/$(PROJECT).hex \ + $(BUILDDIR)/$(PROJECT).bin \ + $(BUILDDIR)/$(PROJECT).dmp \ + $(BUILDDIR)/$(PROJECT).list + +ifdef SREC +OUTFILES += $(BUILDDIR)/$(PROJECT).srec +endif # Source files groups and paths ifeq ($(USE_THUMB),yes) @@ -60,10 +81,8 @@ else endif ASRC = $(ACSRC)$(ACPPSRC) TSRC = $(TCSRC)$(TCPPSRC) -SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC)) ) +SRCPATHS = $(sort $(dir $(ASMXSRC)) $(dir $(ASMSRC)) $(dir $(ASRC)) $(dir $(TSRC))) - #$(dir $(ELUA_ALL_CSRC)) - # Various directories OBJDIR = $(BUILDDIR)/obj LSTDIR = $(BUILDDIR)/lst @@ -75,7 +94,6 @@ TCOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCSRC:.c=.o))) TCPPOBJS = $(addprefix $(OBJDIR)/, $(notdir $(TCPPSRC:.cpp=.o))) ASMOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMSRC:.s=.o))) ASMXOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ASMXSRC:.S=.o))) -#ELUAOBJS = $(addprefix $(OBJDIR)/, $(notdir $(ELUA_CSRC:.c=_elua.o))) OBJS = $(ASMXOBJS) $(ASMOBJS) $(ACOBJS) $(TCOBJS) $(ACPPOBJS) $(TCPPOBJS) $(ELUA_ALL_OBJS) # Paths @@ -230,18 +248,42 @@ else @$(BIN) $< $@ endif +%.srec: %.elf $(LDSCRIPT) +ifeq ($(USE_VERBOSE_COMPILE),yes) + $(SREC) $< $@ +else + @echo Creating $@ + @$(SREC) $< $@ +endif + %.dmp: %.elf $(LDSCRIPT) ifeq ($(USE_VERBOSE_COMPILE),yes) $(OD) $(ODFLAGS) $< > $@ + $(SZ) $< else @echo Creating $@ @$(OD) $(ODFLAGS) $< > $@ @echo @$(SZ) $< +endif + +%.list: %.elf $(LDSCRIPT) +ifeq ($(USE_VERBOSE_COMPILE),yes) + $(OD) -S $< > $@ +else + @echo Creating $@ + @$(OD) -S $< > $@ @echo @echo Done endif +lib: $(OBJS) $(BUILDDIR)/lib$(PROJECT).a + +$(BUILDDIR)/lib$(PROJECT).a: $(OBJS) + @$(AR) -r $@ $^ + @echo + @echo Done + clean: @echo Cleaning -rm -fR .dep $(BUILDDIR) diff --git a/usbcfg.c b/usbcfg.c index 24955b8..f825ec2 100644 --- a/usbcfg.c +++ b/usbcfg.c @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -270,7 +270,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { case USB_EVENT_ADDRESS: return; case USB_EVENT_CONFIGURED: - chSysLockFromIsr(); + chSysLockFromISR(); /* Enables the endpoints specified into the configuration. Note, this callback is invoked from an ISR so I-Class functions @@ -281,7 +281,7 @@ static void usb_event(USBDriver *usbp, usbevent_t event) { /* Resetting the state of the CDC subsystem.*/ sduConfigureHookI(&SDU1); - chSysUnlockFromIsr(); + chSysUnlockFromISR(); return; case USB_EVENT_SUSPEND: return; diff --git a/usbcfg.h b/usbcfg.h index 6301573..2ffaa17 100644 --- a/usbcfg.h +++ b/usbcfg.h @@ -1,5 +1,5 @@ /* - ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License.