47 lines
1.7 KiB
C
47 lines
1.7 KiB
C
// i386 (Intel) CPU configuration
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#ifndef __CPU_I386_H__
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#define __CPU_I386_H__
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#include "stacks.h"
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// Number of resources (0 if not available/not implemented)
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#define NUM_PIO 5 /*port count*/
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#define NUM_SPI 0
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#define NUM_UART 1
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#define NUM_TIMER 0
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#define NUM_PWM 0
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#define NUM_ADC 0
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#define NUM_CAN 0
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// CPU frequency (needed by the CPU module and MMCFS code, 0 if not used)
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#define CPU_FREQUENCY 0
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// PIO prefix ('0' for P0, P1, ... or 'A' for PA, PB, ...)
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#define PIO_PREFIX 'A'
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// Pins per port configuration:
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// #define PIO_PINS_PER_PORT (n) if each port has the same number of pins, or
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// #define PIO_PIN_ARRAY { n1, n2, ... } to define pins per port in an array
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// Use #define PIO_PINS_PER_PORT 0 if this isn't needed
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#define PIO_PINS_PER_PORT 16
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// Allocator data: define your free memory zones here in two arrays
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// (start address and end address)
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//~ #define SRAM_ORIGIN 0x20010000
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//~ #define SRAM_SIZE 0x10000
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//~ #define INTERNAL_RAM1_FIRST_FREE end
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//~ #define INTERNAL_RAM1_LAST_FREE ( SRAM_ORIGIN + SRAM_SIZE - STACK_SIZE_TOTAL - 1 )
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#define INTERNAL_SRAM_BASE 0x20010000
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#define INTERNAL_SRAM_SIZE ( 63 * 1024 )
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#define INTERNAL_RAM1_FIRST_FREE 0x20010000
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#define INTERNAL_RAM1_LAST_FREE ( INTERNAL_SRAM_BASE + INTERNAL_SRAM_SIZE - STACK_SIZE_TOTAL -1 )
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//dlmalloc.h MORECORE -> _sbrk_r (newlib) / elua_sbrk (multiple) ->
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// -> platform_get_first_free_ram -> MEM_START_ADDRESS -> INTERNAL_RAM1_FIRST_FREE
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#define BUILD_MMCFS 1
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#define PLATFORM_HAS_SYSTIMER 1
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//INTERNAL_RAM1_LAST_FREE -> MEM_END_ADDRESS
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#endif // #ifndef __CPU_I386_H__
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