auto-sync

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/known_issues.txt

@@ -0,0 +1,3 @@
+ 1) resolved in R0.2 SPI silk screen is not correct.
+ 2)                  5.04 screw-in terminal option
+ 3)                  multichannel?

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-B_Mask.gbs

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-B_Paste.gbp

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-B_SilkS.gbo

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-Back.gbl

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-Edge_Cuts.gbr

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-F_Mask.gts

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-F_Paste.gtp

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-F_SilkS.gto

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hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module-Front.gtl

@@ -0,0 +1,676 @@
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+X44605Y-29860D01*
+X44699Y-29841D01*
+X44745Y-29811D01*
+X44745Y-32832D01*
+M02*

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_gerbers/thermocouple_module.drl

@@ -0,0 +1,35 @@
+M48
+;DRILL file {Pcbnew (2013-07-07 BZR 4022)-stable} date 28/05/2014 08:13:05
+;FORMAT={-:-/ absolute / inch / decimal}
+FMAT,2
+INCH,TZ
+T1C0.015
+T2C0.032
+T3C0.070
+T4C0.120
+%
+G90
+G05
+M72
+T1
+X4.125Y-3.075
+X4.215Y-2.6
+X4.259Y-2.616
+T2
+X3.85Y-2.4
+X4.075Y-2.375
+X4.075Y-2.9
+X4.175Y-2.375
+X4.175Y-2.9
+X4.275Y-2.375
+X4.375Y-2.375
+T3
+X3.814Y-3.3507
+X3.8573Y-2.8193
+X4.3927Y-2.8193
+X4.436Y-3.3507
+T4
+X3.8928Y-2.5707
+X4.365Y-2.565
+T0
+M30

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.cmp

@@ -0,0 +1,66 @@
+Cmp-Mod V01 Created by CvPcb (2013-07-07 BZR 4022)-stable date = 07/05/2014 14:43:27
+
+BeginCmp
+TimeStamp = /4E13FFE2;
+Reference = C8;
+ValeurCmp = 100nF;
+IdModule  = SM0603;
+EndCmp
+
+BeginCmp
+TimeStamp = /4E4C6B54;
+Reference = C21;
+ValeurCmp = 10nF;
+IdModule  = SM0603;
+EndCmp
+
+BeginCmp
+TimeStamp = /535A15DB;
+Reference = P1;
+ValeurCmp = CONN_2;
+IdModule  = tcpl_PCC-SMP;
+EndCmp
+
+BeginCmp
+TimeStamp = /535A1737;
+Reference = P2;
+ValeurCmp = CONN_1;
+IdModule  = SIL-1;
+EndCmp
+
+BeginCmp
+TimeStamp = /535A166C;
+Reference = P3;
+ValeurCmp = CONN_4;
+IdModule  = SIL-4;
+EndCmp
+
+BeginCmp
+TimeStamp = /535A1B1D;
+Reference = P4;
+ValeurCmp = CONN_2;
+IdModule  = SIL-2;
+EndCmp
+
+BeginCmp
+TimeStamp = /4E13FF86;
+Reference = U5;
+ValeurCmp = MAX31855KASA;
+IdModule  = SO8E;
+EndCmp
+
+BeginCmp
+TimeStamp = /4F627FCA;
+Reference = V801;
+ValeurCmp = VIA;
+IdModule  = 1pin;
+EndCmp
+
+BeginCmp
+TimeStamp = /4F629521;
+Reference = V802;
+ValeurCmp = VIA;
+IdModule  = 1pin;
+EndCmp
+
+EndListe

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.csv

@@ -0,0 +1,8 @@
+10nF,1,"C21",SM0603
+100nF,1,"C8",SM0603
+CONN_1,1,"P2",SIL-1
+CONN_2,1,"P4",SIL-2
+CONN_4,1,"P3",SIL-4
+CONN_2,1,"P1",tcpl_PCC-SMP
+MAX31855KASA,1,"U5",SO8E,MAX31855KASA+
+VIA,2,"V801 V802",1pin

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.kicad_pcb

@@ -0,0 +1,708 @@
+(kicad_pcb (version 3) (host pcbnew "(2013-07-07 BZR 4022)-stable")
+
+  (general
+    (links 17)
+    (no_connects 0)
+    (area 93.7768 56.5658 124.877288 94.6912)
+    (thickness 1.6002)
+    (drawings 15)
+    (tracks 44)
+    (zones 0)
+    (modules 9)
+    (nets 8)
+  )
+
+  (page A4)
+  (layers
+    (15 Front signal)
+    (0 Back signal)
+    (16 B.Adhes user)
+    (17 F.Adhes user)
+    (18 B.Paste user)
+    (19 F.Paste user)
+    (20 B.SilkS user)
+    (21 F.SilkS user)
+    (22 B.Mask user)
+    (23 F.Mask user)
+    (24 Dwgs.User user)
+    (25 Cmts.User user)
+    (26 Eco1.User user)
+    (27 Eco2.User user)
+    (28 Edge.Cuts user)
+  )
+
+  (setup
+    (last_trace_width 0.3048)
+    (user_trace_width 0.381)
+    (user_trace_width 0.508)
+    (user_trace_width 0.635)
+    (user_trace_width 1.016)
+    (trace_clearance 0.3048)
+    (zone_clearance 0.3048)
+    (zone_45_only no)
+    (trace_min 0.00762)
+    (segment_width 0.381)
+    (edge_width 0.381)
+    (via_size 0.508)
+    (via_drill 0.381)
+    (via_min_size 0.02032)
+    (via_min_drill 0.381)
+    (user_via 1.00076 0.89916)
+    (uvia_size 0.508)
+    (uvia_drill 0.127)
+    (uvias_allowed no)
+    (uvia_min_size 0.02032)
+    (uvia_min_drill 0.127)
+    (pcb_text_width 0.3048)
+    (pcb_text_size 1.524 2.032)
+    (mod_edge_width 0.254)
+    (mod_text_size 1.524 1.524)
+    (mod_text_width 0.3048)
+    (pad_size 0.635 1.143)
+    (pad_drill 0)
+    (pad_to_mask_clearance 0.254)
+    (aux_axis_origin 0 0)
+    (visible_elements 7FFFFF3F)
+    (pcbplotparams
+      (layerselection 284983297)
+      (usegerberextensions true)
+      (excludeedgelayer true)
+      (linewidth 0.150000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (hpglpenoverlay 0)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue false)
+      (plotothertext false)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk false)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 1)
+      (scaleselection 1)
+      (outputdirectory gerbers/gerbers_Spin2/))
+  )
+
+  (net 0 "")
+  (net 1 //CS)
+  (net 2 /MISO)
+  (net 3 /SCK)
+  (net 4 /TCPL+)
+  (net 5 /TCPL-)
+  (net 6 3.3v)
+  (net 7 GND)
+
+  (net_class Default "This is the default net class."
+    (clearance 0.3048)
+    (trace_width 0.3048)
+    (via_dia 0.508)
+    (via_drill 0.381)
+    (uvia_dia 0.508)
+    (uvia_drill 0.127)
+    (add_net "")
+    (add_net //CS)
+    (add_net /MISO)
+    (add_net /SCK)
+    (add_net /TCPL+)
+    (add_net /TCPL-)
+    (add_net 3.3v)
+    (add_net GND)
+  )
+
+  (module 1pin (layer Front) (tedit 4F629911) (tstamp 4F628E0D)
+    (at 98.87712 65.29578)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (path /4F629521)
+    (fp_text reference V802 (at 0 -3.048) (layer F.SilkS) hide
+      (effects (font (size 1.016 1.016) (thickness 0.254)))
+    )
+    (fp_text value VIA (at 0 2.794) (layer F.SilkS) hide
+      (effects (font (size 1.016 1.016) (thickness 0.254)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 4.064 4.064) (drill 3.048)
+      (layers *.Cu *.Mask F.SilkS)
+    )
+  )
+
+  (module 1pin (layer Front) (tedit 4F629903) (tstamp 4F6280CB)
+    (at 110.871 65.151)
+    (descr "module 1 pin (ou trou mecanique de percage)")
+    (tags DEV)
+    (path /4F627FCA)
+    (fp_text reference V801 (at 0 -3.048) (layer F.SilkS) hide
+      (effects (font (size 1.016 1.016) (thickness 0.254)))
+    )
+    (fp_text value VIA (at 0 2.794) (layer F.SilkS) hide
+      (effects (font (size 1.016 1.016) (thickness 0.254)))
+    )
+    (pad 1 thru_hole circle (at 0 0) (size 4.064 4.064) (drill 3.048)
+      (layers *.Cu *.Mask F.SilkS)
+    )
+  )
+
+  (module SO8E (layer Front) (tedit 4F661D77) (tstamp 4E47F42B)
+    (at 104.87914 65.6971)
+    (descr "module CMS SOJ 8 pins etroit")
+    (tags "CMS SOJ")
+    (path /4E13FF86)
+    (attr smd)
+    (fp_text reference U5 (at 0 -0.889) (layer F.SilkS)
+      (effects (font (size 1.143 1.143) (thickness 0.1524)))
+    )
+    (fp_text value MAX31855KASA (at 1.16586 1.1049) (layer F.SilkS)
+      (effects (font (size 0.635 0.635) (thickness 0.127)))
+    )
+    (fp_line (start -2.667 1.778) (end -2.667 1.905) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.667 1.905) (end 2.667 1.905) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.667 -1.905) (end -2.667 -1.905) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.667 -1.905) (end -2.667 1.778) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.667 -0.508) (end -2.159 -0.508) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.159 -0.508) (end -2.159 0.508) (layer F.SilkS) (width 0.127))
+    (fp_line (start -2.159 0.508) (end -2.667 0.508) (layer F.SilkS) (width 0.127))
+    (fp_line (start 2.667 -1.905) (end 2.667 1.905) (layer F.SilkS) (width 0.127))
+    (pad 8 smd rect (at -1.905 -2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+    )
+    (pad 1 smd rect (at -1.905 2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 7 GND)
+    )
+    (pad 7 smd rect (at -0.635 -2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 2 /MISO)
+    )
+    (pad 6 smd rect (at 0.635 -2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 1 //CS)
+    )
+    (pad 5 smd rect (at 1.905 -2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 3 /SCK)
+    )
+    (pad 2 smd rect (at -0.635 2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 5 /TCPL-)
+    )
+    (pad 3 smd rect (at 0.635 2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 4 /TCPL+)
+    )
+    (pad 4 smd rect (at 1.905 2.667) (size 0.508 1.143)
+      (layers Front F.Paste F.Mask)
+      (net 6 3.3v)
+    )
+    (model 3D/so-8.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module tcpl_PCC-SMP (layer Front) (tedit 535A1C3C) (tstamp 535A19ED)
+    (at 104.775 78.359 270)
+    (path /535A15DB)
+    (fp_text reference P1 (at -1.778 9.779 270) (layer F.SilkS) hide
+      (effects (font (size 1.524 1.524) (thickness 0.3048)))
+    )
+    (fp_text value CONN_2 (at -1.5748 4.699 360) (layer F.SilkS) hide
+      (effects (font (size 1.524 1.524) (thickness 0.3048)))
+    )
+    (fp_text user - (at 1.016 2.54 360) (layer F.SilkS)
+      (effects (font (size 1.524 1.524) (thickness 0.3048)))
+    )
+    (fp_text user + (at 1.016 -2.54 270) (layer F.SilkS)
+      (effects (font (size 1.524 1.524) (thickness 0.3048)))
+    )
+    (fp_line (start -3.0988 7.74954) (end -9.25068 7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start -9.25068 7.74954) (end -9.25068 2.75082) (layer F.SilkS) (width 0.381))
+    (fp_line (start -9.25068 2.75082) (end -3.1496 2.75082) (layer F.SilkS) (width 0.381))
+    (fp_line (start -3.1496 -2.75082) (end -9.25068 -2.79908) (layer F.SilkS) (width 0.381))
+    (fp_line (start -9.25068 -2.79908) (end -9.25068 -7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start -9.25068 -7.74954) (end -3.1496 -7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start 5.95122 7.74954) (end 5.95122 -7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start 7.54888 -7.74954) (end 7.54888 7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start -3.1496 -7.74954) (end 11.54938 -7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start -3.1496 7.74954) (end -3.1496 -7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start 11.54938 7.74954) (end -3.1496 7.74954) (layer F.SilkS) (width 0.381))
+    (fp_line (start 11.54938 -7.74954) (end 11.54938 7.74954) (layer F.SilkS) (width 0.381))
+    (pad M thru_hole circle (at 6.74878 -7.8994 270) (size 2.99974 2.99974) (drill 1.77038)
+      (layers *.Cu *.Mask F.SilkS)
+    )
+    (pad M thru_hole circle (at 6.74878 7.8994 270) (size 2.99974 2.99974) (drill 1.77038)
+      (layers *.Cu *.Mask F.SilkS)
+    )
+    (pad 2 thru_hole circle (at -6.74878 -6.79958 270) (size 2.99974 2.99974) (drill 1.77038)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 4 /TCPL+)
+    )
+    (pad 1 thru_hole circle (at -6.74878 6.79958 270) (size 2.99974 2.99974) (drill 1.77038)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 5 /TCPL-)
+    )
+    (model 3D/TCPL_CONNECTOR_PCC-SMP.wrl
+      (at (xyz 0.46 0.315 -0.17))
+      (scale (xyz 10 10 10))
+      (rotate (xyz 0 0 180))
+    )
+  )
+
+  (module SIL-4 (layer Front) (tedit 535A1D77) (tstamp 4F67B26C)
+    (at 107.315 60.325)
+    (descr "Connecteur 4 pibs")
+    (tags "CONN DEV")
+    (path /535A166C)
+    (fp_text reference P3 (at 5.715 -0.635) (layer F.SilkS)
+      (effects (font (size 0.508 0.508) (thickness 0.127)))
+    )
+    (fp_text value CONN_4 (at 0 -2.54) (layer F.SilkS) hide
+      (effects (font (size 1.524 1.016) (thickness 0.3048)))
+    )
+    (fp_line (start -5.08 -1.27) (end -5.08 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start -5.08 1.27) (end -5.08 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start -5.08 -1.27) (end -5.08 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start -5.08 -1.27) (end 5.08 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start 5.08 -1.27) (end 5.08 1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start 5.08 1.27) (end -5.08 1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.3048))
+    (pad 1 thru_hole rect (at -3.81 0) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 2 /MISO)
+    )
+    (pad 2 thru_hole circle (at -1.27 0) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 1 //CS)
+    )
+    (pad 3 thru_hole circle (at 1.27 0) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 3 /SCK)
+    )
+    (pad 4 thru_hole circle (at 3.81 0) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 6 3.3v)
+    )
+  )
+
+  (module SIL-1 (layer Front) (tedit 535A1D7C) (tstamp 4F5CF533)
+    (at 97.79 60.96 180)
+    (descr "Connecteurs 1 pin")
+    (tags "CONN DEV")
+    (path /535A1737)
+    (fp_text reference P2 (at 1.27 -1.905 180) (layer F.SilkS)
+      (effects (font (size 0.508 0.508) (thickness 0.127)))
+    )
+    (fp_text value CONN_1 (at 0 -2.54 180) (layer F.SilkS) hide
+      (effects (font (size 1.524 1.016) (thickness 0.254)))
+    )
+    (fp_line (start -1.27 1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.3175))
+    (fp_line (start -1.27 -1.27) (end 1.27 -1.27) (layer F.SilkS) (width 0.3175))
+    (fp_line (start -1.27 1.27) (end -1.27 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start 1.27 -1.27) (end 1.27 1.27) (layer F.SilkS) (width 0.3048))
+    (pad 1 thru_hole rect (at 0 0 180) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 7 GND)
+    )
+  )
+
+  (module SIL-2 (layer Front) (tedit 535A1CFD) (tstamp 535A1BB9)
+    (at 104.775 73.66 180)
+    (descr "Connecteurs 2 pins")
+    (tags "CONN DEV")
+    (path /535A1B1D)
+    (fp_text reference P4 (at 1.905 1.905 180) (layer F.SilkS)
+      (effects (font (size 0.508 0.508) (thickness 0.127)))
+    )
+    (fp_text value CONN_2 (at 0 -2.54 180) (layer F.SilkS) hide
+      (effects (font (size 1.524 1.016) (thickness 0.3048)))
+    )
+    (fp_line (start -2.54 1.27) (end -2.54 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start -2.54 -1.27) (end 2.54 -1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start 2.54 -1.27) (end 2.54 1.27) (layer F.SilkS) (width 0.3048))
+    (fp_line (start 2.54 1.27) (end -2.54 1.27) (layer F.SilkS) (width 0.3048))
+    (pad 1 thru_hole rect (at -1.27 0 180) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 4 /TCPL+)
+    )
+    (pad 2 thru_hole circle (at 1.27 0 180) (size 1.397 1.397) (drill 0.8128)
+      (layers *.Cu *.Mask F.SilkS)
+      (net 5 /TCPL-)
+    )
+  )
+
+  (module SM0805-SM0603 (layer Back) (tedit 54220BA7) (tstamp 4E47F455)
+    (at 105.156 66.04 180)
+    (path /4E13FFE2)
+    (attr smd)
+    (fp_text reference C8 (at 0 0 450) (layer B.SilkS)
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
+    )
+    (fp_text value 100nF (at 0 -0.381 180) (layer B.SilkS) hide
+      (effects (font (size 0.50038 0.50038) (thickness 0.10922)) (justify mirror))
+    )
+    (fp_circle (center -1.651 -0.762) (end -1.651 -0.635) (layer B.SilkS) (width 0.09906))
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+  (zone (net 7) (net_name GND) (layer Front) (tstamp 535A256C) (hatch edge 0.508)
+    (connect_pads (clearance 0.3048))
+    (min_thickness 0.3048)
+    (fill (arc_segments 16) (thermal_gap 0.3) (thermal_bridge_width 1.38176) (smoothing fillet) (radius 0.508))
+    (polygon
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+)

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.net

@@ -0,0 +1,168 @@
+(export (version D)
+  (design
+    (source C:/Users/user/Desktop/Jared/daecu/Hardware/trunk/rusefi.com/thermocouiple_module/thermocouple_module.sch)
+    (date "5/28/2014 5:25:43 AM")
+    (tool "eeschema (2013-07-07 BZR 4022)-stable"))
+  (components
+    (comp (ref V802)
+      (value VIA)
+      (footprint 1pin)
+      (libsource (lib thermocouple_module-cache) (part VIA))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 4F629521))
+    (comp (ref V801)
+      (value VIA)
+      (footprint 1pin)
+      (libsource (lib thermocouple_module-cache) (part VIA))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 4F627FCA))
+    (comp (ref C21)
+      (value 10nF)
+      (footprint SM0805-SM0603)
+      (libsource (lib device) (part C))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 4E4C6B54))
+    (comp (ref C8)
+      (value 100nF)
+      (footprint SM0805-SM0603)
+      (libsource (lib device) (part C))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 4E13FFE2))
+    (comp (ref U5)
+      (value MAX31855KASA)
+      (footprint SO8E)
+      (fields
+        (field (name mfg#) MAX31855KASA+))
+      (libsource (lib max31855) (part MAX31855))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 4E13FF86))
+    (comp (ref P1)
+      (value CONN_2)
+      (footprint tcpl_PCC-SMP)
+      (libsource (lib conn) (part CONN_2))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 535A15DB))
+    (comp (ref P3)
+      (value CONN_4)
+      (footprint SIL-4)
+      (libsource (lib conn) (part CONN_4))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 535A166C))
+    (comp (ref P2)
+      (value CONN_1)
+      (footprint SIL-1)
+      (libsource (lib conn) (part CONN_1))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 535A1737))
+    (comp (ref P4)
+      (value CONN_2)
+      (footprint SIL-2)
+      (libsource (lib conn) (part CONN_2))
+      (sheetpath (names /) (tstamps /))
+      (tstamp 535A1B1D)))
+  (libparts
+    (libpart (lib device) (part C)
+      (description "Condensateur non polarise")
+      (footprints
+        (fp SM*)
+        (fp C?)
+        (fp C1-1))
+      (fields
+        (field (name Reference) C)
+        (field (name Value) C)
+        (field (name Footprint) ~)
+        (field (name Datasheet) ~))
+      (pins
+        (pin (num 1) (name ~) (type passive))
+        (pin (num 2) (name ~) (type passive))))
+    (libpart (lib conn) (part CONN_1)
+      (description "1 pin")
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_1))
+      (pins
+        (pin (num 1) (name 1) (type passive))))
+    (libpart (lib conn) (part CONN_2)
+      (description "Symbole general de connecteur")
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_2))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name PM) (type passive))))
+    (libpart (lib conn) (part CONN_4)
+      (description "Symbole general de connecteur")
+      (fields
+        (field (name Reference) P)
+        (field (name Value) CONN_4))
+      (pins
+        (pin (num 1) (name P1) (type passive))
+        (pin (num 2) (name P2) (type passive))
+        (pin (num 3) (name P3) (type passive))
+        (pin (num 4) (name P4) (type passive))))
+    (libpart (lib max31855) (part MAX31855)
+      (fields
+        (field (name Reference) U)
+        (field (name Value) MAX31855)
+        (field (name Footprint) ~)
+        (field (name Datasheet) ~))
+      (pins
+        (pin (num 1) (name GND) (type BiDi))
+        (pin (num 2) (name T-) (type BiDi))
+        (pin (num 3) (name T+) (type BiDi))
+        (pin (num 4) (name VCC) (type BiDi))
+        (pin (num 5) (name SCK) (type BiDi))
+        (pin (num 6) (name /CS) (type BiDi))
+        (pin (num 7) (name SO) (type BiDi))
+        (pin (num 8) (name DNC) (type BiDi))))
+    (libpart (lib thermocouple_module-cache) (part VIA)
+      (fields
+        (field (name Reference) V)
+        (field (name Value) VIA)
+        (field (name Footprint) ~)
+        (field (name Datasheet) ~))
+      (pins
+        (pin (num 1) (name Via) (type passive)))))
+  (libraries
+    (library (logical device)
+      (uri "C:\\Program Files\\KiCad\\share\\library\\device.lib"))
+    (library (logical conn)
+      (uri "C:\\Program Files\\KiCad\\share\\library\\conn.lib"))
+    (library (logical max31855)
+      (uri ..\rusefi_lib\max31855.lib))
+    (library (logical thermocouple_module-cache)
+      (uri C:\Users\user\Desktop\Jared\daecu\Hardware\trunk\rusefi.com\thermocouiple_module\thermocouple_module-cache.lib)))
+  (nets
+    (net (code 1) (name /MISO)
+      (node (ref U5) (pin 7))
+      (node (ref P3) (pin 1)))
+    (net (code 2) (name "")
+      (node (ref U5) (pin 8)))
+    (net (code 3) (name /SCK)
+      (node (ref U5) (pin 5))
+      (node (ref P3) (pin 3)))
+    (net (code 4) (name //CS)
+      (node (ref U5) (pin 6))
+      (node (ref P3) (pin 2)))
+    (net (code 5) (name "")
+      (node (ref V802) (pin 1)))
+    (net (code 6) (name "")
+      (node (ref V801) (pin 1)))
+    (net (code 7) (name /TCPL+)
+      (node (ref C21) (pin 2))
+      (node (ref P4) (pin 1))
+      (node (ref P1) (pin 2))
+      (node (ref U5) (pin 3)))
+    (net (code 8) (name /TCPL-)
+      (node (ref P1) (pin 1))
+      (node (ref C21) (pin 1))
+      (node (ref U5) (pin 2))
+      (node (ref P4) (pin 2)))
+    (net (code 9) (name GND)
+      (node (ref U5) (pin 1))
+      (node (ref C8) (pin 2))
+      (node (ref P2) (pin 1)))
+    (net (code 10) (name 3.3v)
+      (node (ref U5) (pin 4))
+      (node (ref P3) (pin 4))
+      (node (ref C8) (pin 1)))))

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.pro

@@ -0,0 +1,85 @@
+update=5/28/2014 5:24:56 AM
+version=1
+last_client=pcbnew
+[general]
+version=1
+RootSch=
+BoardNm=
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
+[eeschema]
+version=1
+LibDir=../rusefi_lib
+NetFmtName=
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=special
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
+LibName31=max31855
+[pcbnew]
+version=1
+LastNetListRead=thermocouple_module.net
+UseCmpFile=0
+PadDrill=0.000000000000
+PadDrillOvalY=0.000000000000
+PadSizeH=0.635000000000
+PadSizeV=1.143000000000
+PcbTextSizeV=2.032000000000
+PcbTextSizeH=1.524000000000
+PcbTextThickness=0.304800000000
+ModuleTextSizeV=1.524000000000
+ModuleTextSizeH=1.524000000000
+ModuleTextSizeThickness=0.304800000000
+SolderMaskClearance=0.254000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.381000000000
+BoardOutlineThickness=0.381000000000
+ModuleOutlineThickness=0.254000000000
+[pcbnew/libraries]
+LibDir=../rusefi_lib
+LibName1=sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms
+LibName7=display
+LibName8=valves
+LibName9=led
+LibName10=dip_sockets
+LibName11=TCPL_PCC-SMP
+LibName12=SM0805-SM0603

hardware/rusefi_hardware_history/thermocouiple_module_rev00.10/thermocouiple_module/thermocouple_module.sch

@@ -0,0 +1,240 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:special
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:max31855
+LIBS:thermocouple_module-cache
+EELAYER 27 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "Electronic Industrial Temperature Interface (EITI)"
+Date "28 may 2014"
+Rev ".001"
+Comp "Mrk Industries"
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+NoConn ~ 4075 4350
+NoConn ~ 3875 4350
+$Comp
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+Text Notes 3900 4950 0    40   ~ 0
+We want a big mass of copper in the\nTCPL joints, to dampen the cold junction\ntemperature and to make it more measurable\nwith this IC
+Text Notes 3725 4450 0    40   ~ 0
+Via for cable tie
+$Comp
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+Text Notes 7250 4350 0    30   ~ 0
+Care must be taken with the conector\nchosen for the TCPL to avoid inaccuracies.\n\nAlso, the connector must be as close as\npossible to the cold-juntion compensation.
+Text Notes 5500 3650 0    40   ~ 0
+MAX31855\nCold-Junction Compensated\nThermocouple-to-Digital Converter
+Text Notes 5600 4900 0    30   ~ 0
+Datasheet:\nhttp://datasheets.maxim-ic.com/en/ds/MAX31855.pdf
+NoConn ~ 6500 4250
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+Text Label 4700 4250 1    40   ~ 0
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+TCPL+
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+/CS
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+SCK
+$EndSCHEMATC