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508d497db1
commit
4d508693c4
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@ -32,15 +32,7 @@ BEQ UseDFU
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UseDFU:
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UseDFU:
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// AN2606 Application note
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// AN2606 Application note
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// STM32 microcontroller system memory boot mode
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// STM32 microcontroller system memory boot mode
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LDR R0, =0x40023844 // RCC_APB2ENR
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#include "dfu_init.h"
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LDR R1, =0x00004000 // ENABLE SYSCFG CLOCK
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STR R1, [R0, #0]
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LDR R0, =0x40013800 // SYSCFG_MEMRMP
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LDR R1, =0x00000001 // MAP ROM AT ZERO
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STR R1, [R0, #0]
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LDR R0, =0x1FFF0000 // ROM BASE
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LDR SP,[R0, #0] // SP @ +0
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LDR R0,[R0, #4] // PC @ +4
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BX R0 // this jumps to DFU bootloader
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BX R0 // this jumps to DFU bootloader
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// I believe we are never executing this line
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// I believe we are never executing this line
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// [rusefi][DFU][end]
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// [rusefi][DFU][end]
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@ -0,0 +1,21 @@
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/*
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* dfu_init.h
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*
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* @date Aug 3, 2019
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* @author Andrey Belomutskiy, (c) 2012-2017
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*/
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#ifndef HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
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#define HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_
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LDR R0, =0x40023844 // RCC_APB2ENR
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LDR R1, =0x00004000 // ENABLE SYSCFG CLOCK
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STR R1, [R0, #0]
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LDR R0, =0x40013800 // SYSCFG_MEMRMP
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LDR R1, =0x00000001 // MAP ROM AT ZERO
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STR R1, [R0, #0]
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LDR R0, =0x1FFF0000 // ROM BASE
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LDR SP,[R0, #0] // SP @ +0
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LDR R0,[R0, #4] // PC @ +4
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#endif /* HW_LAYER_PORTS_STM32_STM32F4_DFU_INIT_H_ */
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@ -0,0 +1,17 @@
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/*
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* dfu_init.h
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*
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* @date Aug 3, 2019
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* @author Andrey Belomutskiy, (c) 2012-2017
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*/
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#ifndef HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_
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#define HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_
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LDR R1, =0xE000ED00
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LDR R0, =0x1FF00000
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STR R0, [R1, #8]
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LDR SP, [R0, #0]
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LDR R0, [R0, #4]
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#endif /* HW_LAYER_PORTS_STM32_STM32F7_DFU_INIT_H_ */
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