goodbye f746 (#2309)
This commit is contained in:
Matthew Kennedy
GitHub
parent
14adde123b
commit
58c18f8df9
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@ -12,7 +12,7 @@ jobs:
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matrix:
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# What boards should we build for? In the 'include' section below,
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# set up what each of these boards needs to build.
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build-target: [hellen72, cypress, frankenso_na6, kinetis, mre_f4, mre_f4_recovery, mre_f4_hardware_QC_special_build, mre_f7, prometheus_405, prometheus_469, proteus_f4, proteus_f4_hardware_QC_special_build, proteus_f7, stm32f746_nucleo, stm32f767_nucleo]
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build-target: [hellen72, cypress, frankenso_na6, kinetis, mre_f4, mre_f4_recovery, mre_f4_hardware_QC_special_build, mre_f7, prometheus_405, prometheus_469, proteus_f4, proteus_f4_hardware_QC_special_build, proteus_f7, stm32f767_nucleo]
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include:
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# Board configurations
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@ -70,12 +70,6 @@ jobs:
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folder: proteus
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ini-file: rusefi_proteus_f7.ini
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- build-target: stm32f746_nucleo
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folder: nucleo_f746
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ini-file: no
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console-settings: firmware/config/boards/nucleo_f767/rusefi_console_properties.xml
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skip-config: yes
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- build-target: stm32f767_nucleo
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folder: nucleo_f767
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ini-file: no
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@ -1,2 +0,0 @@
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@echo off
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bash.exe compile_stm32f746_nucleo.sh
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@ -1,135 +0,0 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/*
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* ST32F746xG generic setup.
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*
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* RAM0 - Data, Heap.
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* RAM3 - Main Stack, Process Stack, BSS, NOCACHE, ETH.
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*
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* Notes:
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* BSS is placed in DTCM RAM in order to simplify DMA buffers management.
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*/
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MEMORY
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{
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flash0 (rx) : org = 0x08000000, len = 1M /* Flash as AXIM (writable) */
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flash1 (rx) : org = 0x00200000, len = 1M /* Flash as ITCM */
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flash2 (rx) : org = 0x00000000, len = 0
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flash3 (rx) : org = 0x00000000, len = 0
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flash4 (rx) : org = 0x00000000, len = 0
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flash5 (rx) : org = 0x00000000, len = 0
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flash6 (rx) : org = 0x00000000, len = 0
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flash7 (rx) : org = 0x00000000, len = 0
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ram0 (wx) : org = 0x20010000, len = 256k /* SRAM1 + SRAM2 */
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/* let's hide since it overlaps with ram0 ram1 : org = 0x20010000, len = 240k*/ /* SRAM1 */
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/* let's hide since it overlaps with ram0 ram2 : org = 0x2004C000, len = 16k*/ /* SRAM2 */
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ram3 (wx) : org = 0x20000000, len = 64k /* DTCM-RAM */
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ram4 (wx) : org = 0x00000000, len = 16k /* ITCM-RAM */
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ram5 (wx) : org = 0x40024000, len = 4k /* BCKP SRAM */
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ram6 (wx) : org = 0x00000000, len = 0
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ram7 (wx) : org = 0x00000000, len = 0
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}
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/* For each data/text section two region are defined, a virtual region
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and a load region (_LMA suffix).*/
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/* Flash region to be used for exception vectors.*/
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REGION_ALIAS("VECTORS_FLASH", flash1);
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REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
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/* Flash region to be used for constructors and destructors.*/
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REGION_ALIAS("XTORS_FLASH", flash1);
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REGION_ALIAS("XTORS_FLASH_LMA", flash0);
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/* Flash region to be used for code text.*/
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REGION_ALIAS("TEXT_FLASH", flash1);
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REGION_ALIAS("TEXT_FLASH_LMA", flash0);
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/* Flash region to be used for read only data.*/
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REGION_ALIAS("RODATA_FLASH", flash0);
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REGION_ALIAS("RODATA_FLASH_LMA", flash0);
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/* Flash region to be used for various.*/
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REGION_ALIAS("VARIOUS_FLASH", flash1);
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REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
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/* Flash region to be used for RAM(n) initialization data.*/
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REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
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/* RAM region to be used for Main stack. This stack accommodates the processing
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of all exceptions and interrupts.*/
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REGION_ALIAS("MAIN_STACK_RAM", ram3);
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/* RAM region to be used for the process stack. This is the stack used by
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the main() function.*/
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REGION_ALIAS("PROCESS_STACK_RAM", ram3);
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/* RAM region to be used for data segment.*/
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REGION_ALIAS("DATA_RAM", ram0);
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REGION_ALIAS("DATA_RAM_LMA", flash0);
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/* RAM region to be used for BSS segment.*/
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REGION_ALIAS("BSS_RAM", ram0);
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/* RAM region to be used for the default heap.*/
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REGION_ALIAS("HEAP_RAM", ram0);
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/* Stack rules inclusion.*/
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INCLUDE rules_stacks.ld
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/*===========================================================================*/
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/* Custom sections for STM32F7xx. */
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/*===========================================================================*/
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/* RAM region to be used for nocache segment.*/
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REGION_ALIAS("NOCACHE_RAM", ram3);
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/* RAM region to be used for eth segment.*/
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REGION_ALIAS("ETH_RAM", ram3);
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SECTIONS
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{
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/* Special section for non cache-able areas.*/
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.nocache (NOLOAD) : ALIGN(4)
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{
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__nocache_base__ = .;
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*(.nocache)
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*(.nocache.*)
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*(.bss.__nocache_*)
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. = ALIGN(4);
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__nocache_end__ = .;
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} > NOCACHE_RAM
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/* Special section for Ethernet DMA non cache-able areas.*/
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.eth (NOLOAD) : ALIGN(4)
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{
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__eth_base__ = .;
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*(.eth)
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*(.eth.*)
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*(.bss.__eth_*)
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. = ALIGN(4);
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__eth_end__ = .;
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} > ETH_RAM
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}
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/* Code rules inclusion.*/
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INCLUDE rules_code.ld
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/* Data rules inclusion.*/
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INCLUDE rules_data.ld
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/* Memory rules inclusion.*/
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INCLUDE rules_memory.ld
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File diff suppressed because it is too large
Load Diff
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@ -1,17 +0,0 @@
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# List of all the board related files.
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BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_F746ZG/board.c
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BOARDCPPSRC = $(PROJECT_DIR)/config/boards/nucleo_f767/board_configuration.cpp
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# Required include directories
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BOARDINC = $(PROJECT_DIR)/config/boards/nucleo_f746 $(PROJECT_DIR)/config/stm32f7ems
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CONFDIR = config/stm32f7ems
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LDSCRIPT = $(PROJECT_DIR)/config/boards/nucleo_f746/STM32F746xG.ld
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# Override DEFAULT_ENGINE_TYPE
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DDEFS += -DDEFAULT_ENGINE_TYPE=DEFAULT_FRANKENSO -DSTM32F746xx
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# Shared variables
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ALLCSRC += $(BOARDSRC)
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ALLCPPSRC += $(BOARDCPPSRC)
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ALLINC += $(BOARDINC)
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@ -1,21 +0,0 @@
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#!/bin/bash
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# STM32F767 version of the firmware for Nucleo-F746ZG board
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SCRIPT_NAME="compile_nucleo_f746.sh"
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echo "Entering $SCRIPT_NAME"
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export PROJECT_BOARD=nucleo_f746
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export PROJECT_CPU=ARCH_STM32F7
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export EXTRA_PARAMS="-DDUMMY -DSTM32F746xx \
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-DEFI_INJECTOR_PIN3=GPIO_UNASSIGNED \
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-DEFI_COMMUNICATION_PIN=GPIOB_7 \
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-DFIRMWARE_ID=\\\"nucleo746\\\" \
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-DLED_CRITICAL_ERROR_BRAIN_PIN=GPIOB_14 \
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-DEFI_TOOTH_LOGGER=FALSE \
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-DRAM_UNUSED_SIZE=10 \
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-DSTATUS_LOGGING_BUFFER_SIZE=1400 \
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-DCCM_UNUSED_SIZE=10"
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export DEBUG_LEVEL_OPT="-O2"
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bash ../common_make.sh
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@ -73,11 +73,6 @@ IF %ERRORLEVEL% NEQ 0 echo ERROR invoking compile_and_upload.bat
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IF %ERRORLEVEL% NEQ 0 EXIT /B 1
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pwd
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call misc\jenkins\compile_other_versions\compile_and_upload.bat nucleo_f746 stm32f746_nucleo no %f7_console_setting%
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IF %ERRORLEVEL% NEQ 0 echo ERROR invoking compile_and_upload.bat
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IF %ERRORLEVEL% NEQ 0 EXIT /B 1
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pwd
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call misc\jenkins\compile_other_versions\compile_and_upload.bat nucleo_f767 stm32f767_nucleo no %f7_console_setting%
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IF %ERRORLEVEL% NEQ 0 echo ERROR invoking compile_and_upload.bat
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