auto-sync

hardware/HighSideSwitch/VN750PS_E.pro

@@ -1,14 +1,38 @@
-update=7/17/2015 12:48:22 PM
+update=02/01/2016 11:30:27
 version=1
-last_client=kicad
+last_client=eeschema
 [cvpcb]
 version=1
 NetIExt=net
 [general]
 version=1
+[pcbnew]
+version=1
+PageLayoutDescrFile=
+LastNetListRead=
+PadDrill=0.6
+PadDrillOvalY=0.6
+PadSizeH=1.5
+PadSizeV=1.5
+PcbTextSizeV=1.5
+PcbTextSizeH=1.5
+PcbTextThickness=0.3
+ModuleTextSizeV=1
+ModuleTextSizeH=1
+ModuleTextSizeThickness=0.15
+SolderMaskClearance=0
+SolderMaskMinWidth=0
+DrawSegmentWidth=0.2
+BoardOutlineThickness=0.2
+ModuleOutlineThickness=0.15
 [eeschema]
 version=1
-LibDir=
+LibDir=../rusefi_lib
+NetFmtName=
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
 [eeschema/libraries]
 LibName1=power
 LibName2=device
@@ -40,23 +64,3 @@ LibName27=atmel
 LibName28=contrib
 LibName29=valves
 LibName30=vn750ps_e
-LibName31=C:/rusefi/SpillyHardware/VN5E050AJ_E_Vertical/VN5E050AJ_E
-[pcbnew]
-version=1
-PageLayoutDescrFile=
-LastNetListRead=
-PadDrill=0.6
-PadDrillOvalY=0.6
-PadSizeH=1.5
-PadSizeV=1.5
-PcbTextSizeV=1.5
-PcbTextSizeH=1.5
-PcbTextThickness=0.3
-ModuleTextSizeV=1
-ModuleTextSizeH=1
-ModuleTextSizeThickness=0.15
-SolderMaskClearance=0
-SolderMaskMinWidth=0
-DrawSegmentWidth=0.2
-BoardOutlineThickness=0.2
-ModuleOutlineThickness=0.15

hardware/rusefi_lib/vn750ps_e.lib

@@ -0,0 +1,24 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# VN750PS_E
+#
+DEF VN750PS_E Q 0 40 Y Y 1 F N
+F0 "Q" 1850 450 60 H V C CNN
+F1 "VN750PS_E" 1850 1650 60 H V C CNN
+F2 "" 1850 450 60 H V C CNN
+F3 "" 1850 450 60 H V C CNN
+DRAW
+S 1350 1450 2300 600 0 1 0 N
+X GND 1 1150 1250 200 R 50 50 1 1 I
+X INPUT 2 1150 1100 200 R 50 50 1 1 I
+X STATUS 3 1150 950 200 R 50 50 1 1 I
+X N.C. 4 1150 800 200 R 50 50 1 1 I
+X VCC 5 2500 800 200 L 50 50 1 1 I
+X OUTPUT 6 2500 950 200 L 50 50 1 1 O
+X OUTPUT 7 2500 1100 200 L 50 50 1 1 O
+X VCC 8 2500 1250 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+#End Library