auto-sync
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a8118d4312
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@ -271,39 +271,73 @@ typedef struct {
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* offset 336
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* offset 336
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*/
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*/
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brain_pin_e canRxPin;
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brain_pin_e canRxPin;
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/**
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* offset 340
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*/
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brain_pin_e triggerSimulatorPins[TRIGGER_SIMULATOR_PIN_COUNT];
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brain_pin_e triggerSimulatorPins[TRIGGER_SIMULATOR_PIN_COUNT];
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/**
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* offset 352
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*/
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pin_output_mode_e triggerSimulatorPinModes[TRIGGER_SIMULATOR_PIN_COUNT];
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pin_output_mode_e triggerSimulatorPinModes[TRIGGER_SIMULATOR_PIN_COUNT];
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/**
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* offset 364
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*/
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brain_pin_e o2heaterPin;
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brain_pin_e o2heaterPin;
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/**
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* offset 368
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*/
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pin_output_mode_e o2heaterPinModeTodO;
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pin_output_mode_e o2heaterPinModeTodO;
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unsigned int is_enabled_spi_1 : 1; // bit 0
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/** offset 372 bit 0 */
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unsigned int is_enabled_spi_2 : 1; // bit 1
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uint32_t is_enabled_spi_1 : 1;
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unsigned int is_enabled_spi_3 : 1; // bit 2
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/** offset 372 bit 1 */
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unsigned int isSdCardEnabled : 1; // bit 3
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uint32_t is_enabled_spi_2 : 1;
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unsigned int isFastAdcEnabled : 1; // bit 4
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/** offset 372 bit 2 */
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unsigned int isEngineControlEnabled : 1; // bit 5
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uint32_t is_enabled_spi_3 : 1;
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unsigned int isHip9011Enabled : 1; // bit 6
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/** offset 372 bit 3 */
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uint32_t isSdCardEnabled : 1;
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/** offset 372 bit 4 */
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uint32_t isFastAdcEnabled : 1;
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/** offset 372 bit 5 */
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uint32_t isEngineControlEnabled : 1;
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/** offset 372 bit 6 */
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uint32_t isHip9011Enabled : 1;
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/**
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* offset 376
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*/
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brain_pin_e logicAnalyzerPins[LOGIC_ANALYZER_CHANNEL_COUNT];
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brain_pin_e logicAnalyzerPins[LOGIC_ANALYZER_CHANNEL_COUNT];
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/**
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/**
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* default or inverted input
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* default or inverted input
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*/
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* offset 392
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*/
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uint8_t logicAnalyzerMode[LOGIC_ANALYZER_CHANNEL_COUNT];
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uint8_t logicAnalyzerMode[LOGIC_ANALYZER_CHANNEL_COUNT];
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/**
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* offset 396
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*/
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int unrealisticRpmThreashold;
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int unrealisticRpmThreashold;
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/**
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* offset 400
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*/
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pin_output_mode_e mainRelayPinMode;
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pin_output_mode_e mainRelayPinMode;
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/**
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* offset 404
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*/
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egt_cs_array_t max31855_cs;
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egt_cs_array_t max31855_cs;
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/**
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* offset 408
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*/
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spi_device_e max31855spiDevice;
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spi_device_e max31855spiDevice;
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/**
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* offset 412
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*/
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brain_pin_e fsioPins[LE_COMMAND_COUNT];
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brain_pin_e fsioPins[LE_COMMAND_COUNT];
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/**
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* offset 476
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*/
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pin_output_mode_e gpioPinModes[LE_COMMAND_COUNT];
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pin_output_mode_e gpioPinModes[LE_COMMAND_COUNT];
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/**
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* offset 540
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*/
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brain_pin_e joystickPins[JOYSTICK_PIN_COUNT];
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brain_pin_e joystickPins[JOYSTICK_PIN_COUNT];
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/**
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/**
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@ -2,7 +2,7 @@
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! this file defines the format of rusEfi persistent configuration structure
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! this file defines the format of rusEfi persistent configuration structure
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! this file is processed by ../java_tools/config_definition.jar tool
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! this file is processed by ../java_tools/config_definition.jar tool
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!
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!
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! comments start with '#'
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! comments start with '!'
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!
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!
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! each field is declared as
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! each field is declared as
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! type name;comment
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! type name;comment
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@ -305,6 +305,41 @@ spi_device_e digitalPotentiometerSpiDevice;Digital Potentiometer is used by stoc
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brain_pin_e canTxPin;
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brain_pin_e canTxPin;
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brain_pin_e canRxPin;
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brain_pin_e canRxPin;
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#define TRIGGER_SIMULATOR_PIN_COUNT 3
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brain_pin_e[TRIGGER_SIMULATOR_PIN_COUNT] triggerSimulatorPins;
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pin_output_mode_e[TRIGGER_SIMULATOR_PIN_COUNT] triggerSimulatorPinModes;
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brain_pin_e o2heaterPin;
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pin_output_mode_e o2heaterPinModeTodO;
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bit is_enabled_spi_1
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bit is_enabled_spi_2
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bit is_enabled_spi_3
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bit isSdCardEnabled
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bit isFastAdcEnabled
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bit isEngineControlEnabled
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bit isHip9011Enabled
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#define LOGIC_ANALYZER_CHANNEL_COUNT 4
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brain_pin_e[LOGIC_ANALYZER_CHANNEL_COUNT] logicAnalyzerPins;
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uint8_t[LOGIC_ANALYZER_CHANNEL_COUNT] logicAnalyzerMode;default or inverted input
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int unrealisticRpmThreashold;
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pin_output_mode_e mainRelayPinMode;
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egt_cs_array_t max31855_cs;
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spi_device_e max31855spiDevice;
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#define LE_COMMAND_COUNT 16
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brain_pin_e[LE_COMMAND_COUNT] fsioPins;
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pin_output_mode_e[LE_COMMAND_COUNT] gpioPinModes;
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brain_pin_e[JOYSTICK_PIN_COUNT] joystickPins;
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end_struct
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end_struct
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