rusefi
/
custom-board-bundle-sample-fork-of-rusefi
mirror of https://github.com/rusefi/custom-board-bundle-sample-fork-of-rusefi.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Changing ChibiOS repo to rusefi, updating code accordingly.

This commit is contained in:
Fabien Poussin 2017-03-22 17:53:09 +01:00
parent 3b851fb3f3
commit bac75b2e3e
8 changed files with 67 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
.gitmodules vendored
View File

@ -1,4 +1,4 @@
[submodule "firmware/ChibiOS"] [submodule "firmware/ChibiOS"]
path = firmware/ChibiOS path = firmware/ChibiOS
url = https://github.com/ChibiOS/ChibiOS.git url = https://github.com/rusefi/ChibiOS.git
branch = stable_16.1.x branch = stable_rusefi

2
firmware/ChibiOS

@ -1 +1 @@
Subproject commit 7cac0e4b0889b9f22fb998e48ac2a5e3f06e0b93 Subproject commit 3f25f7b5e9e81dd6135c7df7c82782a685acf648

2
firmware/Makefile
View File

@ -99,7 +99,6 @@ include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
# HAL-OSAL files (optional). # HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
include $(CHIBIOS)/os/hal/boards/$(PROJECT_BOARD)/board.mk
include $(CHIBIOS)/os/hal/osal/rt/osal.mk include $(CHIBIOS)/os/hal/osal/rt/osal.mk
# RTOS files (optional). # RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk include $(CHIBIOS)/os/rt/rt.mk
@ -110,6 +109,7 @@ include $(CHIBIOS)/os/various/cpp_wrappers/chcpp.mk
include console/binary/tunerstudio.mk include console/binary/tunerstudio.mk
include ext/ext.mk include ext/ext.mk
include $(PROJECT_DIR)/boards/$(PROJECT_BOARD)/board.mk
include $(PROJECT_DIR)/hw_layer/hw_layer.mk include $(PROJECT_DIR)/hw_layer/hw_layer.mk
include $(PROJECT_DIR)/hw_layer/sensors/sensors.mk include $(PROJECT_DIR)/hw_layer/sensors/sensors.mk
include $(PROJECT_DIR)/hw_layer/mass_storage/mass_storage.mk include $(PROJECT_DIR)/hw_layer/mass_storage/mass_storage.mk

44
firmware/config/stm32f4ems/chconf.h
View File

@ -28,6 +28,29 @@
#ifndef _CHCONF_H_ #ifndef _CHCONF_H_
#define _CHCONF_H_ #define _CHCONF_H_
#define COMMON_IRQ_PRIORITY 6
#define CORTEX_PRIORITY_SYSTICK COMMON_IRQ_PRIORITY
#define PORT_IDLE_THREAD_STACK_SIZE 1024
#define PORT_INT_REQUIRED_STACK 768
#define CHPRINTF_USE_FLOAT TRUE
#if EFI_CLOCK_LOCKS
#ifdef __cplusplus
extern "C"
{
#endif /* __cplusplus */
void onLockHook(void);
void onUnlockHook(void);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#define ON_LOCK_HOOK onLockHook()
#define ON_UNLOCK_HOOK onUnlockHook()
#else /* EFI_CLOCK_LOCKS */
#define ON_LOCK_HOOK
#define ON_UNLOCK_HOOK
#endif /* EFI_CLOCK_LOCKS */
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @name System timers settings * @name System timers settings
@ -79,7 +102,7 @@
* @note The round robin preemption is not supported in tickless mode and * @note The round robin preemption is not supported in tickless mode and
* must be set to zero in that case. * must be set to zero in that case.
*/ */
#define CH_CFG_TIME_QUANTUM 0 #define CH_CFG_TIME_QUANTUM 20
/** /**
* @brief Managed RAM size. * @brief Managed RAM size.
@ -92,7 +115,7 @@
* provide the @p __heap_base__ and @p __heap_end__ symbols. * provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_CFG_USE_MEMCORE. * @note Requires @p CH_CFG_USE_MEMCORE.
*/ */
#define CH_CFG_MEMCORE_SIZE 0 #define CH_CFG_MEMCORE_SIZE 2048
/** /**
* @brief Idle thread automatic spawn suppression. * @brief Idle thread automatic spawn suppression.
@ -309,7 +332,7 @@
* @note Requires @p CH_CFG_USE_WAITEXIT. * @note Requires @p CH_CFG_USE_WAITEXIT.
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS. * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
*/ */
#define CH_CFG_USE_DYNAMIC TRUE #define CH_CFG_USE_DYNAMIC FALSE
/** @} */ /** @} */
@ -488,6 +511,7 @@
*/ */
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ #define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
/* System halt code here.*/ \ /* System halt code here.*/ \
chDbgPanic3(reason, __FILE__, __LINE__); \
} }
/** @} */ /** @} */
@ -496,12 +520,26 @@
/* Port-specific settings (override port settings defaulted in chcore.h). */ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/ /*===========================================================================*/
#ifndef __ASSEMBLER__
#if !CH_DBG_SYSTEM_STATE_CHECK #if !CH_DBG_SYSTEM_STATE_CHECK
extern cnt_t dbg_lock_cnt; extern cnt_t dbg_lock_cnt;
#define dbg_enter_lock() {dbg_lock_cnt = 1;ON_LOCK_HOOK;} #define dbg_enter_lock() {dbg_lock_cnt = 1;ON_LOCK_HOOK;}
#define dbg_leave_lock() {ON_UNLOCK_HOOK;dbg_lock_cnt = 0;} #define dbg_leave_lock() {ON_UNLOCK_HOOK;dbg_lock_cnt = 0;}
#endif #endif
void chDbgPanic3(const char *msg, const char * file, int line);
#endif
/**
* declared as a macro so that this code does not use stack
* so that it would not crash the error handler in case of stack issues
*/
#if CH_DBG_SYSTEM_STATE_CHECK
#define hasFatalError() (ch.dbg.panic_msg != NULL)
#else
#define hasFatalError() (FALSE)
#endif
#endif /* _CHCONF_H_ */ #endif /* _CHCONF_H_ */
/** @} */ /** @} */

29
firmware/config/stm32f4ems/mcuconf.h
View File

@ -21,7 +21,6 @@
#include "rusefi_enums.h" #include "rusefi_enums.h"
#define SCHEDULING_TIMER_PRIORITY 4 #define SCHEDULING_TIMER_PRIORITY 4
#define ICU_PRIORITY 3 #define ICU_PRIORITY 3
/* /*
@ -47,7 +46,7 @@
#define STM32_HSI_ENABLED TRUE #define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE #define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE #define STM32_LSE_ENABLED TRUE
#define STM32_CLOCK48_REQUIRED TRUE #define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL #define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLSRC STM32_PLLSRC_HSE
@ -58,7 +57,11 @@
#define STM32_HPRE STM32_HPRE_DIV1 #define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4 #define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV2
#if STM32_LSE_ENABLED
#define STM32_RTCSEL STM32_RTCSEL_LSE
#else
#define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCSEL STM32_RTCSEL_LSI
#endif
#define STM32_RTCPRE_VALUE 8 #define STM32_RTCPRE_VALUE 8
#define STM32_MCO1SEL STM32_MCO1SEL_HSI #define STM32_MCO1SEL STM32_MCO1SEL_HSI
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1 #define STM32_MCO1PRE STM32_MCO1PRE_DIV1
@ -147,7 +150,7 @@
#define STM32_GPT_TIM2_IRQ_PRIORITY 7 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7 #define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7 #define STM32_GPT_TIM5_IRQ_PRIORITY SCHEDULING_TIMER_PRIORITY
#define STM32_GPT_TIM6_IRQ_PRIORITY 7 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7
@ -202,13 +205,13 @@
#define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 TRUE #define STM32_ICU_USE_TIM9 TRUE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM1_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM3_IRQ_PRIORITY 7 #define STM32_ICU_TIM3_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM4_IRQ_PRIORITY 7 #define STM32_ICU_TIM4_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM5_IRQ_PRIORITY 7 #define STM32_ICU_TIM5_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM8_IRQ_PRIORITY 7 #define STM32_ICU_TIM8_IRQ_PRIORITY ICU_PRIORITY
#define STM32_ICU_TIM9_IRQ_PRIORITY 7 #define STM32_ICU_TIM9_IRQ_PRIORITY ICU_PRIORITY
/* /*
* MAC driver system settings. * MAC driver system settings.
@ -285,7 +288,7 @@
#define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("STM32_SPI_DMA_ERROR_HOOK")
/* /*
* ST driver system settings. * ST driver system settings.
@ -326,7 +329,7 @@
#define STM32_UART_UART4_DMA_PRIORITY 0 #define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0 #define STM32_UART_UART5_DMA_PRIORITY 0
#define STM32_UART_USART6_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") #define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("STM32_UART_DMA_ERROR_HOOK")
/* /*
* USB driver system settings. * USB driver system settings.
@ -338,7 +341,7 @@
#define STM32_USB_OTG1_RX_FIFO_SIZE 512 #define STM32_USB_OTG1_RX_FIFO_SIZE 512
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO #define STM32_USB_OTG_THREAD_PRIO LOWPRIO
#define STM32_USB_OTG_THREAD_STACK_SIZE 128 #define STM32_USB_OTG_THREAD_STACK_SIZE 1024
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 #define STM32_USB_OTGFIFO_FILL_BASEPRI 0
/* /*

12
firmware/controllers/algo/error_handling.h
View File

@ -40,18 +40,6 @@ void firmwareError(obd_code_e code, const char *fmt, ...);
char *getFirmwareError(void); char *getFirmwareError(void);
/**
* declared as a macro so that this code does not use stack
* so that it would not crash the error handler in case of stack issues
*/
#if CH_DBG_SYSTEM_STATE_CHECK
#define hasFatalError() (ch.dbg.panic_msg != NULL)
#else
#define hasFatalError() (FALSE)
#endif
void chDbgPanic3(const char *msg, const char * file, int line);
void initErrorHandling(void); void initErrorHandling(void);
char *getWarning(void); char *getWarning(void);

8
firmware/global.h
View File

@ -16,10 +16,6 @@ extern "C"
#include <ch.h> #include <ch.h>
#include <hal.h> #include <hal.h>
#ifdef __cplusplus
}
#endif /* __cplusplus */
#include <string.h> #include <string.h>
#define DEFAULT_ENGINE_TYPE CUSTOM_ENGINE #define DEFAULT_ENGINE_TYPE CUSTOM_ENGINE
@ -125,4 +121,8 @@ typedef unsigned int time_t;
*/ */
int getRemainingStack(thread_t *otp); int getRemainingStack(thread_t *otp);
#ifdef __cplusplus
}
#endif /* __cplusplus */
#endif /* GLOBAL_H_ */ #endif /* GLOBAL_H_ */

2
firmware/hw_layer/stm32f4/mpu_util.cpp
View File

@ -16,7 +16,7 @@
EXTERN_ENGINE; EXTERN_ENGINE;
extern "C" { extern "C" {
//int getRemainingStack(thread_t *otp); int getRemainingStack(thread_t *otp);
void prvGetRegistersFromStack(uint32_t *pulFaultStackAddress); void prvGetRegistersFromStack(uint32_t *pulFaultStackAddress);
} }