This way you can use the console/TunerStudio with the ST-Link
In the process, combine TS_PRIMARY_UART and TS_PRIMARY_SERIAL into TS_PRIMARY_PORT, to make UART vs
SERIAL selection more robus. Ditto for TS_SECONDARY_*. Also change use of TS_NO_PRIMARY to be #if
not #ifdef, so that it can be properly set as a compile flag and not be overwritten by various
header files.
* fast exti
* test code snuck in
* full interrupt disable :(
* do it the old fashioned way
* enable interrupt
* consume stored timestamp
* dead
* h7 maybe
* guard maybe
* non-stm32
* exti 16 wrong on f4/f7
* CORTEX_MAXIMUM_PRIORITY
* safer but uglier
* s
* chibios
* no const
* initializers
Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
* static functions with (void)
* more
* Revert "more"
This reverts commit 246e53441f935451437df186ac92d7df26b62fb6.
* s
Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
* Makefile: define BOOTLOADER=1 for linker in case of OpenBLT too
This will reserve first 32K of flash for bootloader.
* OpenBLT: include into build
* board: subaru eg33: add OpenBLT board code
* board: subaru eg33: use OpenBLT
* Board: Subaru EG33: OpenBLT: reuse HAL and CMSIS from OpenBLT submodule
* Board: Subaru EG33: OpenBLT: reuse linker file from OpenBLT too
* OpenBLT for MRE
* OpenBLT: MRE: adjust LD memory map for smallest variat of MCU on MRE
* OpenBLT: enable for MRE
* OpenBLT: disable CRC check of user application
This allows us to use DFU tool to flash main application too.
* hex2dfu: fresh binary for linux
* OpenBLT: extract common part of OpenBLT makefiles to openblt.mk
* OpenBLT: enable CRC check of user application for MRE and EG33
CRC (actually just a summ) of few first vectors is stored at 0x1c
offset. This is reserved vector for Cortex-M3, M4 and M7
* common_make: append OpenBLT CRC to dfu files
This should allow to use DFU to do main application update when
when OpenBLT is used as bootloader. hex2dfu will store same
styled CRC as OpenBLT expects to see in user app.
* OpenBLT reorganization
Move common stuff to hw_layer/ports/
* OpenBLT: proteus
* Proteus: enable OpenBLT for F4 and F7
Compilation tested only
* dead fast tps
* oooooh map avg on hh7
* adc v4 fast support
* new fast API
* hardware.cpp
* adc v2
* warning
* guard
* no check required
* stub cypress/kinetis
* kinetis and cypress stubs
* big pch energy
* put back ramdisk stub
* tests are happy
* h743 nucleo
* kinetis
* I love deleting code!
* make stepper happy
Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
* STM32F7xx: flash write parallelism settings
Datasheed allows 32bit program operation only for 2.7..3.0
While RM defines wider range...
* Add parentheses to defines
* intFlash: show all errors to user
Currently only erase error was exported to user. Flash write error
was silent. Also define few additional error codes and show it to
user.
* detect hse
* implementation
* these boards don't need to set their own HSECLK
* assertions
* name
* tweaks
* how did this compile?
* s
* biiiig comment
* this script doesn't need to set 25mhz any more
* ....or PLLM
Co-authored-by: Matthew Kennedy <makenne@microsoft.com>
* lua on f4
* move perf trace to efifeatures
* check that it's defined
* cypress and kinetis
* it would help to define the correct thing
* disable buffer if not used
* we can work with 2k
* turn off ramdisk on mre qc
* wow strncpy is useless for truncated strings
* turn off for bootloader
* lto bootloader
* memory
* memory
* lua on f4
* move perf trace to efifeatures
* check that it's defined
* cypress and kinetis
* it would help to define the correct thing
* disable buffer if not used
* we can work with 2k
* turn off ramdisk on mre qc
* wow strncpy is useless for truncated strings
* turn off for bootloader
* lto bootloader