mirror of https://github.com/rusefi/emfat.git
311 lines
9.4 KiB
ArmAsm
311 lines
9.4 KiB
ArmAsm
/*
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ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
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This file is part of ChibiOS.
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ChibiOS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file crt0_v7m.s
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* @brief Generic ARMv7-M (Cortex-M3/M4/M7) startup file for ChibiOS.
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*
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* @addtogroup ARMCMx_GCC_STARTUP_V7M
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* @{
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*/
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/*===========================================================================*/
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/* Module constants. */
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/*===========================================================================*/
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#if !defined(FALSE) || defined(__DOXYGEN__)
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#define FALSE 0
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#endif
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#if !defined(TRUE) || defined(__DOXYGEN__)
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#define TRUE 1
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#endif
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#define CONTROL_MODE_PRIVILEGED 0
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#define CONTROL_MODE_UNPRIVILEGED 1
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#define CONTROL_USE_MSP 0
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#define CONTROL_USE_PSP 2
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#define CONTROL_FPCA 4
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#define FPCCR_ASPEN (1 << 31)
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#define FPCCR_LSPEN (1 << 30)
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#define SCB_CPACR 0xE000ED88
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#define SCB_FPCCR 0xE000EF34
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#define SCB_FPDSCR 0xE000EF3C
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/*===========================================================================*/
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/* Module pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @brief FPU initialization switch.
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*/
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#if !defined(CRT0_INIT_FPU) || defined(__DOXYGEN__)
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#if defined(CORTEX_USE_FPU) || defined(__DOXYGEN__)
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#define CRT0_INIT_FPU CORTEX_USE_FPU
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#else
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#define CRT0_INIT_FPU FALSE
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#endif
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#endif
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/**
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* @brief Control special register initialization value.
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* @details The system is setup to run in privileged mode using the PSP
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* stack (dual stack mode).
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*/
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#if !defined(CRT0_CONTROL_INIT) || defined(__DOXYGEN__)
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#define CRT0_CONTROL_INIT (CONTROL_USE_PSP | \
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CONTROL_MODE_PRIVILEGED)
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#endif
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/**
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* @brief Core initialization switch.
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*/
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#if !defined(CRT0_INIT_CORE) || defined(__DOXYGEN__)
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#define CRT0_INIT_CORE TRUE
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#endif
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/**
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* @brief Stack segments initialization switch.
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*/
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#if !defined(CRT0_STACKS_FILL_PATTERN) || defined(__DOXYGEN__)
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#define CRT0_STACKS_FILL_PATTERN 0x55555555
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#endif
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/**
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* @brief Stack segments initialization switch.
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*/
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#if !defined(CRT0_INIT_STACKS) || defined(__DOXYGEN__)
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#define CRT0_INIT_STACKS TRUE
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#endif
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/**
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* @brief DATA segment initialization switch.
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*/
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#if !defined(CRT0_INIT_DATA) || defined(__DOXYGEN__)
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#define CRT0_INIT_DATA TRUE
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#endif
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/**
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* @brief BSS segment initialization switch.
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*/
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#if !defined(CRT0_INIT_BSS) || defined(__DOXYGEN__)
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#define CRT0_INIT_BSS TRUE
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#endif
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/**
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* @brief Constructors invocation switch.
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*/
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#if !defined(CRT0_CALL_CONSTRUCTORS) || defined(__DOXYGEN__)
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#define CRT0_CALL_CONSTRUCTORS TRUE
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#endif
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/**
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* @brief Destructors invocation switch.
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*/
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#if !defined(CRT0_CALL_DESTRUCTORS) || defined(__DOXYGEN__)
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#define CRT0_CALL_DESTRUCTORS TRUE
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#endif
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/**
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* @brief FPU FPCCR register initialization value.
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* @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE.
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*/
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#if !defined(CRT0_FPCCR_INIT) || defined(__DOXYGEN__)
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#define CRT0_FPCCR_INIT (FPCCR_ASPEN | FPCCR_LSPEN)
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#endif
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/**
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* @brief CPACR register initialization value.
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* @note Only used if @p CRT0_INIT_FPU is equal to @p TRUE.
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*/
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#if !defined(CRT0_CPACR_INIT) || defined(__DOXYGEN__)
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#define CRT0_CPACR_INIT 0x00F00000
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#endif
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/*===========================================================================*/
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/* Code section. */
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/*===========================================================================*/
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#if !defined(__DOXYGEN__)
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.syntax unified
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.cpu cortex-m3
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#if CRT0_INIT_FPU == TRUE
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.fpu fpv4-sp-d16
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#else
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.fpu softvfp
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#endif
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.thumb
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.text
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/*
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* Reset handler.
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*/
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.align 2
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.thumb_func
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.global Reset_Handler
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Reset_Handler:
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/* Interrupts are globally masked initially.*/
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cpsid i
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/* PSP stack pointers initialization.*/
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ldr r0, =__process_stack_end__
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msr PSP, r0
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#if CRT0_INIT_FPU == TRUE
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/* FPU FPCCR initialization.*/
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movw r0, #CRT0_FPCCR_INIT & 0xFFFF
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movt r0, #CRT0_FPCCR_INIT >> 16
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movw r1, #SCB_FPCCR & 0xFFFF
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movt r1, #SCB_FPCCR >> 16
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str r0, [r1]
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dsb
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isb
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/* CPACR initialization.*/
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movw r0, #CRT0_CPACR_INIT & 0xFFFF
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movt r0, #CRT0_CPACR_INIT >> 16
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movw r1, #SCB_CPACR & 0xFFFF
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movt r1, #SCB_CPACR >> 16
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str r0, [r1]
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dsb
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isb
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/* FPU FPSCR initially cleared.*/
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mov r0, #0
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vmsr FPSCR, r0
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/* FPU FPDSCR initially cleared.*/
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movw r1, #SCB_FPDSCR & 0xFFFF
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movt r1, #SCB_FPDSCR >> 16
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str r0, [r1]
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/* Enforcing FPCA bit in the CONTROL register.*/
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movs r0, #CRT0_CONTROL_INIT | CONTROL_FPCA
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#else
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movs r0, #CRT0_CONTROL_INIT
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#endif
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/* CONTROL register initialization as configured.*/
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msr CONTROL, r0
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isb
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#if CRT0_INIT_CORE == TRUE
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// /* Core initialization.*/
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// bl __core_init
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#endif
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/* Early initialization.*/
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bl __early_init
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#if CRT0_INIT_STACKS == TRUE
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ldr r0, =CRT0_STACKS_FILL_PATTERN
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/* Main Stack initialization. Note, it assumes that the
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stack size is a multiple of 4 so the linker file must
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ensure this.*/
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ldr r1, =__main_stack_base__
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ldr r2, =__main_stack_end__
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msloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo msloop
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/* Process Stack initialization. Note, it assumes that the
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stack size is a multiple of 4 so the linker file must
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ensure this.*/
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ldr r1, =__process_stack_base__
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ldr r2, =__process_stack_end__
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psloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo psloop
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#endif
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#if CRT0_INIT_DATA == TRUE
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/* Data initialization. Note, it assumes that the DATA size
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is a multiple of 4 so the linker file must ensure this.*/
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ldr r1, =_textdata
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ldr r2, =_data
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ldr r3, =_edata
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dloop:
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cmp r2, r3
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ittt lo
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ldrlo r0, [r1], #4
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strlo r0, [r2], #4
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blo dloop
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#endif
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#if CRT0_INIT_BSS == TRUE
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/* BSS initialization. Note, it assumes that the DATA size
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is a multiple of 4 so the linker file must ensure this.*/
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movs r0, #0
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ldr r1, =_bss_start
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ldr r2, =_bss_end
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bloop:
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cmp r1, r2
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itt lo
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strlo r0, [r1], #4
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blo bloop
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#endif
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/* Late initialization..*/
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bl __late_init
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#if CRT0_CALL_CONSTRUCTORS == TRUE
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/* Constructors invocation.*/
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ldr r4, =__init_array_start
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ldr r5, =__init_array_end
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initloop:
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cmp r4, r5
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bge endinitloop
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ldr r1, [r4], #4
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blx r1
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b initloop
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endinitloop:
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#endif
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/* Main program invocation, r0 contains the returned value.*/
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bl main
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#if CRT0_CALL_DESTRUCTORS == TRUE
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/* Destructors invocation.*/
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ldr r4, =__fini_array_start
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ldr r5, =__fini_array_end
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finiloop:
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cmp r4, r5
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bge endfiniloop
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ldr r1, [r4], #4
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blx r1
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b finiloop
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endfiniloop:
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#endif
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/* Branching to the defined exit handler.*/
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// b __default_exit
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#endif /* !defined(__DOXYGEN__) */
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/** @} */
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