fresh

OS/os/hal/ports/ARTERY/port_mpu_util.h

@@ -9,3 +9,5 @@ typedef enum {
 	BOR_Level_2 = 2,
 	BOR_Level_3 = 3
 } BOR_Level_t;
+
+#define PORT_SIZE 16

README.md

@@ -1,10 +1,28 @@
+# Current state
+
+Some skeleton compiles but does not even link yet. nothing else
+
 # fw-AT-START-F435
 
 An attempt to blink an LED on AT-START-F435 board using ChibiOS+rusEFI codebase
 
 * https://github.com/rusefi/rusefi/tree/master/firmware/config/boards/cypress and https://github.com/rusefi/rusefi/tree/master/firmware/config/boards/kinetis are examples of custom platform for ChibiOS
-* only difference with above mentioned cypress and kinetis is here we are trying to build on top of rusEFI as a submodule
+* only difference with above mentioned cypress and kinetis is here we are trying to build on top of rusEFI as a git submodule
 * see 'ext/AT32F435_437_Firmware_Library' for Artery firmware library
 
+![image](https://github.com/rusefi/fw-AT-START-F435/assets/48498823/81af22f5-1581-429a-a370-377ecf8afcb8)
 
-Current state: just some skeleton progress nothing else
+
+# Artery Documentation
+
+https://www.arterychip.com/download/ARTERY_AT32_MCU_Cross_Reference_Table_EN_V202011.xlsx
+
+https://www.arterytek.com/download/MG0003_Migrating_from_SXX32F103_to_AT32F413_EN_V1.0.6.pdf
+
+https://www.arterytek.com/download/MG0007_Migrating_from_SXX32F103_to_AT32F403A_EN_V1.0.8.pdf
+
+https://www.arterytek.com/download/MG0009_Migrating_from_SXX32F107_to_AT32F407_EN_V1.0.4.pdf
+
+https://www.arterytek.com/download/MG/MG0018_Migrating_from_AT32F403A_407_to_AT32F435_437_EN_V2.0.3.pdf
+
+https://www.arterychip.com/download/APNOTE/AN0128_AT32F435_437_Get_started_guide_EN_V2.0.0.pdf

ext/rusefi

@@ -1 +1 @@
-Subproject commit 2b46656c125b7e83bf0849733fb8e1f66cfaf1da
+Subproject commit b53c05ada03180ef60a4fa781960e2d605aef645

hw_layer_at/hw_ports.mk

@@ -1 +1,4 @@
 MCU = cortex-m4
+
+HW_LAYER_EMS_CPP += $(ARTERY_CONTRIB)/../mpu_util.cpp
+

mpu_util.cpp

@@ -0,0 +1,42 @@
+/**
+ * @file	mpu_util.cpp
+ */
+
+#include "pch.h"
+
+void baseMCUInit(void) {
+}
+
+// copy-paste of stm32 method? reuse code?
+brain_pin_e parseBrainPin(const char *str) {
+	if (strEqual(str, "none"))
+		return Gpio::Unassigned;
+	// todo: create method toLowerCase?
+	if (str[0] != 'p' && str[0] != 'P') {
+		return Gpio::Invalid;
+	}
+	char port = str[1];
+	brain_pin_e basePin;
+	if (port >= 'a' && port <= 'z') {
+		basePin = Gpio::A0 + PORT_SIZE * (port - 'a');
+	} else if (port >= 'A' && port <= 'Z') {
+		basePin = Gpio::A0 + PORT_SIZE * (port - 'A');
+	} else {
+		return Gpio::Invalid;
+	}
+	const char *pinStr = str + 2;
+	int pin = atoi(pinStr);
+	return (brain_pin_e)(basePin + pin);
+}
+
+ioportid_t * getGpioPorts() {
+    return nullptr;
+}
+
+uint32_t getTimeNowLowerNt() {
+	return 0;// TODO: at32 port_rt_get_counter_value();
+}
+
+unsigned int getBrainPinOnchipNum(void) {
+	return BRAIN_PIN_ONCHIP_PINS;
+}