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960 2020-01-08 08:31:03 +01:00 committed by rusefi
parent 6e334a9f99
commit bf9dca8e5a
3 changed files with 245 additions and 251 deletions
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24
TLE7209_or_MC33186_H-Bridge_Breakout/TLE7209_Module.csv
View File

@ -1,11 +1,13 @@
C1,100nF,Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder,8.85012E+11,MOUSER,710-885012008026
C2,33nF,Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder,8.85012E+11,MOUSER,710-885012008026
C3,10nF,Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder,8.85012E+11,MOUSER,710-885012208052
D1,TPSMB24A,Diode_SMD:D_SMA,TPSMB24A,MOUSER,576-TPSMB24A
J1,Conn_02x06_Odd_Even,Connector_PinHeader_2.54mm:PinHeader_2x08_P2.54mm_Vertical,,,
J3,Conn_01x01,Connector:1pin,,,
R1,47K,Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder,,,
R2,1M,Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder,,,
R3,4.7K,Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder,,,
"> R4, R5",10K,Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder,,,
U1,TLE7209-2R,Package_SO:HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias,,,
Comment,Designator,Footprint,LCSC, LSLC, VEND#
"100nF","C1","Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder","","C49678",""
"33nF","C2","Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C1739",""
"10nF","C3","Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C1710",""
"CP1","C4","Capacitor_SMD:CP_Elec_8x10",""
"TPSMB24A","D1","Diode_SMD:D_SMA","","","576-TPSMB24A"
"Conn_02x06_Odd_Even","J1","Connector_PinHeader_2.54mm:PinHeader_2x08_P2.54mm_Vertical",""
"Conn_01x01","J3","Connector:1pin",""
"47K","R1","Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C17713",""
"1M","R2","Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C17514",""
"4.7K","R3","Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C17673",""
"10K","R4,R5","Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder",""," C17414",""
"TLE7209-2R","U1","Package_SO:HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias",""
Can't render this file because it has a wrong number of fields in line 5.

466
TLE7209_or_MC33186_H-Bridge_Breakout/TLE7209_Module.kicad_pcb
View File

@ -3,7 +3,7 @@
(general
(thickness 1.6)
(drawings 36)
(tracks 476)
(tracks 471)
(zones 0)
(modules 13)
(nets 14)
@ -13,7 +13,7 @@
(title_block
(title "TLE7209-2R Module")
(date 2019-01-31)
(rev R0.1)
(rev R0.2)
)
(layers
@ -226,6 +226,65 @@
(uvia_drill 0.127)
)
(module Capacitor_SMD:CP_Elec_8x10 (layer F.Cu) (tedit 5BCA39D0) (tstamp 5E156B9B)
(at 31.5468 24.7142)
(descr "SMD capacitor, aluminum electrolytic, Nichicon, 8.0x10mm")
(tags "capacitor electrolytic")
(path /5E196218)
(attr smd)
(fp_text reference C4 (at -5.588 3.1242) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CP1 (at 0 5.2) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -5.25 1.5) (end -4.4 1.5) (layer F.CrtYd) (width 0.05))
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(fp_line (start -4.4 -1.5) (end -5.25 -1.5) (layer F.CrtYd) (width 0.05))
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(fp_line (start 4.26 4.26) (end 4.26 1.51) (layer F.SilkS) (width 0.12))
(fp_line (start -3.162278 -1.9) (end -3.162278 -1.1) (layer F.Fab) (width 0.1))
(fp_line (start -3.562278 -1.5) (end -2.762278 -1.5) (layer F.Fab) (width 0.1))
(fp_line (start -4.15 3.15) (end -3.15 4.15) (layer F.Fab) (width 0.1))
(fp_line (start -4.15 -3.15) (end -3.15 -4.15) (layer F.Fab) (width 0.1))
(fp_line (start -4.15 -3.15) (end -4.15 3.15) (layer F.Fab) (width 0.1))
(fp_line (start -3.15 4.15) (end 4.15 4.15) (layer F.Fab) (width 0.1))
(fp_line (start -3.15 -4.15) (end 4.15 -4.15) (layer F.Fab) (width 0.1))
(fp_line (start 4.15 -4.15) (end 4.15 4.15) (layer F.Fab) (width 0.1))
(fp_circle (center 0 0) (end 4 0) (layer F.Fab) (width 0.1))
(pad 2 smd roundrect (at 3.25 0) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1)
(net 1 GND))
(pad 1 smd roundrect (at -3.25 0) (size 3.5 2.5) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.1)
(net 5 /12V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_8x10.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Package_SO:HSOP-20-1EP_11.0x15.9mm_P1.27mm_SlugDown_ThermalVias (layer F.Cu) (tedit 5E157927) (tstamp 5CC38514)
(at 53.9242 29.9212 90)
(descr "HSOP 11.0x15.9mm Pitch 1.27mm Slug Down Thermal Vias (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf)")
@ -360,65 +419,6 @@
)
)
(module Capacitor_SMD:CP_Elec_6.3x5.7 (layer F.Cu) (tedit 5BCA39D0) (tstamp 5E156B9B)
(at 31.5468 24.7142)
(descr "SMD capacitor, aluminum electrolytic, United Chemi-Con, 6.3x5.7mm")
(tags "capacitor electrolytic")
(path /5E196218)
(attr smd)
(fp_text reference C4 (at 4.8768 2.3368) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text value CP1 (at 0 4.35) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_text user %R (at 0 0) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -4.7 1.05) (end -3.55 1.05) (layer F.CrtYd) (width 0.05))
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(fp_line (start -3.3 -2.3) (end -2.3 -3.3) (layer F.Fab) (width 0.1))
(fp_line (start -3.3 -2.3) (end -3.3 2.3) (layer F.Fab) (width 0.1))
(fp_line (start -2.3 3.3) (end 3.3 3.3) (layer F.Fab) (width 0.1))
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(pad 2 smd roundrect (at 2.7 0) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
(net 1 GND))
(pad 1 smd roundrect (at -2.7 0) (size 3.5 1.6) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.15625)
(net 5 /12V))
(model ${KISYS3DMOD}/Capacitor_SMD.3dshapes/CP_Elec_6.3x5.7.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
(module Resistor_SMD:R_0805_2012Metric_Pad1.15x1.40mm_HandSolder (layer F.Cu) (tedit 5B36C52B) (tstamp 5CC3814B)
(at 34.7218 31.1658 90)
(descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
@ -1140,7 +1140,6 @@
(segment (start 56.4642 26.6192) (end 56.4642 27.3812) (width 0.1524) (layer B.Cu) (net 1) (status 30))
(via (at 37.4904 24.4602) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(via (at 37.0332 25.0952) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(via (at 35.9664 26.2636) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(via (at 35.2044 27.0256) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(via (at 34.4678 27.8638) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
(via (at 34.5948 28.7782) (size 0.6) (drill 0.3) (layers F.Cu B.Cu) (net 1))
@ -1162,10 +1161,6 @@
(via (at 30.988 21.844) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 32.004 21.844) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 33.02 21.844) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 26.924 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 27.94 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 28.956 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 29.972 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 30.988 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 32.004 22.86) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
(via (at 35.56 20.828) (size 0.78994) (drill 0.43434) (layers F.Cu B.Cu) (net 1))
@ -1411,7 +1406,7 @@
(segment (start 50.7492 36.174971) (end 50.002586 36.921586) (width 0.3048) (layer B.Cu) (net 11))
(segment (start 44.735496 37.54121) (end 43.731307 38.545399) (width 0.3048) (layer B.Cu) (net 11))
(zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5CC8D113) (hatch edge 0.508)
(zone (net 1) (net_name GND) (layer F.Cu) (tstamp 5E1617B1) (hatch edge 0.508)
(connect_pads (clearance 0.254))
(min_thickness 0.254)
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))
@ -1420,175 +1415,6 @@
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)
)
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)
)
)
(zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5CC8D110) (hatch edge 0.508)
(zone (net 1) (net_name GND) (layer B.Cu) (tstamp 5E1617AE) (hatch edge 0.508)
(connect_pads (clearance 0.254))
(min_thickness 0.254)
(fill yes (arc_segments 32) (thermal_gap 0.508) (thermal_bridge_width 0.508))

6
TLE7209_or_MC33186_H-Bridge_Breakout/TLE7209_Module.sch
View File

@ -5,9 +5,9 @@ EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Title "TLE7209 Module"
Date ""
Rev ""
Rev "0.2"
Comp ""
Comment1 ""
Comment2 ""
@ -447,7 +447,7 @@ U 1 1 5E196218
P 3000 2675
F 0 "C4" H 3115 2721 50 0000 L CNN
F 1 "CP1" H 3115 2630 50 0000 L CNN
F 2 "Capacitor_SMD:CP_Elec_8x6.7" H 3000 2675 50 0001 C CNN
F 2 "Capacitor_SMD:CP_Elec_8x10" H 3000 2675 50 0001 C CNN
F 3 "~" H 3000 2675 50 0001 C CNN
1 3000 2675
1 0 0 -1