update=08.01.2020 22:31:13
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[pcbnew]
version=1
PageLayoutDescrFile=
LastNetListRead=Analog_Input_Module.net
CopperLayerCount=2
BoardThickness=1.6
AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.1524
MinViaDiameter=0
MinViaDrill=0.3
MinMicroViaDiameter=0.508
MinMicroViaDrill=0.127
MinHoleToHole=0.25
TrackWidth1=0.1524
TrackWidth2=0.1524
TrackWidth3=0.2159
TrackWidth4=0.2159
TrackWidth5=0.3048
TrackWidth6=0.6
TrackWidth7=1.0668
TrackWidth8=1.651
TrackWidth9=1.6764
TrackWidth10=2.7178
ViaDiameter1=0.6
ViaDrill1=0.3
ViaDiameter2=0.6
ViaDrill2=0.3
ViaDiameter3=0.78994
ViaDrill3=0.43434
ViaDiameter4=1
ViaDrill4=0.5
ViaDiameter5=1.54178
ViaDrill5=1.18618
dPairWidth1=0.2
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.25
SilkTextSizeV=0.5
SilkTextSizeH=0.5
SilkTextSizeThickness=0.09999999999999999
SilkTextItalic=0
SilkTextUpright=1
CopperLineWidth=0.2
CopperTextSizeV=1.5
CopperTextSizeH=1.5
CopperTextThickness=0.3
CopperTextItalic=0
CopperTextUpright=1
EdgeCutLineWidth=0.15
CourtyardLineWidth=0.05
OthersLineWidth=0.15
OthersTextSizeV=1
OthersTextSizeH=1
OthersTextSizeThickness=0.15
OthersTextItalic=0
OthersTextUpright=1
SolderMaskClearance=5.1e-05
SolderMaskMinWidth=0
SolderPasteClearance=0
SolderPasteRatio=0
[pcbnew/Netclasses]
[pcbnew/Netclasses/1]
Name=1A EXTERNAL
Clearance=0.1905
TrackWidth=0.3048
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/2]
Name=2.5A EXTERNAL
Clearance=0.2159
TrackWidth=1.0668
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/3]
Name=3,5A EXT HIGH VOLTAGE
Clearance=1.016
TrackWidth=1.6764
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/4]
Name=3.5A EXTERNAL
Clearance=0.2159
TrackWidth=1.651
ViaDiameter=1.0922
ViaDrill=0.6858
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/5]
Name=5A EXTERNAL
Clearance=0.2159
TrackWidth=1.0668
ViaDiameter=1.54178
ViaDrill=1.18618
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/6]
Name=CUSTOM
Clearance=0.1524
TrackWidth=0.25
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/7]
Name=CUSTOM 0.6
Clearance=0.1524
TrackWidth=0.6
ViaDiameter=1
ViaDrill=0.4
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/8]
Name=MIN_EXTERN_188A
Clearance=0.1524
TrackWidth=0.1524
ViaDiameter=0.6858
ViaDrill=0.3302
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[pcbnew/Netclasses/9]
Name=MIN_EXTERN_241A
Clearance=0.1524
TrackWidth=0.2159
ViaDiameter=0.6
ViaDrill=0.3
uViaDiameter=0.508
uViaDrill=0.127
dPairWidth=0.2
dPairGap=0.25
dPairViaGap=0.25
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=./
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=50
ERC_TestSimilarLabels=1