mirror of https://github.com/rusefi/openblt.git
Refs #1363. Corrected misplaced #endif in the Nucleo-F429ZI demo bootloader.
git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@908 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
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@ -290,6 +290,7 @@ void HAL_MspDeInit(void)
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_9);
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/* UART clock disable. */
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__HAL_RCC_USART3_CLK_DISABLE();
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#endif
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/* GPIO ports clock disable. */
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__HAL_RCC_GPIOD_CLK_DISABLE();
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@ -300,7 +301,6 @@ void HAL_MspDeInit(void)
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/* SYSCFG and PWR clock disable. */
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__HAL_RCC_PWR_CLK_DISABLE();
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__HAL_RCC_SYSCFG_CLK_DISABLE();
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#endif
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} /*** end of HAL_MspDeInit ***/
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@ -287,6 +287,7 @@ void HAL_MspDeInit(void)
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_9);
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/* UART clock disable. */
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__HAL_RCC_USART3_CLK_DISABLE();
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#endif
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/* GPIO ports clock disable. */
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__HAL_RCC_GPIOD_CLK_DISABLE();
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@ -297,7 +298,6 @@ void HAL_MspDeInit(void)
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/* SYSCFG and PWR clock disable. */
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__HAL_RCC_PWR_CLK_DISABLE();
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__HAL_RCC_SYSCFG_CLK_DISABLE();
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#endif
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} /*** end of HAL_MspDeInit ***/
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@ -290,6 +290,7 @@ void HAL_MspDeInit(void)
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HAL_GPIO_DeInit(GPIOD, GPIO_PIN_9);
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/* UART clock disable. */
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__HAL_RCC_USART3_CLK_DISABLE();
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#endif
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/* GPIO ports clock disable. */
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__HAL_RCC_GPIOD_CLK_DISABLE();
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@ -300,7 +301,6 @@ void HAL_MspDeInit(void)
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/* SYSCFG and PWR clock disable. */
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__HAL_RCC_PWR_CLK_DISABLE();
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__HAL_RCC_SYSCFG_CLK_DISABLE();
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#endif
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} /*** end of HAL_MspDeInit ***/
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