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Refs #559. Corrected vector table relocation not being disabled for the STM32F103 related demo user programs. 

git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@517 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg 2018-06-07 08:17:05 +00:00
parent 084d34ff1f
commit 3d1bfce1f6
18 changed files with 829 additions and 766 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

BIN
Target/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Prog/bin/demoprog_nucleo_stm32f103rb.elf
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Binary file not shown.

464
Target/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Prog/bin/demoprog_nucleo_stm32f103rb.map
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@ -1,232 +1,232 @@
bin/demoprog_nucleo_stm32f103rb.elf: file format elf32-littlearm
bin/demoprog_nucleo_stm32f103rb.elf
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x08002000
Program Header:
0x70000001 off 0x00002900 vaddr 0x08002900 paddr 0x08002900 align 2**2
filesz 0x00000008 memsz 0x00000008 flags r--
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**16
filesz 0x00002908 memsz 0x00002908 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08002908 align 2**16
filesz 0x0000007c memsz 0x000000eb flags rw-
private flags = 5000200: [Version5 EABI] [soft-float ABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000900 08002000 08002000 00002000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .ARM.exidx 00000008 08002900 08002900 00002900 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .data 0000007c 20000000 08002908 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 0000006f 2000007c 08002984 0001007c 2**2
ALLOC
4 .heap 00000800 200000f0 200000f0 00010080 2**3
CONTENTS, READONLY
5 .stack_dummy 00000800 200000f0 200000f0 00010880 2**3
CONTENTS, READONLY
6 .ARM.attributes 00000029 00000000 00000000 00011080 2**0
CONTENTS, READONLY
7 .comment 0000006e 00000000 00000000 000110a9 2**0
CONTENTS, READONLY
8 .debug_line 000029b6 00000000 00000000 00011117 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_info 000030cb 00000000 00000000 00013acd 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 00000cd1 00000000 00000000 00016b98 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 000003e0 00000000 00000000 00017870 2**3
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000340 00000000 00000000 00017c50 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_macro 00002968 00000000 00000000 00017f90 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_str 000513f3 00000000 00000000 0001a8f8 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_frame 000007f0 00000000 00000000 0006bcec 2**2
CONTENTS, READONLY, DEBUGGING
16 .debug_loc 000013ab 00000000 00000000 0006c4dc 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08002000 l d .text 00000000 .text
08002900 l d .ARM.exidx 00000000 .ARM.exidx
20000000 l d .data 00000000 .data
2000007c l d .bss 00000000 .bss
200000f0 l d .heap 00000000 .heap
200000f0 l d .stack_dummy 00000000 .stack_dummy
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .comment 00000000 .comment
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_macro 00000000 .debug_macro
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l df *ABS* 00000000 obj/startup_stm32f10x_md.o
00000800 l *ABS* 00000000 Stack_Size
00000800 l *ABS* 00000000 Heap_Size
080021ca l .text 00000000 .flash_to_ram_loop
080021fc l .text 00000000 .fill_zero_bss
080021f8 l .text 00000000 .loop_zero_bss
00000000 l df *ABS* 00000000 crtstuff.c
080028fc l O .text 00000000 __EH_FRAME_BEGIN__
080020f0 l F .text 00000000 __do_global_dtors_aux
2000007c l .bss 00000000 completed.8603
20000078 l O .data 00000000 __do_global_dtors_aux_fini_array_entry
08002114 l F .text 00000000 frame_dummy
20000080 l .bss 00000000 object.8608
20000074 l O .data 00000000 __frame_dummy_init_array_entry
00000000 l df *ABS* 00000000 c:/progra~2/gnutoo~1/50a5a~1.420/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7-m/crt0.o
00000000 l df *ABS* 00000000 _exit.c
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
00000000 l df *ABS* 00000000 stm32f10x_usart.c
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
20000000 l O .data 00000004 ADCPrescTable
20000004 l O .data 00000010 APBAHBPrescTable
00000000 l df *ABS* 00000000 timer.c
20000098 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 led.c
2000009c l O .bss 00000004 timer_counter_last.6552
200000a0 l O .bss 00000001 led_toggle_state.6551
00000000 l df *ABS* 00000000 main.c
080025e0 l F .text 00000104 Init
00000000 l df *ABS* 00000000 boot.c
080026f8 l F .text 00000080 BootComUartInit
08002778 l F .text 00000024 UartReceiveByte
080027c0 l F .text 00000094 BootComUartCheckActivationRequest
200000a4 l O .bss 00000004 xcpCtoRxStartTime.6570
200000a8 l O .bss 00000041 xcpCtoReqPacket.6567
200000e9 l O .bss 00000001 xcpCtoRxLength.6568
200000ea l O .bss 00000001 xcpCtoRxInProgress.6569
00000000 l df *ABS* 00000000 exit.c
00000000 l df *ABS* 00000000 init.c
00000000 l df *ABS* 00000000 memset.c
00000000 l df *ABS* 00000000 c:/progra~2/gnutoo~1/50a5a~1.420/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7-m/crti.o
00000000 l df *ABS* 00000000 c:/progra~2/gnutoo~1/50a5a~1.420/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7-m/crtn.o
00000000 l df *ABS* 00000000 impure.c
20000014 l O .data 00000060 impure_data
00000000 l df *ABS* 00000000 crtstuff.c
080028fc l O .text 00000000 __FRAME_END__
00000000 l df *ABS* 00000000
20000078 l .data 00000000 __init_array_end
20000074 l .data 00000000 __preinit_array_end
20000074 l .data 00000000 __init_array_start
20000074 l .data 00000000 __preinit_array_start
0800222a w F .text 00000002 EXTI2_IRQHandler
200000f0 g .heap 00000800 __HeapBase
08002212 w F .text 00000002 DebugMon_Handler
00000800 g *ABS* 00000000 __HEAP_SIZE
20000000 g .data 00000000 __data_start__
08002250 w F .text 00000002 TIM1_CC_IRQHandler
08002208 w F .text 00000002 HardFault_Handler
08002554 g F .text 00000010 SysTick_Handler
0800221c w F .text 00000002 PVD_IRQHandler
08002214 w F .text 00000002 PendSV_Handler
08002206 w F .text 00000002 NMI_Handler
08002908 g .ARM.exidx 00000000 __exidx_end
0800222c w F .text 00000002 EXTI3_IRQHandler
08002908 g .ARM.exidx 00000000 __etext
0800240c g F .text 0000000e USART_GetFlagStatus
08002226 w F .text 00000002 EXTI0_IRQHandler
0800225c w F .text 00000002 I2C2_EV_IRQHandler
08002404 g F .text 00000008 USART_ReceiveData
0800220e w F .text 00000002 UsageFault_Handler
080024d8 g F .text 0000001c RCC_APB2PeriphClockCmd
0800223e w F .text 00000002 ADC1_2_IRQHandler
0800227c g F .text 0000009a GPIO_Init
200008f0 g .heap 00000000 __HeapLimit
2000007c g .bss 00000000 __bss_start__
08002260 w F .text 00000002 SPI1_IRQHandler
080023e8 g F .text 0000001c USART_Cmd
0800221e w F .text 00000002 TAMPER_IRQHandler
080024f4 g F .text 0000001c RCC_APB1PeriphClockCmd
08002900 g .text 00000000 __exidx_start
080028f8 g O .text 00000004 _global_impure_ptr
08002884 g F .text 0000004c __libc_init_array
08002236 w F .text 00000002 DMA1_Channel4_IRQHandler
0800214c g F .text 00000000 _mainCRTStartup
080028e0 g F .text 00000000 _init
080027a4 g F .text 0000001c BootActivate
08002268 w F .text 00000002 USART3_IRQHandler
00000000 w *UND* 00000000 __libc_fini_array
08002220 w F .text 00000002 RTC_IRQHandler
0800223c w F .text 00000002 DMA1_Channel7_IRQHandler
080021c0 g F .text 00000030 Reset_Handler
08002244 w F .text 00000002 CAN1_RX1_IRQHandler
08002564 g F .text 00000030 LedInit
08002318 g F .text 00000004 GPIO_SetBits
08002256 w F .text 00000002 TIM4_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stderr
00000000 w *UND* 00000000 __deregister_frame_info
200000f0 g .heap 00000000 end
08002258 w F .text 00000002 I2C1_EV_IRQHandler
2000007c g .data 00000000 __data_end__
0800241c g F .text 000000bc RCC_GetClocksFreq
0800223a w F .text 00000002 DMA1_Channel6_IRQHandler
08002320 g F .text 000000c8 USART_Init
200000eb g .bss 00000000 __bss_end__
00000800 g *ABS* 00000000 __STACK_SIZE
08002254 w F .text 00000002 TIM3_IRQHandler
08002224 w F .text 00000002 RCC_IRQHandler
0800224e w F .text 00000002 TIM1_TRG_COM_IRQHandler
00000000 w *UND* 00000000 __call_exitprocs
08002230 w F .text 00000002 DMA1_Channel1_IRQHandler
08002218 w F .text 00000002 Default_Handler
0800214c g F .text 00000000 _start
0800226a w F .text 00000002 EXTI15_10_IRQHandler
00000000 w *UND* 00000000 software_init_hook
0800231c g F .text 00000004 GPIO_ResetBits
08002248 w F .text 00000002 EXTI9_5_IRQHandler
08002262 w F .text 00000002 SPI2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdin
080028d0 g F .text 00000010 memset
0800220a w F .text 00000002 MemManage_Handler
08002000 g .text 000000f0 __isr_vector
080026e4 g F .text 00000014 main
08002210 w F .text 00000002 SVC_Handler
00000000 w *UND* 00000000 hardware_init_hook
200000f0 g .heap 00000000 __end__
08002238 w F .text 00000002 DMA1_Channel5_IRQHandler
0800222e w F .text 00000002 EXTI4_IRQHandler
08002510 g F .text 0000000c TimerSet
08002242 w F .text 00000002 USB_LP_CAN1_RX0_IRQHandler
0800279c g F .text 00000008 BootComInit
080028ec g F .text 00000000 _fini
08002240 w F .text 00000002 USB_HP_CAN1_TX_IRQHandler
00000000 w *UND* 00000000 atexit
08002234 w F .text 00000002 DMA1_Channel3_IRQHandler
20005000 g .bss 00000000 __StackTop
0800224c w F .text 00000002 TIM1_UP_IRQHandler
0800221a w F .text 00000002 WWDG_IRQHandler
08002594 g F .text 0000004c LedToggle
08002252 w F .text 00000002 TIM2_IRQHandler
0800224a w F .text 00000002 TIM1_BRK_IRQHandler
20005000 g *ABS* 00000000 __stack
08002228 w F .text 00000002 EXTI1_IRQHandler
0800226c w F .text 00000002 RTCAlarm_IRQHandler
20004800 g *ABS* 00000800 __StackLimit
08002266 w F .text 00000002 USART2_IRQHandler
0800285c g F .text 00000028 exit
0800225e w F .text 00000002 I2C2_ER_IRQHandler
08002232 w F .text 00000002 DMA1_Channel2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdout
08002854 g F .text 00000008 BootComCheckActivationRequest
08002246 w F .text 00000002 CAN1_SCE_IRQHandler
08002222 w F .text 00000002 FLASH_IRQHandler
08002278 w F .text 00000002 _exit
0800220c w F .text 00000002 BusFault_Handler
08002264 w F .text 00000002 USART1_IRQHandler
0800225a w F .text 00000002 I2C1_ER_IRQHandler
08002548 g F .text 0000000c TimerGet
00000000 w *UND* 00000000 _Jv_RegisterClasses
0800251c g F .text 0000002c TimerInit
00000000 w *UND* 00000000 __register_frame_info
0800226e w F .text 00000002 USBWakeUp_IRQHandler
bin/demoprog_nucleo_stm32f103rb.elf: file format elf32-littlearm
bin/demoprog_nucleo_stm32f103rb.elf
architecture: arm, flags 0x00000112:
EXEC_P, HAS_SYMS, D_PAGED
start address 0x08002000
Program Header:
0x70000001 off 0x00002904 vaddr 0x08002904 paddr 0x08002904 align 2**2
filesz 0x00000008 memsz 0x00000008 flags r--
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**16
filesz 0x0000290c memsz 0x0000290c flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x0800290c align 2**16
filesz 0x0000007c memsz 0x000000eb flags rw-
private flags = 5000200: [Version5 EABI] [soft-float ABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000904 08002000 08002000 00002000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .ARM.exidx 00000008 08002904 08002904 00002904 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .data 0000007c 20000000 0800290c 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 0000006f 2000007c 08002988 0001007c 2**2
ALLOC
4 .heap 00000800 200000f0 200000f0 00010080 2**3
CONTENTS, READONLY
5 .stack_dummy 00000800 200000f0 200000f0 00010880 2**3
CONTENTS, READONLY
6 .ARM.attributes 00000029 00000000 00000000 00011080 2**0
CONTENTS, READONLY
7 .comment 0000006e 00000000 00000000 000110a9 2**0
CONTENTS, READONLY
8 .debug_line 000029d6 00000000 00000000 00011117 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_info 000030d5 00000000 00000000 00013aed 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 00000cd1 00000000 00000000 00016bc2 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 000003e0 00000000 00000000 00017898 2**3
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 000013ab 00000000 00000000 00017c78 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000340 00000000 00000000 00019023 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_macro 0000e158 00000000 00000000 00019363 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_str 000513fd 00000000 00000000 000274bb 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_frame 000007f0 00000000 00000000 000788b8 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08002000 l d .text 00000000 .text
08002904 l d .ARM.exidx 00000000 .ARM.exidx
20000000 l d .data 00000000 .data
2000007c l d .bss 00000000 .bss
200000f0 l d .heap 00000000 .heap
200000f0 l d .stack_dummy 00000000 .stack_dummy
00000000 l d .ARM.attributes 00000000 .ARM.attributes
00000000 l d .comment 00000000 .comment
00000000 l d .debug_line 00000000 .debug_line
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_macro 00000000 .debug_macro
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l df *ABS* 00000000 obj/startup_stm32f10x_md.o
00000800 l *ABS* 00000000 Stack_Size
00000800 l *ABS* 00000000 Heap_Size
080021ca l .text 00000000 .flash_to_ram_loop
080021fc l .text 00000000 .fill_zero_bss
080021f8 l .text 00000000 .loop_zero_bss
00000000 l df *ABS* 00000000 crtstuff.c
08002900 l O .text 00000000 __EH_FRAME_BEGIN__
080020f0 l F .text 00000000 __do_global_dtors_aux
2000007c l .bss 00000000 completed.8603
20000078 l O .data 00000000 __do_global_dtors_aux_fini_array_entry
08002114 l F .text 00000000 frame_dummy
20000080 l .bss 00000000 object.8608
20000074 l O .data 00000000 __frame_dummy_init_array_entry
00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7-m/crt0.o
00000000 l df *ABS* 00000000 timer.c
20000098 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 main.c
080022cc l F .text 00000104 Init
00000000 l df *ABS* 00000000 stm32f10x_usart.c
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
20000000 l O .data 00000004 ADCPrescTable
20000004 l O .data 00000010 APBAHBPrescTable
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
00000000 l df *ABS* 00000000 _exit.c
00000000 l df *ABS* 00000000 led.c
2000009c l O .bss 00000004 timer_counter_last.6552
200000a0 l O .bss 00000001 led_toggle_state.6551
00000000 l df *ABS* 00000000 boot.c
080026f8 l F .text 00000080 BootComUartInit
08002778 l F .text 00000024 UartReceiveByte
080027c0 l F .text 00000098 BootComUartCheckActivationRequest
200000a4 l O .bss 00000004 xcpCtoRxStartTime.6570
200000a8 l O .bss 00000041 xcpCtoReqPacket.6567
200000e9 l O .bss 00000001 xcpCtoRxLength.6568
200000ea l O .bss 00000001 xcpCtoRxInProgress.6569
00000000 l df *ABS* 00000000 exit.c
00000000 l df *ABS* 00000000 init.c
00000000 l df *ABS* 00000000 memset.c
00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7-m/crti.o
00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/armv7-m/crtn.o
00000000 l df *ABS* 00000000 impure.c
20000014 l O .data 00000060 impure_data
00000000 l df *ABS* 00000000 crtstuff.c
08002900 l O .text 00000000 __FRAME_END__
00000000 l df *ABS* 00000000
20000078 l .data 00000000 __init_array_end
20000074 l .data 00000000 __preinit_array_end
20000074 l .data 00000000 __init_array_start
20000074 l .data 00000000 __preinit_array_start
0800222a w F .text 00000002 EXTI2_IRQHandler
200000f0 g .heap 00000800 __HeapBase
08002212 w F .text 00000002 DebugMon_Handler
00000800 g *ABS* 00000000 __HEAP_SIZE
20000000 g .data 00000000 __data_start__
08002250 w F .text 00000002 TIM1_CC_IRQHandler
08002208 w F .text 00000002 HardFault_Handler
080022bc g F .text 00000010 SysTick_Handler
0800221c w F .text 00000002 PVD_IRQHandler
08002214 w F .text 00000002 PendSV_Handler
08002206 w F .text 00000002 NMI_Handler
0800290c g .ARM.exidx 00000000 __exidx_end
0800222c w F .text 00000002 EXTI3_IRQHandler
0800290c g .ARM.exidx 00000000 __etext
080024d0 g F .text 0000000e USART_GetFlagStatus
08002226 w F .text 00000002 EXTI0_IRQHandler
0800225c w F .text 00000002 I2C2_EV_IRQHandler
080024c8 g F .text 00000008 USART_ReceiveData
0800220e w F .text 00000002 UsageFault_Handler
0800259c g F .text 0000001c RCC_APB2PeriphClockCmd
0800223e w F .text 00000002 ADC1_2_IRQHandler
080025d4 g F .text 0000009a GPIO_Init
200008f0 g .heap 00000000 __HeapLimit
2000007c g .bss 00000000 __bss_start__
08002260 w F .text 00000002 SPI1_IRQHandler
080024ac g F .text 0000001c USART_Cmd
0800221e w F .text 00000002 TAMPER_IRQHandler
080025b8 g F .text 0000001c RCC_APB1PeriphClockCmd
08002904 g .text 00000000 __exidx_start
080028fc g O .text 00000004 _global_impure_ptr
08002888 g F .text 0000004c __libc_init_array
08002236 w F .text 00000002 DMA1_Channel4_IRQHandler
0800214c g F .text 00000000 _mainCRTStartup
080028e4 g F .text 00000000 _init
080027a4 g F .text 0000001c BootActivate
08002268 w F .text 00000002 USART3_IRQHandler
00000000 w *UND* 00000000 __libc_fini_array
08002220 w F .text 00000002 RTC_IRQHandler
0800223c w F .text 00000002 DMA1_Channel7_IRQHandler
080021c0 g F .text 00000030 Reset_Handler
08002244 w F .text 00000002 CAN1_RX1_IRQHandler
0800267c g F .text 00000030 LedInit
08002670 g F .text 00000004 GPIO_SetBits
08002256 w F .text 00000002 TIM4_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stderr
00000000 w *UND* 00000000 __deregister_frame_info
200000f0 g .heap 00000000 end
08002258 w F .text 00000002 I2C1_EV_IRQHandler
2000007c g .data 00000000 __data_end__
080024e0 g F .text 000000bc RCC_GetClocksFreq
0800223a w F .text 00000002 DMA1_Channel6_IRQHandler
080023e4 g F .text 000000c8 USART_Init
200000eb g .bss 00000000 __bss_end__
00000800 g *ABS* 00000000 __STACK_SIZE
08002254 w F .text 00000002 TIM3_IRQHandler
08002224 w F .text 00000002 RCC_IRQHandler
0800224e w F .text 00000002 TIM1_TRG_COM_IRQHandler
00000000 w *UND* 00000000 __call_exitprocs
08002230 w F .text 00000002 DMA1_Channel1_IRQHandler
08002218 w F .text 00000002 Default_Handler
0800214c g F .text 00000000 _start
0800226a w F .text 00000002 EXTI15_10_IRQHandler
00000000 w *UND* 00000000 software_init_hook
08002674 g F .text 00000004 GPIO_ResetBits
08002248 w F .text 00000002 EXTI9_5_IRQHandler
08002262 w F .text 00000002 SPI2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdin
080028d4 g F .text 00000010 memset
0800220a w F .text 00000002 MemManage_Handler
08002000 g .text 000000f0 __isr_vector
080023d0 g F .text 00000014 main
08002210 w F .text 00000002 SVC_Handler
00000000 w *UND* 00000000 hardware_init_hook
200000f0 g .heap 00000000 __end__
08002238 w F .text 00000002 DMA1_Channel5_IRQHandler
0800222e w F .text 00000002 EXTI4_IRQHandler
08002278 g F .text 0000000c TimerSet
08002242 w F .text 00000002 USB_LP_CAN1_RX0_IRQHandler
0800279c g F .text 00000008 BootComInit
080028f0 g F .text 00000000 _fini
08002240 w F .text 00000002 USB_HP_CAN1_TX_IRQHandler
00000000 w *UND* 00000000 atexit
08002234 w F .text 00000002 DMA1_Channel3_IRQHandler
20005000 g .bss 00000000 __StackTop
0800224c w F .text 00000002 TIM1_UP_IRQHandler
0800221a w F .text 00000002 WWDG_IRQHandler
080026ac g F .text 0000004c LedToggle
08002252 w F .text 00000002 TIM2_IRQHandler
0800224a w F .text 00000002 TIM1_BRK_IRQHandler
20005000 g *ABS* 00000000 __stack
08002228 w F .text 00000002 EXTI1_IRQHandler
0800226c w F .text 00000002 RTCAlarm_IRQHandler
20004800 g *ABS* 00000800 __StackLimit
08002266 w F .text 00000002 USART2_IRQHandler
08002860 g F .text 00000028 exit
0800225e w F .text 00000002 I2C2_ER_IRQHandler
08002232 w F .text 00000002 DMA1_Channel2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdout
08002858 g F .text 00000008 BootComCheckActivationRequest
08002246 w F .text 00000002 CAN1_SCE_IRQHandler
08002222 w F .text 00000002 FLASH_IRQHandler
08002678 w F .text 00000002 _exit
0800220c w F .text 00000002 BusFault_Handler
08002264 w F .text 00000002 USART1_IRQHandler
0800225a w F .text 00000002 I2C1_ER_IRQHandler
080022b0 g F .text 0000000c TimerGet
00000000 w *UND* 00000000 _Jv_RegisterClasses
08002284 g F .text 0000002c TimerInit
00000000 w *UND* 00000000 __register_frame_info
0800226e w F .text 00000002 USBWakeUp_IRQHandler

229
Target/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Prog/bin/demoprog_nucleo_stm32f103rb.srec
View File

@ -2,7 +2,7 @@ S027000062696E2F64656D6F70726F675F6E75636C656F5F73746D33326631303372622E73726563
S3150800200000500020C1210008072200080922000804
S315080020100B2200080D2200080F220008000000000D
S315080020200000000000000000000000001122000867
S315080020301322000800000000152200085525000894
S31508002030132200080000000015220008BD2200082F
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19
Target/Demo/ARMCM3_STM32F1_Nucleo_F103RB_GCC/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Nucleo_F103RB_IAR/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_Crossworks/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

BIN
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_GCC/Prog/bin/demoprog_olimex_stm32h103.elf
View File

Binary file not shown.

54
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_GCC/Prog/bin/demoprog_olimex_stm32h103.map
View File

@ -11,7 +11,7 @@ Program Header:
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**16
filesz 0x000045d0 memsz 0x000045d0 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x080045d0 align 2**16
filesz 0x00000068 memsz 0x00000090 flags rw-
filesz 0x00000068 memsz 0x0000008d flags rw-
private flags = 5000200: [Version5 EABI] [soft-float ABI]
Sections:
@ -22,7 +22,7 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .data 00000068 20000000 080045d0 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 00000028 20000068 08004638 00010068 2**2
3 .bss 00000025 20000068 08004638 00010068 2**2
ALLOC
4 .heap 00000800 20000090 20000090 00010068 2**3
CONTENTS, READONLY
@ -40,15 +40,15 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 00000290 00000000 00000000 000155e8 2**3
CONTENTS, READONLY, DEBUGGING
12 .debug_ranges 00000210 00000000 00000000 00015878 2**0
12 .debug_loc 00000c49 00000000 00000000 00015878 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_macro 0000db31 00000000 00000000 00015a88 2**0
13 .debug_ranges 00000210 00000000 00000000 000164c1 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_str 00050aaa 00000000 00000000 000235b9 2**0
14 .debug_macro 0000db31 00000000 00000000 000166d1 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_frame 00000520 00000000 00000000 00074064 2**2
15 .debug_str 00050aaf 00000000 00000000 00024202 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_loc 00000c49 00000000 00000000 00074584 2**0
16 .debug_frame 00000520 00000000 00000000 00074cb4 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08004000 l d .text 00000000 .text
@ -63,11 +63,11 @@ SYMBOL TABLE:
00000000 l d .debug_info 00000000 .debug_info
00000000 l d .debug_abbrev 00000000 .debug_abbrev
00000000 l d .debug_aranges 00000000 .debug_aranges
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l d .debug_ranges 00000000 .debug_ranges
00000000 l d .debug_macro 00000000 .debug_macro
00000000 l d .debug_str 00000000 .debug_str
00000000 l d .debug_frame 00000000 .debug_frame
00000000 l d .debug_loc 00000000 .debug_loc
00000000 l df *ABS* 00000000 obj/startup_stm32f10x_md.o
00000800 l *ABS* 00000000 Stack_Size
00000800 l *ABS* 00000000 Heap_Size
@ -83,16 +83,16 @@ SYMBOL TABLE:
2000006c l .bss 00000000 object.8608
20000060 l O .data 00000000 __frame_dummy_init_array_entry
00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7-m/crt0.o
00000000 l df *ABS* 00000000 main.c
08004278 l F .text 00000104 Init
00000000 l df *ABS* 00000000 led.c
20000084 l O .bss 00000004 timer_counter_last.6544
20000088 l O .bss 00000001 led_toggle_state.6543
00000000 l df *ABS* 00000000 timer.c
2000008c l O .bss 00000004 millisecond_counter
20000084 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 main.c
080042cc l F .text 00000104 Init
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
00000000 l df *ABS* 00000000 _exit.c
00000000 l df *ABS* 00000000 led.c
20000088 l O .bss 00000004 timer_counter_last.6544
2000008c l O .bss 00000001 led_toggle_state.6543
00000000 l df *ABS* 00000000 exit.c
00000000 l df *ABS* 00000000 init.c
00000000 l df *ABS* 00000000 memset.c
@ -114,7 +114,7 @@ SYMBOL TABLE:
20000000 g .data 00000000 __data_start__
08004250 w F .text 00000002 TIM1_CC_IRQHandler
08004208 w F .text 00000002 HardFault_Handler
08004450 g F .text 00000010 SysTick_Handler
080042bc g F .text 00000010 SysTick_Handler
0800421c w F .text 00000002 PVD_IRQHandler
08004214 w F .text 00000002 PendSV_Handler
08004206 w F .text 00000002 NMI_Handler
@ -124,9 +124,9 @@ SYMBOL TABLE:
08004226 w F .text 00000002 EXTI0_IRQHandler
0800425c w F .text 00000002 I2C2_EV_IRQHandler
0800420e w F .text 00000002 UsageFault_Handler
08004460 g F .text 0000001c RCC_APB2PeriphClockCmd
080043dc g F .text 0000001c RCC_APB2PeriphClockCmd
0800423e w F .text 00000002 ADC1_2_IRQHandler
0800447c g F .text 0000009a GPIO_Init
080043f8 g F .text 0000009a GPIO_Init
20000890 g .heap 00000000 __HeapLimit
20000068 g .bss 00000000 __bss_start__
08004260 w F .text 00000002 SPI1_IRQHandler
@ -143,8 +143,8 @@ SYMBOL TABLE:
0800423c w F .text 00000002 DMA1_Channel7_IRQHandler
080041c0 g F .text 00000030 Reset_Handler
08004244 w F .text 00000002 CAN1_RX1_IRQHandler
08004388 g F .text 00000034 LedInit
08004518 g F .text 00000004 GPIO_SetBits
080044a0 g F .text 00000034 LedInit
08004494 g F .text 00000004 GPIO_SetBits
08004256 w F .text 00000002 TIM4_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stderr
00000000 w *UND* 00000000 __deregister_frame_info
@ -152,7 +152,7 @@ SYMBOL TABLE:
08004258 w F .text 00000002 I2C1_EV_IRQHandler
20000068 g .data 00000000 __data_end__
0800423a w F .text 00000002 DMA1_Channel6_IRQHandler
20000090 g .bss 00000000 __bss_end__
2000008d g .bss 00000000 __bss_end__
00000800 g *ABS* 00000000 __STACK_SIZE
08004254 w F .text 00000002 TIM3_IRQHandler
08004224 w F .text 00000002 RCC_IRQHandler
@ -163,20 +163,20 @@ SYMBOL TABLE:
0800414c g F .text 00000000 _start
0800426a w F .text 00000002 EXTI15_10_IRQHandler
00000000 w *UND* 00000000 software_init_hook
0800451c g F .text 00000004 GPIO_ResetBits
08004498 g F .text 00000004 GPIO_ResetBits
08004248 w F .text 00000002 EXTI9_5_IRQHandler
08004262 w F .text 00000002 SPI2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdin
08004598 g F .text 00000010 memset
0800420a w F .text 00000002 MemManage_Handler
08004000 g .text 000000f0 __isr_vector
0800437c g F .text 0000000c main
080043d0 g F .text 0000000c main
08004210 w F .text 00000002 SVC_Handler
00000000 w *UND* 00000000 hardware_init_hook
20000090 g .heap 00000000 __end__
08004238 w F .text 00000002 DMA1_Channel5_IRQHandler
0800422e w F .text 00000002 EXTI4_IRQHandler
0800440c g F .text 0000000c TimerSet
08004278 g F .text 0000000c TimerSet
08004242 w F .text 00000002 USB_LP_CAN1_RX0_IRQHandler
080045b4 g F .text 00000000 _fini
08004240 w F .text 00000002 USB_HP_CAN1_TX_IRQHandler
@ -185,7 +185,7 @@ SYMBOL TABLE:
20005000 g .bss 00000000 __StackTop
0800424c w F .text 00000002 TIM1_UP_IRQHandler
0800421a w F .text 00000002 WWDG_IRQHandler
080043bc g F .text 00000050 LedToggle
080044d4 g F .text 00000050 LedToggle
08004252 w F .text 00000002 TIM2_IRQHandler
0800424a w F .text 00000002 TIM1_BRK_IRQHandler
20005000 g *ABS* 00000000 __stack
@ -199,13 +199,13 @@ SYMBOL TABLE:
00000000 w *UND* 00000000 __sf_fake_stdout
08004246 w F .text 00000002 CAN1_SCE_IRQHandler
08004222 w F .text 00000002 FLASH_IRQHandler
08004520 w F .text 00000002 _exit
0800449c w F .text 00000002 _exit
0800420c w F .text 00000002 BusFault_Handler
08004264 w F .text 00000002 USART1_IRQHandler
0800425a w F .text 00000002 I2C1_ER_IRQHandler
08004444 g F .text 0000000c TimerGet
080042b0 g F .text 0000000c TimerGet
00000000 w *UND* 00000000 _Jv_RegisterClasses
08004418 g F .text 0000002c TimerInit
08004284 g F .text 0000002c TimerInit
00000000 w *UND* 00000000 __register_frame_info
0800426e w F .text 00000002 USBWakeUp_IRQHandler

98
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_GCC/Prog/bin/demoprog_olimex_stm32h103.srec
View File

@ -2,7 +2,7 @@ S025000062696E2F64656D6F70726F675F6F6C696D65785F73746D3332683130332E7372656339
S3150800400000500020C1410008074200080942000884
S315080040100B4200080D4200080F420008000000008D
S315080040200000000000000000000000001142000827
S315080040301342000800000000154200085144000819
S31508004030134200080000000015420008BD420008AF
S315080040401B4200081D4200081F42000821420008C2
S315080040502342000825420008274200082942000892
S315080040602B4200082D4200082F4200083142000862
@ -24,66 +24,66 @@ S3150800415008BF134B9D46A3F5803A00218B460F46B0
S315080041601348144A121A00F017FA0F4B002B00D006
S3150800417098470E4B002B00D09847002000210400DA
S315080041800D000D48002802D00C48AFF3008000F05F
S31508004190DDF92000290000F0F1F800F0C3F900BFAE
S31508004190DDF92000290000F01BF900F0C3F900BF83
S315080041A00000080000500020000000000000000089
S315080041B068000020900000200000000000000000B9
S315080041B0680000208D0000200000000000000000BC
S315080041C006498D460649074A074B9A42BEBF51F82B
S315080041D0040B42F8040BF8E7044800470050002097
S315080041E0D045000800000020680000204D41000866
S315080041F01F49204A002301E041F8043B9142FBD3C2
S3150800420000F0BCF8FEE7FEE7FEE7FEE7FEE7FEE79E
S3150800420000F0E6F8FEE7FEE7FEE7FEE7FEE7FEE774
S31508004210FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE768
S31508004220FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE758
S31508004230FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE748
S31508004240FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE738
S31508004250FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE728
S31508004260FEE7FEE7FEE7FEE7FEE7FEE7FEE7FEE718
S31508004270680000209000002000B583B00023019359
S31508004280009303F1804303F504331A6842F00102F0
S315080042901A605968364A0A405A601A6822F08472C7
S315080042A022F480321A601A6822F480221A605A6848
S315080042B022F4FE025A604FF41F029A601A6842F40A
S315080042C080321A602B4B1B6803F400330093019B62
S315080042D001330193009B23B9019A40F2DC539A42B9
S315080042E0F0D1244B1B6813F4003F00D1FEE7224BA4
S315080042F01A6842F010021A601A6822F003021A605D
S315080043001A6842F002021A60A3F580535A685A6086
S315080043105A6842F400525A605A6842F480625A60F7
S315080043205A6822F47C125A605A6842F4E8125A60B3
S315080043301A6842F080721A600E4B1B6813F0007FF1
S31508004340FAD00C4B5A6822F003025A605A6842F0B7
S3150800435002025A60074B5B6803F00C03082BF9D17D
S3150800436000F012F800F058F803B05DF804FB00BF3F
S315080043700000FFF8001002400020024008B5FFF7D1
S315080043807BFF00F01BF8FCE700B583B00121102085
S3150800439000F066F84FF48053ADF8043003238DF827
S315080043A0063010238DF8073001A9034800F066F897
S315080043B003B05DF804FB00BF0010014010B500F023
S315080043C041F80F4B1B68C31AB3F5FA7F16D3044698
S315080043D00C4B1B7843B901220A4B1A704FF48051D3
S315080043E0094800F09BF807E00022064B1A704FF4C4
S315080043F08051054800F090F8014B1C6010BD00BFC5
S31508004400840000208800002000100140014B18603D
S31508004410704700BF8C00002008B5074B074A5A6052
S31508004420F021074A82F823100020986007221A60B4
S31508004430FFF7ECFF08BD00BF10E000E03F190100E0
S3150800444000ED00E0014B1868704700BF8C000020A3
S31508004450024A136801331360704700BF8C000020BE
S3150800446021B1054B9A69104398617047024A9369CE
S3150800447023EA00009061704700100240F0B4CB7840
S3150800448003F00F02154613F0100F01D08D7815436F
S315080044900B78E3B10668002316E001229A400C88DF
S315080044A032EA04040FD19C000F27A74026EA070624
S315080044B005FA04F42643CC78282C01D1426102E09F
S315080044C0482C00D102610133072BE6D906600B8818
S315080044D0FF2B1ED94668002318E003F108040122C1
S315080044E0A2400C8832EA04040FD19C000F27A7408B
S315080044F026EA070605FA04F42643CC78282C00D1C8
S315080045004261CC78482C00D102610133072BE4D9EB
S315080045104660F0BC704700BF016170474161704753
S31508004520FEE700BF08B5074B044613B10021AFF3F9
S31508004270680000208D000020014B1860704700BFC1
S315080042808400002008B5074B074A5A60F021074A00
S3150800429082F823100020986007221A60FFF7ECFFC7
S315080042A008BD00BF10E000E03F19010000ED00E086
S315080042B0014B1868704700BF84000020024A136843
S315080042C001331360704700BF8400002000B583B037
S315080042D000230193009303F1804303F504331A681E
S315080042E042F001021A605968364A0A405A601A684A
S315080042F022F0847222F480321A601A6822F480222C
S315080043001A605A6822F4FE025A604FF41F029A6035
S315080043101A6842F480321A602B4B1B6803F4003388
S315080043200093019B01330193009B23B9019A40F244
S31508004330DC539A42F0D1244B1B6813F4003F00D19A
S31508004340FEE7224B1A6842F010021A601A6822F039
S3150800435003021A601A6842F002021A60A3F5805333
S315080043605A685A605A6842F400525A605A6842F4C7
S3150800437080625A605A6822F47C125A605A6842F47B
S31508004380E8125A601A6842F080721A600E4B1B686F
S3150800439013F0007FFAD00C4B5A6822F003025A60D9
S315080043A05A6842F002025A60074B5B6803F00C0336
S315080043B0082BF9D100F074F8FFF764FF03B05DF835
S315080043C004FB00BF0000FFF8001002400020024076
S315080043D008B5FFF77BFF00F07DF8FCE721B1054B38
S315080043E09A69104398617047024A936923EA000064
S315080043F09061704700100240F0B4CB7803F00F02CA
S31508004400154613F0100F01D08D7815430B78E3B1DC
S315080044100668002316E001229A400C8832EA040452
S315080044200FD19C000F27A74026EA070605FA04F4D1
S315080044302643CC78282C01D1426102E0482C00D1D1
S3150800444002610133072BE6D906600B88FF2B1ED9BC
S315080044504668002318E003F108040122A2400C88EC
S3150800446032EA04040FD19C000F27A74026EA070664
S3150800447005FA04F42643CC78282C00D14261CC787E
S31508004480482C00D102610133072BE4D94660F0BC01
S31508004490704700BF0161704741617047FEE700BF82
S315080044A000B583B001211020FFF798FF4FF4805321
S315080044B0ADF8043003238DF8063010238DF8073045
S315080044C001A90348FFF798FF03B05DF804FB00BF96
S315080044D00010014010B5FFF7EBFE0F4B1B68C31A1F
S315080044E0B3F5FA7F16D304460C4B1B7843B9012261
S315080044F00A4B1A704FF480510948FFF7CDFF07E0C1
S315080045000022064B1A704FF480510548FFF7C2FF88
S31508004510014B1C6010BD00BF880000208C000020E5
S315080045200010014008B5074B044613B10021AFF34C
S315080045300080054B1868836A03B198472046FFF741
S31508004540EFFF00BF00000000C04500080E4B70B525
S31508004540ADFF00BF00000000C04500080E4B70B567
S315080045501E460E4C0025E41AA410A54204D056F8AF
S31508004560253098470135F8E700F01EF8084B094C46
S315080045701E46E41AA4100025A54204D056F8253094

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_GCC/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32H103_IAR/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_Crossworks/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

BIN
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_GCC/Prog/bin/demoprog_olimex_stm32p103.elf
View File

Binary file not shown.

158
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_GCC/Prog/bin/demoprog_olimex_stm32p103.map
View File

@ -6,23 +6,23 @@ EXEC_P, HAS_SYMS, D_PAGED
start address 0x08006000
Program Header:
0x70000001 off 0x00006e7c vaddr 0x08006e7c paddr 0x08006e7c align 2**2
0x70000001 off 0x00006e90 vaddr 0x08006e90 paddr 0x08006e90 align 2**2
filesz 0x00000008 memsz 0x00000008 flags r--
LOAD off 0x00000000 vaddr 0x08000000 paddr 0x08000000 align 2**16
filesz 0x00006e84 memsz 0x00006e84 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08006e84 align 2**16
filesz 0x0000007c memsz 0x000000ec flags rw-
filesz 0x00006e98 memsz 0x00006e98 flags r-x
LOAD off 0x00010000 vaddr 0x20000000 paddr 0x08006e98 align 2**16
filesz 0x0000007c memsz 0x000000eb flags rw-
private flags = 5000200: [Version5 EABI] [soft-float ABI]
Sections:
Idx Name Size VMA LMA File off Algn
0 .text 00000e7c 08006000 08006000 00006000 2**2
0 .text 00000e90 08006000 08006000 00006000 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .ARM.exidx 00000008 08006e7c 08006e7c 00006e7c 2**2
1 .ARM.exidx 00000008 08006e90 08006e90 00006e90 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
2 .data 0000007c 20000000 08006e84 00010000 2**2
2 .data 0000007c 20000000 08006e98 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
3 .bss 00000070 2000007c 08006f00 0001007c 2**2
3 .bss 0000006f 2000007c 08006f14 0001007c 2**2
ALLOC
4 .heap 00000800 200000f0 200000f0 00010080 2**3
CONTENTS, READONLY
@ -32,27 +32,27 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, READONLY
7 .comment 0000006e 00000000 00000000 000110a9 2**0
CONTENTS, READONLY
8 .debug_line 00003224 00000000 00000000 00011117 2**0
8 .debug_line 00003232 00000000 00000000 00011117 2**0
CONTENTS, READONLY, DEBUGGING
9 .debug_info 0000452e 00000000 00000000 0001433b 2**0
9 .debug_info 0000453e 00000000 00000000 00014349 2**0
CONTENTS, READONLY, DEBUGGING
10 .debug_abbrev 00000faa 00000000 00000000 00018869 2**0
10 .debug_abbrev 00000fb9 00000000 00000000 00018887 2**0
CONTENTS, READONLY, DEBUGGING
11 .debug_aranges 000004d8 00000000 00000000 00019818 2**3
11 .debug_aranges 000004d8 00000000 00000000 00019840 2**3
CONTENTS, READONLY, DEBUGGING
12 .debug_loc 00002124 00000000 00000000 00019cf0 2**0
12 .debug_loc 00002143 00000000 00000000 00019d18 2**0
CONTENTS, READONLY, DEBUGGING
13 .debug_ranges 00000428 00000000 00000000 0001be14 2**0
13 .debug_ranges 00000428 00000000 00000000 0001be5b 2**0
CONTENTS, READONLY, DEBUGGING
14 .debug_macro 0000e746 00000000 00000000 0001c23c 2**0
14 .debug_macro 0000e746 00000000 00000000 0001c283 2**0
CONTENTS, READONLY, DEBUGGING
15 .debug_str 00051cfc 00000000 00000000 0002a982 2**0
15 .debug_str 00051d10 00000000 00000000 0002a9c9 2**0
CONTENTS, READONLY, DEBUGGING
16 .debug_frame 00000a30 00000000 00000000 0007c680 2**2
16 .debug_frame 00000a30 00000000 00000000 0007c6dc 2**2
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
08006000 l d .text 00000000 .text
08006e7c l d .ARM.exidx 00000000 .ARM.exidx
08006e90 l d .ARM.exidx 00000000 .ARM.exidx
20000000 l d .data 00000000 .data
2000007c l d .bss 00000000 .bss
200000f0 l d .heap 00000000 .heap
@ -75,7 +75,7 @@ SYMBOL TABLE:
080061fc l .text 00000000 .fill_zero_bss
080061f8 l .text 00000000 .loop_zero_bss
00000000 l df *ABS* 00000000 crtstuff.c
08006e78 l O .text 00000000 __EH_FRAME_BEGIN__
08006e8c l O .text 00000000 __EH_FRAME_BEGIN__
080060f0 l F .text 00000000 __do_global_dtors_aux
2000007c l .bss 00000000 completed.8603
20000078 l O .data 00000000 __do_global_dtors_aux_fini_array_entry
@ -83,32 +83,32 @@ SYMBOL TABLE:
20000080 l .bss 00000000 object.8608
20000074 l O .data 00000000 __frame_dummy_init_array_entry
00000000 l df *ABS* 00000000 /opt/gcc-arm-none-eabi-5_4-2016q3/bin/../lib/gcc/arm-none-eabi/5.4.1/../../../../arm-none-eabi/lib/armv7-m/crt0.o
00000000 l df *ABS* 00000000 boot.c
08006278 l F .text 00000058 CanGetSpeedConfig
080062d0 l F .text 00000080 BootComUartInit
08006350 l F .text 000000fc BootComCanInit
0800644c l F .text 00000024 UartReceiveByte
08006498 l F .text 00000094 BootComUartCheckActivationRequest
0800652c l F .text 00000040 BootComCanCheckActivationRequest
20000098 l O .bss 00000004 xcpCtoRxStartTime.6574
2000009c l O .bss 00000041 xcpCtoReqPacket.6571
200000dd l O .bss 00000001 xcpCtoRxLength.6572
200000de l O .bss 00000001 xcpCtoRxInProgress.6573
08006e50 l O .text 00000024 canTiming
00000000 l df *ABS* 00000000 main.c
08006578 l F .text 00000104 Init
00000000 l df *ABS* 00000000 led.c
200000e0 l O .bss 00000004 timer_counter_last.6552
200000e4 l O .bss 00000001 led_toggle_state.6551
00000000 l df *ABS* 00000000 timer.c
200000e8 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 stm32f10x_can.c
20000098 l O .bss 00000004 millisecond_counter
00000000 l df *ABS* 00000000 main.c
080062cc l F .text 00000104 Init
00000000 l df *ABS* 00000000 stm32f10x_usart.c
00000000 l df *ABS* 00000000 stm32f10x_rcc.c
20000000 l O .data 00000004 ADCPrescTable
20000004 l O .data 00000010 APBAHBPrescTable
00000000 l df *ABS* 00000000 stm32f10x_usart.c
00000000 l df *ABS* 00000000 stm32f10x_gpio.c
00000000 l df *ABS* 00000000 stm32f10x_can.c
00000000 l df *ABS* 00000000 _exit.c
00000000 l df *ABS* 00000000 led.c
2000009c l O .bss 00000004 timer_counter_last.6552
200000a0 l O .bss 00000001 led_toggle_state.6551
00000000 l df *ABS* 00000000 boot.c
08006ab4 l F .text 00000058 CanGetSpeedConfig
08006b0c l F .text 00000080 BootComUartInit
08006b8c l F .text 000000fc BootComCanInit
08006c88 l F .text 00000024 UartReceiveByte
08006cd4 l F .text 00000098 BootComUartCheckActivationRequest
08006d6c l F .text 00000050 BootComCanCheckActivationRequest
200000a4 l O .bss 00000004 xcpCtoRxStartTime.6574
200000a8 l O .bss 00000041 xcpCtoReqPacket.6571
200000e9 l O .bss 00000001 xcpCtoRxLength.6572
200000ea l O .bss 00000001 xcpCtoRxInProgress.6573
08006e64 l O .text 00000024 canTiming
00000000 l df *ABS* 00000000 exit.c
00000000 l df *ABS* 00000000 init.c
00000000 l df *ABS* 00000000 memset.c
@ -117,7 +117,7 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 impure.c
20000014 l O .data 00000060 impure_data
00000000 l df *ABS* 00000000 crtstuff.c
08006e78 l O .text 00000000 __FRAME_END__
08006e8c l O .text 00000000 __FRAME_END__
00000000 l df *ABS* 00000000
20000078 l .data 00000000 __init_array_end
20000074 l .data 00000000 __preinit_array_end
@ -130,94 +130,94 @@ SYMBOL TABLE:
20000000 g .data 00000000 __data_start__
08006250 w F .text 00000002 TIM1_CC_IRQHandler
08006208 w F .text 00000002 HardFault_Handler
080068b8 g F .text 000000f4 CAN_FilterInit
08006760 g F .text 00000010 SysTick_Handler
08006850 g F .text 000000f4 CAN_FilterInit
080062bc g F .text 00000010 SysTick_Handler
0800621c w F .text 00000002 PVD_IRQHandler
08006214 w F .text 00000002 PendSV_Handler
08006206 w F .text 00000002 NMI_Handler
08006e84 g .ARM.exidx 00000000 __exidx_end
08006e98 g .ARM.exidx 00000000 __exidx_end
0800622c w F .text 00000002 EXTI3_IRQHandler
08006e84 g .ARM.exidx 00000000 __etext
08006c88 g F .text 0000000e USART_GetFlagStatus
08006d3c g F .text 00000074 GPIO_PinRemapConfig
08006e98 g .ARM.exidx 00000000 __etext
080064d0 g F .text 0000000e USART_GetFlagStatus
08006694 g F .text 00000074 GPIO_PinRemapConfig
08006226 w F .text 00000002 EXTI0_IRQHandler
0800625c w F .text 00000002 I2C2_EV_IRQHandler
08006c80 g F .text 00000008 USART_ReceiveData
080064c8 g F .text 00000008 USART_ReceiveData
0800620e w F .text 00000002 UsageFault_Handler
08006b48 g F .text 0000001c RCC_APB2PeriphClockCmd
0800659c g F .text 0000001c RCC_APB2PeriphClockCmd
0800623e w F .text 00000002 ADC1_2_IRQHandler
08006c98 g F .text 0000009a GPIO_Init
080065f0 g F .text 0000009a GPIO_Init
200008f0 g .heap 00000000 __HeapLimit
2000007c g .bss 00000000 __bss_start__
08006260 w F .text 00000002 SPI1_IRQHandler
08006c64 g F .text 0000001c USART_Cmd
080064ac g F .text 0000001c USART_Cmd
0800621e w F .text 00000002 TAMPER_IRQHandler
08006b64 g F .text 0000001c RCC_APB1PeriphClockCmd
08006e7c g .text 00000000 __exidx_start
08006e74 g O .text 00000004 _global_impure_ptr
08006ddc g F .text 0000004c __libc_init_array
080065b8 g F .text 0000001c RCC_APB1PeriphClockCmd
08006e90 g .text 00000000 __exidx_start
08006e88 g O .text 00000004 _global_impure_ptr
08006df0 g F .text 0000004c __libc_init_array
08006236 w F .text 00000002 DMA1_Channel4_IRQHandler
0800614c g F .text 00000000 _mainCRTStartup
08006770 g F .text 00000038 CAN_DeInit
08006e38 g F .text 00000000 _init
0800647c g F .text 0000001c BootActivate
08006708 g F .text 00000038 CAN_DeInit
08006e4c g F .text 00000000 _init
08006cb8 g F .text 0000001c BootActivate
08006268 w F .text 00000002 USART3_IRQHandler
00000000 w *UND* 00000000 __libc_fini_array
08006220 w F .text 00000002 RTC_IRQHandler
0800623c w F .text 00000002 DMA1_Channel7_IRQHandler
080061c0 g F .text 00000030 Reset_Handler
08006244 w F .text 00000002 CAN1_RX1_IRQHandler
08006690 g F .text 0000003c LedInit
08006d34 g F .text 00000004 GPIO_SetBits
08006a28 g F .text 0000003c LedInit
0800668c g F .text 00000004 GPIO_SetBits
08006256 w F .text 00000002 TIM4_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stderr
00000000 w *UND* 00000000 __deregister_frame_info
200000f0 g .heap 00000000 end
08006258 w F .text 00000002 I2C1_EV_IRQHandler
2000007c g .data 00000000 __data_end__
08006a8c g F .text 000000bc RCC_GetClocksFreq
080064e0 g F .text 000000bc RCC_GetClocksFreq
0800623a w F .text 00000002 DMA1_Channel6_IRQHandler
08006b9c g F .text 000000c8 USART_Init
200000ec g .bss 00000000 __bss_end__
080063e4 g F .text 000000c8 USART_Init
200000eb g .bss 00000000 __bss_end__
00000800 g *ABS* 00000000 __STACK_SIZE
08006254 w F .text 00000002 TIM3_IRQHandler
08006224 w F .text 00000002 RCC_IRQHandler
080069cc g F .text 000000a4 CAN_Receive
08006964 g F .text 000000a4 CAN_Receive
0800624e w F .text 00000002 TIM1_TRG_COM_IRQHandler
00000000 w *UND* 00000000 __call_exitprocs
080067a8 g F .text 0000010e CAN_Init
08006740 g F .text 0000010e CAN_Init
08006230 w F .text 00000002 DMA1_Channel1_IRQHandler
08006218 w F .text 00000002 Default_Handler
0800614c g F .text 00000000 _start
080069ac g F .text 00000020 CAN_StructInit
08006944 g F .text 00000020 CAN_StructInit
0800626a w F .text 00000002 EXTI15_10_IRQHandler
00000000 w *UND* 00000000 software_init_hook
08006d38 g F .text 00000004 GPIO_ResetBits
08006690 g F .text 00000004 GPIO_ResetBits
08006248 w F .text 00000002 EXTI9_5_IRQHandler
08006262 w F .text 00000002 SPI2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdin
08006e28 g F .text 00000010 memset
08006e3c g F .text 00000010 memset
0800620a w F .text 00000002 MemManage_Handler
08006000 g .text 000000f0 __isr_vector
0800667c g F .text 00000014 main
080063d0 g F .text 00000014 main
08006210 w F .text 00000002 SVC_Handler
00000000 w *UND* 00000000 hardware_init_hook
200000f0 g .heap 00000000 __end__
08006238 w F .text 00000002 DMA1_Channel5_IRQHandler
08006a70 g F .text 0000001a CAN_MessagePending
08006a08 g F .text 0000001a CAN_MessagePending
0800622e w F .text 00000002 EXTI4_IRQHandler
0800671c g F .text 0000000c TimerSet
08006278 g F .text 0000000c TimerSet
08006242 w F .text 00000002 USB_LP_CAN1_RX0_IRQHandler
08006470 g F .text 0000000c BootComInit
08006e44 g F .text 00000000 _fini
08006cac g F .text 0000000c BootComInit
08006e58 g F .text 00000000 _fini
08006240 w F .text 00000002 USB_HP_CAN1_TX_IRQHandler
00000000 w *UND* 00000000 atexit
08006234 w F .text 00000002 DMA1_Channel3_IRQHandler
20005000 g .bss 00000000 __StackTop
0800624c w F .text 00000002 TIM1_UP_IRQHandler
0800621a w F .text 00000002 WWDG_IRQHandler
08006b80 g F .text 0000001c RCC_APB1PeriphResetCmd
080066cc g F .text 00000050 LedToggle
080065d4 g F .text 0000001c RCC_APB1PeriphResetCmd
08006a64 g F .text 00000050 LedToggle
08006252 w F .text 00000002 TIM2_IRQHandler
0800624a w F .text 00000002 TIM1_BRK_IRQHandler
20005000 g *ABS* 00000000 __stack
@ -225,20 +225,20 @@ SYMBOL TABLE:
0800626c w F .text 00000002 RTCAlarm_IRQHandler
20004800 g *ABS* 00000800 __StackLimit
08006266 w F .text 00000002 USART2_IRQHandler
08006db4 g F .text 00000028 exit
08006dc8 g F .text 00000028 exit
0800625e w F .text 00000002 I2C2_ER_IRQHandler
08006232 w F .text 00000002 DMA1_Channel2_IRQHandler
00000000 w *UND* 00000000 __sf_fake_stdout
0800656c g F .text 0000000c BootComCheckActivationRequest
08006dbc g F .text 0000000c BootComCheckActivationRequest
08006246 w F .text 00000002 CAN1_SCE_IRQHandler
08006222 w F .text 00000002 FLASH_IRQHandler
08006db0 w F .text 00000002 _exit
08006a24 w F .text 00000002 _exit
0800620c w F .text 00000002 BusFault_Handler
08006264 w F .text 00000002 USART1_IRQHandler
0800625a w F .text 00000002 I2C1_ER_IRQHandler
08006754 g F .text 0000000c TimerGet
080062b0 g F .text 0000000c TimerGet
00000000 w *UND* 00000000 _Jv_RegisterClasses
08006728 g F .text 0000002c TimerInit
08006284 g F .text 0000002c TimerInit
00000000 w *UND* 00000000 __register_frame_info
0800626e w F .text 00000002 USBWakeUp_IRQHandler

421
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_GCC/Prog/bin/demoprog_olimex_stm32p103.srec
View File

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19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_GCC/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_IAR/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,12 +260,19 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}
/**

19
Target/Demo/ARMCM3_STM32F1_Olimex_STM32P103_Keil/Prog/lib/stdperiphlib/CMSIS/CM3/DeviceSupport/ST/STM32F10x/system_stm32f10x.c
View File

@ -260,13 +260,18 @@ void SystemInit (void)
/* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */
/* Configure the Flash Latency cycles and enable prefetch buffer */
SetSysClock();
#if 0 /* The OpenBLT bootloader handles the vector table relocation. */
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
/* vector table initialization disabled because this is handled by the OpenBLT
* bootloader, right before this program is started. Alternatively, you can
* enable this code again as long as you set VECT_TAB_OFFSET to the actual start
* address of the vector table. This is not the default start in flash because this
* is where the OpenBLT bootloader resides.
*/
#if 0
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
#endif
}