mirror of https://github.com/rusefi/openblt.git
Refs #378. Reconfigured CAN acceptance filter to receive just one CAN message in the STM32F1 and STM32F4 ports.
git-svn-id: https://svn.code.sf.net/p/openblt/code/trunk@513 5dc33758-31d5-4daf-9ae8-b24bf3d40d73
This commit is contained in:
Frank Voorburg
parent
8116572e29
commit
433aab64c5
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@ -123,6 +123,14 @@ typedef struct
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#define CAN_BIT_TXRQ ((blt_int32u)0x00000001)
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/** \brief Release FIFO 0 mailbox bit. */
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#define CAN_BIT_RFOM0 ((blt_int32u)0x00000020)
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/** \brief Standard 11-bit identifier bit mask. */
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#define CAN_BIT_STDID_MASK (0x7FFu << CAN_BIT_STDID_POS)
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/** \brief Standard 11-bit identifier bits position. */
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#define CAN_BIT_STDID_POS (21u)
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/** \brief Extended 29-bit identifier bit mask. */
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#define CAN_BIT_EXTID_MASK (0x1FFFFFFFu << CAN_BIT_EXTID_POS)
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/** \brief Extended 29-bit identifier bits position. */
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#define CAN_BIT_EXTID_POS (3u)
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/****************************************************************************************
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@ -229,6 +237,8 @@ void CanInit(void)
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blt_int8u tseg1, tseg2;
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blt_bool result;
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blt_int32u timeout;
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blt_int32u rxMsgId = BOOT_COM_CAN_RX_MSG_ID;
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blt_int32u rxFilterId, rxFilterMask;
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/* the current implementation supports CAN1. throw an assertion error in case a
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* different CAN channel is configured.
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@ -290,15 +300,34 @@ void CanInit(void)
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break;
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}
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}
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/* determine the reception filter mask and id values such that it only leaves one
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* CAN identifier through (BOOT_COM_CAN_RX_MSG_ID).
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*/
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if ((rxMsgId & 0x80000000) == 0)
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{
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rxFilterId = rxMsgId << CAN_BIT_STDID_POS;
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rxFilterMask = (CAN_BIT_STDID_MASK) | CAN_BIT_IDE;
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}
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else
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{
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/* negate the ID-type bit */
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rxMsgId &= ~0x80000000;
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rxFilterId = (rxMsgId << CAN_BIT_EXTID_POS) | CAN_BIT_IDE;
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rxFilterMask = (CAN_BIT_EXTID_MASK) | CAN_BIT_IDE;
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}
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/* enter initialisation mode for the acceptance filter */
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CANx->FMR |= CAN_BIT_FINIT;
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/* deactivate filter 0 */
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CANx->FA1R &= ~CAN_BIT_FILTER0;
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/* 32-bit scale for the filter */
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CANx->FS1R |= CAN_BIT_FILTER0;
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/* open up the acceptance filter to receive all messages */
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CANx->sFilterRegister[0].FR1 = 0;
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CANx->sFilterRegister[0].FR2 = 0;
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/* Configure identifier mask mode for the filter */
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CANx->FM1R &= ~CAN_BIT_FILTER0;
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/* configure the acceptance filter to receive just one message */
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CANx->sFilterRegister[0].FR1 = rxFilterId;
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CANx->sFilterRegister[0].FR2 = rxFilterMask;
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/* select id/mask mode for the filter */
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CANx->FM1R &= ~CAN_BIT_FILTER0;
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/* FIFO 0 assignation for the filter */
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@ -125,6 +125,18 @@ typedef struct
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#define CAN_BIT_TXRQ ((blt_int32u)0x00000001)
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/** \brief Release FIFO 0 mailbox bit. */
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#define CAN_BIT_RFOM0 ((blt_int32u)0x00000020)
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/** \brief CAN2 start bank bit mask. */
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#define CAN_BIT_CAN2SB_MASK (0x3Fu << CAN_BIT_CAN2SB_POS)
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/** \brief CAN2 start bank position. */
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#define CAN_BIT_CAN2SB_POS (8u)
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/** \brief Standard 11-bit identifier bit mask. */
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#define CAN_BIT_STDID_MASK (0x7FFu << CAN_BIT_STDID_POS)
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/** \brief Standard 11-bit identifier bits position. */
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#define CAN_BIT_STDID_POS (21u)
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/** \brief Extended 29-bit identifier bit mask. */
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#define CAN_BIT_EXTID_MASK (0x1FFFFFFFu << CAN_BIT_EXTID_POS)
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/** \brief Extended 29-bit identifier bits position. */
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#define CAN_BIT_EXTID_POS (3u)
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/****************************************************************************************
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@ -238,6 +250,8 @@ void CanInit(void)
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blt_int8u tseg1, tseg2;
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blt_bool result;
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blt_int32u timeout;
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blt_int32u rxMsgId = BOOT_COM_CAN_RX_MSG_ID;
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blt_int32u rxFilterId, rxFilterMask;
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/* the current implementation supports CAN1 and 2. throw an assertion error in case a
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* different CAN channel is configured.
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@ -301,24 +315,46 @@ void CanInit(void)
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}
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}
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#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
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/* determine the reception filter mask and id values such that it only leaves one
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* CAN identifier through (BOOT_COM_CAN_RX_MSG_ID).
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*/
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if ((rxMsgId & 0x80000000) == 0)
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{
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rxFilterId = rxMsgId << CAN_BIT_STDID_POS;
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rxFilterMask = (CAN_BIT_STDID_MASK) | CAN_BIT_IDE;
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}
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else
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{
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/* negate the ID-type bit */
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rxMsgId &= ~0x80000000;
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rxFilterId = (rxMsgId << CAN_BIT_EXTID_POS) | CAN_BIT_IDE;
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rxFilterMask = (CAN_BIT_EXTID_MASK) | CAN_BIT_IDE;
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}
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/* enter initialisation mode for the acceptance filter */
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CAN1->FMR |= CAN_BIT_FINIT;
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/* set that CAN2 start bank to 14. This means that filters 0..13 are available
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* for CAN1 and 14..27 for CAN2. it is also the default value after reset. first
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* reset the active configuration.
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*/
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CAN1->FMR &= ~CAN_BIT_CAN2SB_MASK;
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CAN1->FMR |= ((blt_int32u)(14 << CAN_BIT_CAN2SB_POS));
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#if (BOOT_COM_CAN_CHANNEL_INDEX == 0)
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/* deactivate filter 0 */
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CAN1->FA1R &= ~CAN_BIT_FILTER0;
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/* 32-bit scale for the filter */
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CAN1->FS1R |= CAN_BIT_FILTER0;
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/* open up the acceptance filter to receive all messages */
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CAN1->sFilterRegister[0].FR1 = 0;
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CAN1->sFilterRegister[0].FR2 = 0;
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/* Configure identifier mask mode for the filter */
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CAN1->FM1R &= ~CAN_BIT_FILTER0;
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/* configure the acceptance filter to receive just one message */
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CAN1->sFilterRegister[0].FR1 = rxFilterId;
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CAN1->sFilterRegister[0].FR2 = rxFilterMask;
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/* select id/mask mode for the filter */
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CAN1->FM1R &= ~CAN_BIT_FILTER0;
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/* FIFO 0 assignation for the filter */
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CAN1->FFA1R &= ~CAN_BIT_FILTER0;
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/* filter activation */
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CAN1->FA1R |= CAN_BIT_FILTER0;
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/* leave initialisation mode for the acceptance filter */
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CAN1->FMR &= ~CAN_BIT_FINIT;
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#else
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/* enter initialisation mode for the acceptance filter */
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CAN1->FMR |= CAN_BIT_FINIT;
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@ -326,18 +362,20 @@ void CanInit(void)
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CAN1->FA1R &= ~CAN_BIT_FILTER14;
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/* 32-bit scale for the filter */
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CAN1->FS1R |= CAN_BIT_FILTER14;
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/* open up the acceptance filter to receive all messages */
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CAN1->sFilterRegister[14].FR1 = 0;
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CAN1->sFilterRegister[14].FR2 = 0;
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/* Configure identifier mask mode for the filter */
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CAN1->FM1R &= ~CAN_BIT_FILTER14;
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/* configure the acceptance filter to receive just one message */
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CAN1->sFilterRegister[14].FR1 = rxFilterId;
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CAN1->sFilterRegister[14].FR2 = rxFilterMask;
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/* select id/mask mode for the filter */
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CAN1->FM1R &= ~CAN_BIT_FILTER14;
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/* FIFO 0 assignation for the filter */
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CAN1->FFA1R &= ~CAN_BIT_FILTER14;
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/* filter activation */
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CAN1->FA1R |= CAN_BIT_FILTER14;
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#endif
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/* leave initialisation mode for the acceptance filter */
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CAN1->FMR &= ~CAN_BIT_FINIT;
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#endif
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} /*** end of CanInit ***/
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